LM4917SDX - National Semiconductor

LM4917

LM4917 Ground-Referenced, 95mW Stereo Headphone Amplifier

Literature Number: SNAS238F

LM4917 May 31, 2011

Ground-Referenced, 95mW Stereo Headphone Amplifier

General Description

The LM4917 is a stereo, output capacitor-less headphone

amplifier capable of delivering 95mW of continuous average

power into a 16Ω load with less than 1% THD+N from a single

3V power supply.

The LM4917 provides high quality audio reproduction with

minimal external components. A ground referenced output

eliminates the output coupling capacitors typically required by

single-ended loads, reducing component count, cost and

board space consumption. This makes the LM4917 ideal for

mobile phones and other portable equipment where board

space is at a premium. Eliminating the output coupling ca-

pacitors also improves low frequency response.

The LM4917 operates from a single 1.4V to 3.6V power sup-

ply, features low 0.02% THD+N and 70dB PSRR. Indepen-

dent right/left channel low-power shutdown controls provide

power saving flexibility for mono/stereo applications. Superior

click and pop suppression eliminates audible transients dur-

ing start up and shutdown. Short circuit and thermal overload

protection protects the device during fault conditions.

Key Specifications

■ Improved PSRR at 1kHz 70dB (typ)

■ Power Output at VDD = 3V,

RL = 16Ω, THD ≦ 1% 95mW (typ)

■ Shutdown Current 0.01µA (typ)

Features

■Ground referenced outputs

■High PSRR

■Available in space-saving TSSOP package

■Ultra low current shutdown mode

■Improved pop & click circuitry eliminates noises during

turn-on and turn-off transitions

■1.4 – 3.6V operation

■No output coupling capacitors, snubber networks,

bootstrap capacitors

■Shutdown either channel independently

Applications

■Notebook PCs

■Desktop PCs

■Mobile Phone

■PDAs

■Portable electronic devices

Block Diagram

200893b8

FIGURE 1. Circuit Block Diagram

Boomer® is a registered trademark of National Semiconductor Corporation.

LM4917 Ground-Referenced, 95mW Stereo Headphone Amplifier

Typical Application

200893b2

FIGURE 2. Typical Audio Amplifier Application Circuit

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LM4917

Connection Diagrams

TSSOP Package

200893a4

Top View

Order Number LM4917MT

See NS Package Number MTC14

TSSOP Marking

200893b7

Z - Assembly Plant Code

XY - Date Code

TT - Traceability

LLP Package

200893c0

Top View

Order Number LM4917SD

See NS Package Number SDA14A

LLP Marking

200893c4

Z - Assembly Plant Code

XY - Date Code

TT - Traceability

Pin Descriptions

Pin Name Function

1 SD_LC Active_Low Shutdown, Left Channel

2CPVDD Charge Pump Power Supply

3CCP+ Positive Terminal-Charge Pump Flying Capacitor

4 PGND Power Ground

5CCP- Negative Terminal- Charge Pump Flying Capacitor

6VCP_OUT Charge Pump Output

7-AVDD Negative Power Supply-Amplifier

8 L_OUT Left Channel Output

9AVDD Positive Power Supply-Amplifier

10 L_IN Left Channel Input

11 R_OUT Right Channel Output

12 SD_RC Active_Low Shutdown, Right Channel

13 R_IN Right Channel Input

14 SGND Signal Ground

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LM4917

Absolute Maximum Ratings (Note 2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage 4.0V

Storage Temperature −65°C to +150°C

Input Voltage -0.3V to VDD + 0.3V

Power Dissipation (Note 3) Internally Limited

ESD Susceptibility (Note 4) 2000V

ESD Susceptibility (Note 5) 200V

Junction Temperature 150°C

Thermal Resistance

θJC (TSSOP) 40°C/W

θJA (TSSOP) 109°C/W

Operating Ratings

Temperature Range

TMIN ≤ TA ≤ TMAX −40°C ≤ TA ≤ 85°C

Supply Voltage (VDD) 1.4V ≤ VCC ≤ 3.6V

Electrical Characteristics VDD = 3V (Note 1, Note 2)

The following specifications apply for VDD = 3V, AV = 1, and 16Ω load unless otherwise specified. Limits apply to TA = 25°C.

Symbol Parameter Conditions

LM4917

Units

(Limits)

Typ

(Note 6)

Limit

(Note 7,

Note 8)

IDD Quiescent Power Supply Current VIN = 0V, IO = 0A, both channels enabled 11 20 mA (max)

VIN = 0V, IO = 0A, one channel enabled 9 mA

ISD Shutdown Current VSD_LC = VSD_RC = GND 0.01 1 µA (max)

VOS Output Offset Voltage RL = 32Ω 1 10 mV (max)

POOutput Power THD+N = 1% (max); f = 1kHz, RL = 16Ω 95 50 mW (min)

THD+N = 1% (max); f = 1kHz, RL = 32Ω 82 mW

THD+N Total Harmonic Distortion + Noise PO = 50mW, f = 1kHz, RL = 32Ω

(A-weighted) single channel 0.02 %

PSRR Power Supply Rejection Ratio

VRIPPLE = 200mV sine p-p,

f = 1kHz

f = 20kHz

SNR Signal-to-Noise Ratio RL = 32Ω, POUT = 20mW, f = 1kHz 100 dB

VIH Shutdown Input Voltage High VIH =

0.7*CPVDD

V (min)

VIL Shutdown Input Voltage Low VIL =

0.3*CPVDD

V (max)

TWU Wake Up Time From Shutdown 339 µs (max)

XTALK Crosstalk RL = 16Ω, PO = 1.6mW, f = 1kHz 70 dB

ILInput Leakage Current ±0.1 nA

Note 1: All voltages are measured with respect to the GND pin unless otherwise specified.

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions

that guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where

no limit is given; however, the typical value is a good indication of device performance.

Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum

allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4917, see power de-

rating currents for more information.

Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor.

Note 5: Machine Model, 220pF-240pF discharged through all pins.

Note 6: Typicals are measured at 25°C and represent the parametric norm.

Note 7: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level).

Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.

Note 9: If the product is in shutdown mode and VDD exceeds 3.6V (to a max of 4V VDD) then most of the excess current will flow through the ESD protection

circuits. If the source impedance limits the current to a max of 10mA, then the part will be protected. If the part is enabled when VDD is above 4V circuit performance

will be curtailed or the part may be permanently damaged.

Note 10: Human body model, 100pF discharged through a 1.5kΩ resistor.

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LM4917

External Components Description

(Figure 1)

Components Functional Description

1. Ri

Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a

high-pass filter with Ci at fc = 1 / (2πRiCi).

2. Ci

Input coupling capacitor which blocks the DC voltage at the amplifier's input terminals. Also creates a high-

pass filter with Ri at fc = 1 / (2πRiCi). Refer to the section Proper Selection of External Components, for

an explanation of how to determine the value of Ci.

3. RfFeedback resistance which sets the closed-loop gain in conjunction with Ri.

4. C1Flying capacitor. Low ESR ceramic capacitor (≤100mΩ)

5. C2Output capacitor. Low ESR ceramic capacitor (≤100mΩ)

6. C3

Tantalum capacitor. Supply bypass capacitor which provides power supply filtering. Refer to the Power

Supply Bypassing section for information concerning proper placement and selection of the supply bypass

capacitor.

7. C4

Ceramic capacitor. Supply bypass capacitor which provides power supply filtering. Refer to the Power

Supply Bypassing section for information concerning proper placement and selection of the supply bypass

capacitor.

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LM4917

Typical Performance Characteristics

THD+N vs Frequency

VDD = 1.4V, RL = 32Ω, PO = 1mW

20089341

THD+N vs Frequency

VDD = 1.8V, RL = 16Ω, PO = 5mW

20089339

THD+N vs Frequency

VDD = 1.8V, RL = 32Ω, PO = 5mW

20089338

THD+N vs Frequency

VDD = 1.8V, RL = 32Ω, PO = 10mW

20089348

THD+N vs Frequency

VDD = 3.0V, RL = 16Ω, PO = 10mW

20089336

THD+N vs Frequency

VDD = 3.0V, RL = 16Ω, PO = 25mW

20089334

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LM4917

THD+N vs Frequency

VDD = 3.0V, RL = 16Ω, PO = 50mW

20089333

THD+N vs Frequency

VDD = 3.0V, RL = 32Ω, PO = 5mW

20089332

THD+N vs Frequency

VDD = 3.0V, RL = 32Ω, PO = 10mW

20089331

THD+N vs Frequency

VDD = 3.0V, RL = 32Ω, PO = 25mW

20089328

Gain Flatness vs Frequency

RIN = 20kΩ, CIN = 0.39µF

20089354

Output Power vs Supply Voltage

RL = 16Ω

20089347

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LM4917

Output Power vs Supply Voltage

RL = 32Ω

200893c6

PSRR vs Frequency

VDD = 1.8V, RL = 16Ω

20089345

PSRR vs Frequency

VDD = 1.8V, RL = 32Ω

20089344

PSRR vs Frequency

VDD = 3.0V, RL = 16Ω

20089343

PSRR vs Frequency

VDD = 3.0V, RL = 32Ω

20089342

THD+N vs Output Power

VDD = 1.4V, RL = 32Ω, f = 1kHz

20089327

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LM4917

THD+N vs Output Power

VDD = 1.8V, RL = 16Ω, f = 1kHz

20089326

THD+N vs Output Power

VDD = 1.8V, RL = 32Ω, f = 1kHz

20089325

THD+N vs Output Power

VDD = 3.0V, RL = 16Ω, f = 1kHz

20089324

THD+N vs Output Power

VDD = 3.0V, RL = 32Ω, f = 1kHz

20089322

Power Dissipation vs Output Power

VDD = 1.8V, RL = 16Ω

20089349

Power Dissipation vs Output Power

VDD = 1.8V, RL = 32Ω

20089350

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LM4917

Power Dissipation vs Output Power

VDD = 3V, RL = 16Ω

20089351

Power Dissipation vs Output Power

VDD = 3V, RL = 32Ω

20089352

Supply Current vs Supply Voltage

20089353

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LM4917

Application Information

ELIMINATING THE OUTPUT COUPLING CAPACITOR

The LM4917 features a low noise inverting charge pump that

generates an internal negative supply voltage. This allows the

outputs of the LM4917 to be biased about GND instead of a

nominal DC voltage, like traditional headphone amplifiers.

Because there is no DC component, the large DC blocking

capacitors (typically 220µF) are not necessary. The coupling

capacitors are replaced by two, small ceramic charge pump

capacitors, saving board space and cost.

Eliminating the output coupling capacitors also improves low

frequency response. The headphone impedance and the out-

put capacitor form a high pass filter that not only blocks the

DC component of the output, but also attenuates low fre-

quencies, impacting the bass response. Because the LM4917

does not require the output coupling capacitors, the low fre-

quency response of the device is not degraded by external

components.

In addition to eliminating the output coupling capacitors, the

ground referenced output nearly doubles the available dy-

namic range of the LM4917 when compared to a traditional

headphone amplifier operating from the same supply voltage.

OUTPUT TRANSIENT ('CLICK AND POPS') ELIMINATED

The LM4917 contains advanced circuitry that virtually elimi-

nates output transients ('clicks and pops'). This circuitry pre-

vents all traces of transients when the supply voltage is first

applied or when the part resumes operation after coming out

of shutdown mode.

To ensure optimal click and pop performance under low gain

configurations (less than 0dB), it is critical to minimize the RC

combination of the feedback resistor RF and stray input ca-

pacitance at the amplifier inputs. A more reliable way to lower

gain or reduce power delivered to the load is to place a current

limiting resistor in series with the load as explained in the

Minimizing Output Noise / Reducing Output Power sec-

tion.

AMPLIFIER CONFIGURATION EXPLANATION

As shown in Figure 2, the LM4917 has two operational am-

plifiers internally. The two amplifiers have externally config-

urable gain, and the closed loop gain is set by selecting the

ratio of Rf to Ri. Consequently, the gain for each channel of

the IC is

AV = -(Rf / Ri)

Since this an output ground-referenced amplifier, by driving

the headphone through ROUT (Pin 11) and LOUT (Pin 8), the

LM4917 does not require output coupling capacitors. The typ-

ical single-ended amplifier configuration where one side of the

load is connected to ground requires large, expensive output

capacitors.

POWER DISSIPATION

Power dissipation is a major concern when using any power

amplifier and must be thoroughly understood to ensure a suc-

cessful design. Equation 1 states the maximum power dissi-

pation point for a single-ended amplifier operating at a given

supply voltage and driving a specified output load.

PDMAX = (VDD) 2 / (2π2RL) (1)

Since the LM4917 has two operational amplifiers in one pack-

age, the maximum internal power dissipation point is twice

that of the number which results from Equation 1. Even with

the large internal power dissipation, the LM4917 does not re-

quire heat sinking over a large range of ambient temperature.

From Equation 1, assuming a 3V power supply and a 16Ω

load, the maximum power dissipation point is 28mW per am-

plifier. Thus the maximum package dissipation point is 56mW.

The maximum power dissipation point obtained must not be

greater than the power dissipation that results from Equation

PDMAX = (TJMAX - TA) / (θJA) (2)

For package TSSOP, θJA = 109°C/W. TJMAX = 150°C for the

LM4917. Depending on the ambient temperature, TA, of the

system surroundings, Equation 2 can be used to find the

maximum internal power dissipation supported by the IC

packaging. If the result of Equation 1 is greater than that of

Equation 2, then either the supply voltage must be decreased,

the load impedance increased or TA reduced. For the typical

application of a 3V power supply, with a 16Ω load, the maxi-

mum ambient temperature possible without violating the max-

imum junction temperature is approximately 119.9°C provid-

ed that device operation is around the maximum power

dissipation point. Power dissipation is a function of output

power and thus, if typical operation is not around the maxi-

mum power dissipation point, the ambient temperature may

be increased accordingly. Refer to the Typical Performance

Characteristics curves for power dissipation information for

lower output powers.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is crit-

ical for low noise performance and high power supply rejec-

tion. Applications that employ a 3V power supply typically use

a 4.7µF in parallel with a 0.1µF ceramic filter capacitors to

stabilize the power supply's output, reduce noise on the sup-

ply line, and improve the supply's transient response. How-

ever, their presence does not eliminate the need for a local

0.1µF supply bypass capacitor, CS, connected between the

LM4917's supply pins and ground. Keep the length of leads

and traces that connect capacitors between the LM4917's

power supply pin and ground as short as possible.

MICRO POWER SHUTDOWN

The voltage applied to the SD_LC (shutdown left channel) pin

and the SD_RC (shutdown right channel) pin controls the

LM4917’s shutdown function. When active, the LM4917’s mi-

cropower shutdown feature turns off the amplifiers’ bias cir-

cuitry, reducing the supply current. The trigger point is

0.3*CPVDD for a logic-low level, and 0.7*CPVDD for logic-high

level. The low 0.01µA(typ) shutdown current is achieved by

appling a voltage that is as near as ground a possible to the

SD_LC/SD_RC pins. A voltage that is higher than ground may

increase the shutdown current.

There are a few ways to control the micro-power shutdown.

These include using a single-pole, single-throw switch, a mi-

croprocessor, or a microcontroller. When using a switch,

connect an external 100kΩ pull-up resistor between the

SD_LC/SD_RC pins and VDD. Connect the switch between

the SD_LC/SD_RC pins and ground. Select normal amplifier

operation by opening the switch. Closing the switch connects

the SD_LC/SD_RC pins to ground, activating micro-power

shutdown. The switch and resistor guarantee that the

SD_LC/SD_RC pins will not float. This prevents unwanted

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LM4917

state changes. In a system with a microprocessor or micro-

controller, use a digital output to apply the control voltage to

the SD_LC/SD_RC pins. Driving the SD_LC/SD_RC pins

with active circuitry eliminates the pull-up resistor.

SELECTING PROPER EXTERNAL COMPONENTS

Optimizing the LM4917's performance requires properly se-

lecting external components. Though the LM4917 operates

well when using external components with wide tolerances,

best performance is achieved by optimizing component val-

ues.

The LM4917 is unity-gain stable, giving a designer maximum

design flexibility. The gain should be set to no more than a

given application requires. This allows the amplifier to achieve

minimum THD+N and maximum signal-to-noise ratio. These

parameters are compromised as the closed-loop gain in-

creases. However, low gain demands input signals with

greater voltage swings to achieve maximum output power.

Fortunately, many signal sources such as audio CODECs

have outputs of 1VRMS (2.83VP-P). Please refer to the Audio

Power Amplifier Design section for more information on se-

lecting the proper gain.

Charge Pump Capacitor Selection

Choose low ESR (<100mΩ) ceramic capacitors for optimum

performance. Low ESR capacitors keep the charge pump

output impedance to a minimum, extending the headroom on

the negative supply. Choose capacitors with an X7R dielectric

for best performance over temperature.

Charge pump load regulation and output resistance is affect-

ed by the value of the flying capacitor (C1). A larger valued

C1 improves load regulation and minimizes charge pump out-

put resistance. The switch on-resistance and capacitor ESR

dominates the output resistance for capacitor values above

2.2µF.

The output ripple is affected by the value and ESR of the out-

put capacitor (C2). Larger valued capacitors reduce output

ripple on the negative power supply. Lower ESR capacitors

minimizes the output ripple and reduces the output resistance

of the charge pump.

Input Capacitor Value Selection

Amplifying the lowest audio frequencies requires high value

input coupling capacitor (Ci in Figure 2). A high value capac-

itor can be expensive and may compromise space efficiency

in portable designs. In many cases, however, the speakers

used in portable systems, whether internal or external, have

little ability to reproduce signals below 150Hz. Applications

using speakers with this limited frequency response reap little

improvement by using high value input and output capacitors.

Besides affecting system cost and size, Ci has an effect on

the LM4917's click and pop performance. The magnitude of

the pop is directly proportional to the input capacitor's size.

Thus, pops can be minimized by selecting an input capacitor

value that is no higher than necessary to meet the desired

−3dB frequency.

As shown in Figure 2, the input resistor, Ri and the input ca-

pacitor, Ci, produce a -3dB high pass filter cutoff frequency

that is found using Equation (3).

fi-3dB = 1 / 2πRiCi(3)

Also, careful consideration must be taken in selecting a cer-

tain type of capacitor to be used in the system. Different types

of capacitors (tantalum, electrolytic, ceramic) have unique

performance characteristics and may affect overall system

performance.

AUDIO POWER AMPLIFIER DESIGN

Design a Dual 90mW/16Ω Audio Amplifier

Given:

Power Output 90mW

Load Impedance 16Ω

Input Level 1Vrms (max)

Input Impedance 20kΩ

Bandwidth 100Hz–20kHz ± 0.50dB

The design begins by specifying the minimum supply voltage

necessary to obtain the specified output power. One way to

find the minimum supply voltage is to use the Output Power

vs Supply Voltage curve in the Typical Performance Char-

acteristics section. Another way, using Equation (5), is to

calculate the peak output voltage necessary to achieve the

desired output power for a given load impedance. For a sin-

gle-ended application, the result is Equation (5).

(4)

VDD ≥ [2VOPEAK + (VDOTOP + VDOBOT)] (5)

The Output Power vs Supply Voltage graph for a 16Ω load

indicates a minimum supply voltage of 3.1V. This is easily met

by the commonly used 3.3V supply voltage. The additional

voltage creates the benefit of headroom, allowing the LM4917

to produce peak output power in excess of 90mW without

clipping or other audible distortion. The choice of supply volt-

age must also not create a situation that violates maximum

power dissipation as explained above in the Power Dissipa-

tion section. Remember that the maximum power dissipation

point from Equation (1) must be multiplied by two since there

are two independent amplifiers inside the package. Once the

power dissipation equations have been addressed, the re-

quired gain can be determined from Equation (6).

(6)

Thus, a minimum gain of 1.2 allows the LM4917 to reach full

output swing and maintain low noise and THD+N perfro-

mance. For this example, let AV = 1.5.

The amplifiers overall gain is set using the input (Ri ) and

feedback (Rf ) resistors. With the desired input impedance set

at 20kΩ, the feedback resistor is found using Equation (7).

AV = Rf / Ri(7)

The value of Rf is 30kΩ.

The last step in this design is setting the amplifier's −3db fre-

quency bandwidth. To achieve the desired ±0.25dB pass

band magnitude variation limit, the low frequency response

must extend to at lease one−fifth the lower bandwidth limit

and the high frequency response must extend to at least five

times the upper bandwidth limit. The gain variation for both

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LM4917

response limits is 0.17dB, well within the ±0.25dB desired

limit. The results are

fL = 100Hz / 5 = 20Hz (8)

and

fH = 20kHz x 5 = 100kHz (9)

As stated in the External Components section, both Ri in

conjunction with Ci, and RL, create first order highpass filters.

Thus to obtain the desired low frequency response of 100Hz

within ±0.5dB, both poles must be taken into consideration.

The combination of two single order filters at the same fre-

quency forms a second order response. This results in a

signal which is down 0.34dB at five times away from the single

order filter −3dB point. Thus, a frequency of 20Hz is used in

the following equations to ensure that the response is better

than 0.5dB down at 100Hz.

Ci ≥ 1 / (2π*20kΩ*20Hz) = 0.397µF; use 0.39µF (10)

The high frequency pole is determined by the product of the

desired high frequency pole, fH, and the closed-loop gain,

AV. With a closed-loop gain of 1.5 and fH = 100kHz, the re-

sulting GBWP = 150kHz which is much smaller than the

LM4917's GBWP of 3MHz. This figure displays that if a de-

signer has a need to design an amplifier with a higher gain,

the LM4917 can still be used without running into bandwidth

limitations.

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LM4917

LM4917 SO Demo Board Artwork

Top Overlay

20089304

Top Layer

20089305

Bottom Layer

20089321

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LM4917

LM4917 LLP Demo Board Artwork

Top Overlay

200893c3

Top Layer

200893c2

Bottom Layer

200893c1

LM4917 Reference Design Boards

Bill Of Materials

Part Description Qty Ref Designator

LM4917 Mono Reference Design Board 1

LM4917 Audio AMP 1 U1

Tantalum Cap 1µF 16V 10 1 Cs

Ceramic Cap 0.39µF 50V Z50 20 2 Ci

Resistor 20kΩ 1/10W 5 4 Ri, Rf

Resistor 100kΩ 1/10W 5 1 Rpu

Jumper Header Vertical Mount 2X1, 0.100 1 J1

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LM4917

PCB Layout Guidelines

This section provides practical guidelines for mixed signal

PCB layout that involves various digital/analog power and

ground traces. Designers should note that these are only

"rule-of-thumb" recommendations and the actual results will

depend heavily on the final layout.

Avoiding Shorts on the Charge Pump Outputs

For the LM4917SD package, the exposed dap is connected

to the substrate of the device. Because LM4917’s charge

pump is powered by both a negative and positive supply the

exposed dap must be left floating. This will avoid shorting the

charge pump outputs.

20089355

FIGURE 3. Bottom View of LM4917SD Package

Minimization of THD

PCB trace impedance on the power, ground, and all output

traces should be minimized to achieve optimal THD perfor-

mance. Therefore, use PCB traces that are as wide as pos-

sible for these connections. As the gain of the amplifier is

increased, the trace impedance will have an ever increasing

adverse affect on THD performance. At unity-gain (0dB) the

parasitic trace impedance effect on THD performance is re-

duced but still a negative factor in the THD performance of

the LM4917 in a given application.

General Mixed Signal Layout

Recommendation

Power and Ground Circuits

For two layer mixed signal design, it is important to isolate the

digital power and ground trace paths from the analog power

and ground trace paths. Star trace routing techniques (bring-

ing individual traces back to a central point rather than daisy

chaining traces together in a serial manner) can greatly en-

hance low level signal performance. Star trace routing refers

to using individual traces to feed power and ground to each

circuit or even device. This technique will require a greater

amount of design time, but will not increase the final price of

the board. The only extra parts required may be some

jumpers.

Single-Point Power / Ground Connections

The analog power traces should be connected to the digital

traces through a single point (link). A "PI-filter" can be helpful

in minimizing high frequency noise coupling between the ana-

log and digital sections. Further, place digital and analog

power traces over the corresponding digital and analog

ground traces to minimize noise coupling.

Placement of Digital and Analog Components

All digital components and high-speed digital signal traces

should be located as far away as possible from analog com-

ponents and circuit traces.

Avoiding Typical Design / Layout Problems

Avoid ground loops or running digital and analog traces par-

allel to each other (side-by-side) on the same PCB layer.

When traces must cross over each other do it at 90 degrees.

Running digital and analog traces at 90 degrees to each other

from the top to the bottom side as much as possible will min-

imize capacitive noise coupling and cross talk.

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LM4917

Physical Dimensions inches (millimeters) unless otherwise noted

TSSOP

Order Number LM4917MT

NS Package Number MTC14

LLP

Order Number LM4917SD

NS Package Number SDA14A

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LM4917

Notes

LM4917 Ground-Referenced, 95mW Stereo Headphone Amplifier

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