SILICON DUAL MATCHED
NPN TRANSISTORS
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Document Number
Issue
Page 1 of
2N2920ADCSM
• Dual Silicon NPN Matched Transistors
• Hermetic Ceramic Surface Mount Package
• Designed For Low Noise, Differential Amplifier Applications.
• Screening Options Available
ABSOLUTE MAXIMUM RATINGS
(Each Side, TA = 25°C unless otherwise stated)
Each Side Total Device
VCBO Collector – Base Voltage 60V
VCEO Collector – Emitter Voltage 60V
VEBO Emitter – Base Voltage 6V
IC Continuous Collector Current 30mA
PD Total Power Dissipation at TA = 25°C 300mW 500mW
(1)
Derate Above 25°C 1.71mW/°C
2.86mW/°C
TJ Junction Temperature Range -65 to +200°C
Tstg Storage Temperature Range -65 to +200°C
THERMAL PROPERTIES
Symbols Parameters Max. Units
RθJA Each Side - Thermal Resistance, Junction To Ambient 583.3 °C/W
RθJA
(1)
Total Device - Thermal Resistance, Junction To Ambient 350 °C/W
Notes
NotesNotes
Notes
(1) Total device power dissipation limited by package.