IRF510S, SiHF510S Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) * Halogen-free According to IEC 61249-2-21 Definition * Surface Mount * Available in Tape and Reel * Dynamic dV/dt Rating * Repetitive Avalanche Rated * 175 C Operating Temperature * Fast Switching * Ease of Paralleling * Compliant to RoHS Directive 2002/95/EC 100 RDS(on) () VGS = 10 V 0.54 Qg (Max.) (nC) 8.3 Qgs (nC) 2.3 Qgd (nC) 3.8 Configuration Single D DESCRIPTION Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The D2PAK (TO-263) is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK (TO-263) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. D2PAK (TO-263) G G D S S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free Lead (Pb)-free D2PAK (TO-263) SiHF510S-GE3 IRF510SPbF SiHF510S-E3 D2PAK (TO-263) SiHF510STRL-GE3a IRF510STRLPbFa SiHF510STL-E3a D2PAK (TO-263) SiHF510STRR-GE3a IRF510STRRPbFa SiHF510STR-E3a Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS (TC = 25 C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Linear Derating Factor (PCB Mount)e Single Pulse Avalanche Energyb Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Maximum Power Dissipation (PCB Mount)e Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) SYMBOL VDS VGS VGS at 10 V TC = 25 C TC = 100 C ID IDM EAS IAR EAR TC = 25 C TA = 25 C PD dV/dt TJ, Tstg for 10 s LIMIT 100 20 5.6 4.0 20 0.29 0.025 100 5.6 4.3 43 3.7 5.5 - 55 to + 175 300d UNIT V A W/C mJ A mJ W V/ns C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 25 V, starting TJ = 25 C, L = 4.8 mH, Rg = 25 , IAS = 5.6 A (see fig. 12). c. ISD 5.6 A, dI/dt 75 A/s, VDD VDS, TJ 175 C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91016 S11-1044-Rev. C, 30-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF510S, SiHF510S Vishay Siliconix THERMAL RESISTANCE RATINGS SYMBOL TYP. MAX. Maximum Junction-to-Ambient PARAMETER RthJA - 62 Maximum Junction-to-Ambient (PCB Mount)a RthJA - 40 Maximum Junction-to-Case (Drain) RthJC - 3.5 UNIT C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance VDS VGS = 0, ID = 250 A 100 - - V VDS/TJ Reference to 25 C, ID = 1 mA - 0.12 - V/C VGS(th) VDS = VGS, ID = 250 A 2.0 - 4.0 V nA IGSS IDSS RDS(on) gfs VGS = 20 V - - 100 VDS = 100 V, VGS = 0 V - - 25 VDS = 80 V, VGS = 0 V, TJ = 150 C - - 250 - - 0.54 1.3 - - S - 180 - - 81 - - 15 - - - 8.3 - - 2.3 ID = 3.4 Ab VGS = 10 V VDS = 50 V, ID = 3.4 Ab A Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 10 V ID = 5.6 A, VDS = 80 V, see fig. 6 and 13b pF nC Gate-Drain Charge Qgd - - 3.8 Turn-On Delay Time td(on) - 6.9 - - 16 - - 15 - - 9.4 - - 4.5 - - 7.5 - - - 5.6 - - 20 - - 2.5 V - 100 200 ns - 0.44 0.88 C Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = 50 V, ID = 5.6 A, Rg = 24 , RD = 8.4 , see fig. 10b tf Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact ns D nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 C, IS = 5.6 A, VGS = 0 Vb TJ = 25 C, IF = 5.6 A, dI/dt = 100 A/sb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %. www.vishay.com 2 Document Number: 91016 S11-1044-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF510S, SiHF510S Vishay Siliconix TYPICAL CHARACTERISTICS (25 C, unless otherwise noted) 101 VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 100 4.5 V 20 s Pulse Width TC = 25 C 10-1 100 175 C 100 4 4.5 V 20 s Pulse Width TC = 175 C 10-1 91016_02 100 101 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics, TC = 175 C Document Number: 91016 S11-1044-Rev. C, 30-May-11 6 7 8 9 10 Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) ID, Drain Current (A) 100 Top 5 VGS, Gate-to-Source Voltage (V) 91016_03 Fig. 1 - Typical Output Characteristics, TC = 25 C VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 20 s Pulse Width VDS = 50 V 10-1 101 VDS, Drain-to-Source Voltage (V) 91016_01 101 25 C Top ID, Drain Current (A) ID, Drain Current (A) 101 91016_04 3.0 ID = 5.6 A VGS = 10 V 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 180 TJ, Junction Temperature (C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF510S, SiHF510S 400 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Capacitance (pF) 320 240 Ciss 160 Coss 80 Crss ISD, Reverse Drain Current (A) Vishay Siliconix 175 C 100 25 C 10-1 VGS = 0 V 0 100 0.5 101 VDS, Drain-to-Source Voltage (V) 91016_05 VGS, Gate-to-Source Voltage (V) ID, Drain Current (A) VDS = 50 V VDS = 20 V 8 4 For test circuit see figure 13 0 91016_06 2 4 6 8 1.1 1.2 QG, Total Gate Charge (nC) 2 10 100 s 5 1 ms 2 1 10 ms 5 TC = 25 C TJ = 175 C Single Pulse 2 0.1 10 Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 1.0 Operation in this area limited by RDS(on) 5 0 0.9 102 VDS = 80 V 12 0.8 Fig. 7 - Typical Source-Drain Diode Forward Voltage ID = 5.6 A 16 0.7 VSD, Source-to-Drain Voltage (V) 91016_07 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 20 0.6 1 91016_08 2 5 10 2 5 102 2 5 103 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Document Number: 91016 S11-1044-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF510S, SiHF510S Vishay Siliconix RD VDS VGS 6.0 D.U.T. Rg + - VDD 5.0 ID, Drain Current (A) 10 V Pulse width 1 s Duty factor 0.1 % 4.0 3.0 Fig. 10a - Switching Time Test Circuit 2.0 VDS 1.0 90 % 0.0 25 50 75 100 125 150 175 TC, Case Temperature (C) 91016_09 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 0 - 0.5 1 0.2 0.1 0.1 0.05 0.02 0.01 PDM t1 Single Pulse (Thermal Response) t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-2 10-5 91016_11 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91016 S11-1044-Rev. C, 30-May-11 www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF510S, SiHF510S Vishay Siliconix L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T Rg + - I AS V DD VDS 10 V 0.01 tp IAS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms EAS, Single Pulse Energy (mJ) 300 ID 2.3 A 4.0 A Bottom 5.6 A Top 250 200 150 100 50 VDD = 25 V 0 25 91016_12c 50 75 100 125 150 175 Starting TJ, Junction Temperature (C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 k QG VGS 12 V 0.2 F 0.3 F QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91016 S11-1044-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF510S, SiHF510S Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations * Low stray inductance * Ground plane * Low leakage inductance current transformer + - - Rg * * * * + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91016. Document Number: 91016 S11-1044-Rev. C, 30-May-11 www.vishay.com 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TO-263AB (HIGH VOLTAGE) A (Datum A) 3 A 4 4 L1 B A E c2 H Gauge plane 4 0 to 8 5 D B Detail A Seating plane H 1 2 C 3 C L L3 L4 Detail "A" Rotated 90 CW scale 8:1 L2 B A1 B A 2 x b2 c 2xb E 0.010 M A M B 0.004 M B 2xe Plating 5 b1, b3 Base metal c1 (c) D1 4 5 (b, b2) Lead tip MILLIMETERS DIM. MIN. MAX. View A - A INCHES MIN. 4 E1 Section B - B and C - C Scale: none MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 6.22 - 0.245 - b 0.51 0.99 0.020 0.039 E1 b1 0.51 0.89 0.020 0.035 e b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 2.54 BSC 0.100 BSC c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 D 8.38 9.65 0.330 0.380 L4 0.25 BSC 4.78 5.28 0.010 BSC 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. Document Number: 91364 Revision: 15-Sep-08 www.vishay.com 1 AN826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead 0.420 0.355 0.635 (16.129) (9.017) (10.668) 0.145 (3.683) 0.135 (3.429) 0.200 0.050 (5.080) (1.257) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Document Number: 73397 11-Apr-05 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Revision: 12-Mar-12 1 Document Number: 91000