HARRIS Technical Data CD54/74HC240/241/244 CD54/74HCT240/241/244 High-Speed CMOS Logic T= 52-09-00 File Number 1656 27E D MM 4302271 0017705 7 BRHAS Octal Buffer/Line Drivers, 3-Sitate @ Veo=5 V, CL=15 pF, Ta=26 C for HC240 SEMICOND SECTOR 241 & 244 240 1A0 + He 10 TO . fas) eM GD84/74HC/HCT240 Inverting 143 &) H2- 1va Ta CD54/74HC/HCT241 Non-Inverting oat ta fp 20 ee CD54/74HC/HCT244 Non-Inverting 2a2 15) [Soyo ays ~= pe Features: aaa 4 IS. ova dys: Typical propagation delay = 8 ns 2408244 241 TOE TOE 19 one =o a 3-State outputs 208 208 9208-38495 Buffered inputs FUNCTIONAL DIAGRAM AND TERMINAL ASSIGNMENT The RCA-CD54/74HC240 and CD54/74HCT240 are inverting 3-state buffers having two active-low-output enables. The RCA CD54/74HC/HCT241 and CD54/74HC/HCT244 are non- inverting 3-state buffers that differ only in that the 241 has one active-high andone active-low output enable, and the 244 has two active-low output enables. All three types have identical pinouts, The CD54HC240/241/244 and CD54HCT240/241/244 are supplied: in 20-lead ceramic dual-in-line packages (F suf- fix), The CD74HO240/241/244 and CD74HCT240/241/244 are supplied in 20-lead dual-in-line plastic packages (E suffix) and in 20-lead dual-in-line surface mount plastic packages (M suffix), The CD4/74HC/HCT240/241/244 are also supplied.in chip form (H suffix). To iyi TY2 TY3 2YO 241 22 1 O4 4A1 92CS-38496RI Fig. 1 - CD84/74HC/HCT240 logic diagram. 298 O13 O15 2Ai 2A2 " High-current bus driver outputs Famlly Features: s Fanout (Over Temperature Range): Standard Outputs - 10 LSTTL Loads Bus Driver Outputs - 15 LSTTL Loads a Wide Operating Temperature Range: CD74HC/HCT: -40 to +85 C : Balanced Propagation Delay and Transition Times Significant Power Reduction Compared to LSTTL Logic ICs Alternate Source is Philips/Signetics uw CD54HC/CD74HC Types: 2 to 6 V Operation High Noise Immunity: Ni= 30%, Nin=30% of Voc? @ Voc=5 V a CD 54HCT/CD74HCT Types: 4.5 to 5.5 V Operation Direct LSTTL input Logic Compatibility Vi=0.8 V Mas., Vin=2 V Min. CMOS Input Compatibility <1 pA @ Vou Vou ava TRUTH TABLE INPUTS OUTPUT TOE,20E A Y L L H L H H x z (HC/HCT240)T-52-09 - Technical Data CD54/74HC240/241/244 CD54/74HCT240/241/244 1YO 11 12 413 2Y0 2t 2Y2 23 2Aa0 2A1 2A2 243 92CS-38497R1 Fig, 2 - CD4/74HC/HCT241 logic diagram. 27E D BM 4302271 0017706 7 MBHAS TRUTH TABLE INPUTS OUTPUT INPUTS QUTPUT 10E 1A 1v 20E 2A 2v L L L L X Zz L H H H L L H x z H H H H=HIGH Voltage Level = (HOT/HCT241) L=LOW Voltage Level X=Immaterial Z=HIGH impedance 1O 1v1 12 13 2Yo 21 22 23 HARRIS SEMICOND SECTOR 1A0 1A1 1A2 tA 2A0 2A1 2A2 2A3 92CS-38496RI Fig. 3 - CD54/74HC/HCT244 logic diagram. TRUTH TABLE INPUTS OUTPUT 10E, 20E A Y L L L L H H H Xx Zz (HC/HCT244) 299.HARRIS SEMICOND SECTOR eCe?E D EM 4302271 0017707 O BEHAS Technical Data T-52-09 CD54/74HC240/241/244 CD54/74HCT240/241/244 MAXIMUM RATINGS, Absolute-Maximum Values: DC SUPPLY-VOLTAGE, (Vcc): (Voltages referanced to Ground) 1.0... ccc rece sere n cee ceceneecenteneneerbes OC INPUT DIODE CURRENT, Ik (FOR Vi < -0.5 V OR Vi > Vec #0.5 V) ...,...65 DC OUTPUT DIODE CURRENT, lox (FOR. Vo < -0.5 V OR Vo > Vec #0.5 V) ..... DC DRAIN CURRENT, PER OUTPUT (lo) (FOR -0.5 V < Vo < Veo +0.5 V) ...eeeee DG Vec OR GROUND CURRENT, (Sec) oo. e cece cece eter eeweeeerneeneenee Pa coces L70MA POWER DISSIPATION PER PACKAGE (Pp): : . For Ta = -40.to 60C (PACKAGE TYPE E) oo. cee cece nen c teen ect e nent nnn ee tree etree e neem eer ee rent essen ete ra nent seen nee +. 500 mW For Ta = +60 to +85C (PACKAGE TYPE E) .......- Lene e ene e acer ents teen ne ener eeseeneeeretes Derate Linearly at 8 mW/*C to 300 mW. For Ta = -55-to +100C (PACKAGE TYPE F, H) dante cece ner en een cnneeeserans >. 500 mW For Ta = +100 to +125G (PACKAGE TYPE F, H) ......scec cece cece cere retro erener teenie recent Derate Linearly at 8 mW/*C to 300 mW For Ta = -40 to +70C (PACKAGE TYPE M) ......-. pee eae eecasaseneenereee bocce eee teen e teen sen ee ness eee eset beeen eees 400 mw For Ta = +70 to 125C (PACKAGE TYPE M) .....cececeeeeeneeece beneeseee dee egeneencesatanes Derate Linearly at 6 mW/*C to 70 mW OPERATING-TEMPERATURE RANGE (Ta): -55 to +125C PACKAGE TYPEF,H...... PACKAGE TYPE.E, M cocsssseeerecseuees . -40 to. +86C STORAGE. TEMPERATURE (Tato) occ sseeeceee cn ceneeessseneseeeeenetsee sneer eececn esas ensereret sees de seeeseeeeeeeane -65 to +150C. LEAD TEMPERATURE (DURING SOLDERING): At distance 1/16 + 1/32 In. (1.59 0.79 mm) from case for 10S MAX. ..reisecesceeee reer eene eens ee eetteenneerenarereetens +265C Unit inserted into a PC. Board (min. thickness 1/16 in., 1.59 mm) with solder contacting lead tips Only 00... cc ccee enc cee cette reer t eee e ene en ence nets eer e teen eens sees eens eee eees decease ea 4300C RECOMMENDED OPERATING CONDITIONS: For maximum reliability, nontinal operating conditions should be selected so that operation Is always within the following ranges: LIMITS CHARACTERISTIC MIN. MAK UNITS Supply-Voltage Range (For Ta=Full Package-Temperature Range) Vcc:* CD54/74HC Types 2 6 CDS4/74HCT Types 45 5.5 _Y DC Input or Output Voltage Vi, Vo J 0 : Vec NM. Operating Temperature Ta: CD74 Types -40 +85 CD54 Types -55 +125 Input Rise and Fall Times ty, t : / ~ ataV. 0 1000 at45V 0 500 ns at6V 0 400 Unless otherwise specified, all voltages are referenced to Ground. 300C7E D BM 4302271 0017708 2 MBHAS HARRIS SEMICOND SECTOR STATIC ELECTRICAL CHARACTERISTICS T-52-09 _ Technical. Data CD54/74HC240/241/244 CD54/74HCT240/241/244 CD74HC240/241/244, CD84HC240/241/244 CD74HCT240/241/244, CDOS4HCT249/241/244 TEST T4HC/S4HC 74HC S4HC TEST T4HCT/SAHCT | 74HCT.-] 54HCT ; CONDITIONS TYPES TYPES TYPES | CONDITIONS TYPES TYPES Tyres | . CHARACTERISTIC - ~ UNITS -40/ ~$5/ -40/ - 425C 428C 5a ve lo Veo *E5C | +125C Mi Veco +85C | +125C v mA v v v Min | Typ | Max | Min | Max {Min |Max Min | Typ | Max | Min |-Max | Min | Max High-Level 2 71565/]{rs}- 715] 45 Input Voltage Vin 45 13168] | 13.416] (315) _ fo} 2}7;]J2j-]2] v 6 $42] ] f42] }42] 55 , Low-Level 2} -|/]05} |o5} | 05. 45 Input Voltage Vit 45 } | [1.95] 41.95] | 1.35 _ to}/|] ]}08|] ]08] |o8 Vv 6 j}||]18]1]18] ] 18 55 High-Level Viv 2 419) ~ | 119} [19] VIL Output Voltage Von or -0,02 45 444] ] |}44] 144 ] or 45744} - |] 144] ]44] v CMOS Loads Vin 6 j9]/ |- [59] [597] Vin Vit Vit TTL Loads or -6 45 /3.98] | |3.84} [3.7] or 45 |398} | |3:84) }3a7] v . {8us Oriver) Vin -7.8 6 (548) | (534) 15.2 | Vin Low-Level Vin 2;j;,-- O01; for } ]ot Vit Output Voltage Vor or 0.02 45 |] | jot} for |] |o1 or 45 /} ]041/-]01>f] 01 Vv CMOS Loads Vin 6 j|fo1ffor]jor] va . Vie Vie TTt Loads or 6 45 | | [026| |033; jo4 or 45 | | |0.26] 033} | 04 v {Bus Driver) View 7.8 6 |} | |026) |0.3a39} | O04 Vin Input Leakage Veo voltage Current h or 6 }] jsorf far | | meee 55}| |zo1]]a1]fat | oa & Gnd Gnd Quiescent Vec Vee Device or 0 6 || | 8s | ~ | 60 | } 160 or 55 }| 18 | } 8 } | 160 HA Current lec Gnd Gnd Additionat 45 Quiescent Voc-2.1 | to |} | 100 1360 | [450 | | 490 HA Device Current 55 ] per Input pin: 1 unit load Alcc* state Vit Vo=Vec Vic teakage or or 6 } | [+0.5, ] +5]. +10 or 5 | | j0.5] | +5 | J+10 BA current loz Viet Gnd Vie t : *For dual-supply systems theoretical worst case (V, = 2.4 V, Vec = 5.5 V) specification is 1.8 mA. 3012e7E D EM 430ee71 0017709 4 BHAS HARRIS SEMICOND SECTOR Technical Data. . . T-52-09 CD54/74HC240/241/244 CD54/74HCT240/241/244 HCT Input Loading Tables Unit Loads* Unit Loads* Unit Loads* 15 07 . 07 1.5 0.7 *Unit Load is Algg limit specified in Static Characteristic Chart, e.g., 360 A max. @ 26C. SWITCHING CHARACTERISTICS (Vcco=5 V, Ta=25C, Input t,, t=6 ns) Typical Values CHARACTERISTIC SYMBOL cL - 240 241 244 UNITS pF Hc HCT HC HCcT Hc HCT Propagation Delay Data to Output teen teutt 18 8 9 3 10 8 10 _os Output Disable/Enabfe to Outputs tezw, tex, tenz, terz] 15 12 12 2 12 12 12 ns Power Dissipation Capacitance Ceo" - 38 40 4 3% 46 40 pF Cpp is used to determine the dynamic power consumption per channel. Pp=Vee"hi (Ceo + Ci) f=input frequency. CL = output load capacitance. Veo = supply voltage. SWITCHING CHARACTERISTICS (C_=50 pF, Input ,,t=6 ns) 2c -40C to +85C -55C to +125C CHARACTERISTIC SYMBOL Veco Hc HCT 74HC 74HCT S4HC S4HCT UNITS ; _ Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. Propagation Delay, tecH 2 100 _ - ~ 125 _ - | 150 _ - Data to Outputs teHL 45 _ 20 _ 22 ~~ 25 _ 28 _ 30 -_ a3 ns HC/HGCT 240 6 _ 7 _ - _ at _ _ | = - Data to Outputs . teLH 2 | 110 _ - _ 140 _ _ | 165 j- Ho/HOT241 text 45 |} 22 _ 25 _ 23 31 _ 2 _ 38 ns - }|o9}]}]-jf;af-|]-}]| 2 j-|- Data to Outputs . {PLH 2 _ 110 _ - 1490 _ - | 165 {ft- HC/HCT 244 teHL 45 |2)|e2} i} 2 } ] 31} !] 33 | | ae ns ; | 19 |/-f-jauj-]e- | 28 { Output tezH 2 _ 150 _ _- 190 _ ~ | 226 - Enable and tez., 45 _ x |'ws _ w _ 3 _ 45 | 46 ns Disable Times - toyz 6 | 6 |{- | 33 _ _ | 48 ft~ . tPLz Output 2 | 60 ~{/-/f/f;2%]]- | | 9% f- Transition Time thy 45 _ 12 | 12 _ 15 _ 15 _ 18 | 18. ns {rH 8 | 10 |- _ 13 f- | 15 f input Capacitance Cy _ 10 | 10 _ 10 _ 10 > 10 | 10 pF %State . Output _ 20 |] 2 _ 20 - 20 | 2 }] 2 pF Capacitance Co 302 -T-52-09 _ Technical Data n CD54/74HC240/241/244 i CD54/74HCT240/241/244 oO 4g76 ns IN a INPUT ii oe Re rm GND ce o ee eruoTENS Heructeso mn ' 1v mu rk nemneTsty fu a wet CONNECTED DISCONNECTED CONNECTED x HSHSESS . " THE 92C8-38517RI a 92CS -38516 A 54/74HC 4/74HCT Input Level! Voc 3V ft Switching Voltage, Vg 50% Veco 1.3 V nu Fig. 2 - Transition times and propagation delay times. OTHER (O OUTPUT RL InpuTS |O =1 TIED HIGH aerate 2 [Vcc FOR tpiz AND tpzi OR Low output Lc. GND FOR tpy4z AND tpzH ouTPuT OJ 150 oF DISABLE 92CS-35/30R2 Fig. 4 - Three-state propagation delay test circuit. HARRIS SEMICOND SECTOR 303