SCE5784 - OSRAM OPTO SEMICONDUCTORS

Lead (Pb) Free Product - RoHS Compliant

Red SCE5780

Yellow SCE5781

Super-red SCE5782

Green SCE5783

High Efficiency Green SCE5784

Soft Orange SCE5785

InGaAlP Red SCE5786

0.180" 8-Character 5 x 7 Dot Matrix

Serial Input Dot Addressable Intelligent Display® Devices

2006-01-23 1

DESCRIPTION

The SCE5780 (red), SCE5781 (yellow), SCE5782

(HER), SCE5783 (green), SCE5784 (HEG), SCE5785

(orange), and SCE5786 (I nGaAlP red) a re eight d igit, dot

addressable 5 x 7 dot matrix, serial input, Intelligent Dis-

play devices. The eight 4.57 mm ( 0.180") high digits are

packaged in a rugged, hig h quality, optically transparent,

plastic 26 pin DIP with 7.62 mm (0.3") pin spacing.

The on-board CMOS has a 280 bit RAM, one bit associ-

ated with one LED, each to generate User Defined Char-

acters.

The SCE578X is designed to work with the serial port of

most common microprocessors. Data is transferred into

the displa y throu gh the Serial Data Input ( DATA), clock ed

by the Serial Data Clock (SDCLK), and enabled by the

Load Input (LOAD).

The Clock I/O (CLK I /O) and Clock Select (CLKSEL) pi ns

off er the user the capability to supply a high speed exter-

nal multiplex clock. This feature can minimize audio

in-band interference for portable communicati on equip-

ment or eliminate the visual synchronizatio n effects f ound

in high vibration environments such as avionic equipment.

The prescaler function allo ws for a higher spee d e x ternal

multiplex clock when set to divide by 16.

FEATURES

• Eight 4.57 mm (0.180") 5 x 7 Dot Matrix

Characters in Red, Yellow, Super-red, Green, High

Efficiency Gr een , So ft Orange, or InGaAlP Red

• ROMless Serial Input, Dot Addressable Display

Ideal for User Defined Characters

• Built-in Decoders, Multiplexers and LED Drivers

• Readable from 2.5 meters (8 Feet)

• Programmable Features:

– Clear Function

– Eight Dimming Levels

– Peak Current Select

– (12.5% or Full Peak Current)

– Prescaler Function

(External Oscillator Divided by 16 or 1)

– Internal or External Clock

2006-01-23 2

SCE5780

Package Outlines Dimensions in mm (inch)

Ordering Information

Type Color of Emission Character Height

mm (inch) Ordering Code

SCE5780 red

4.57 (0.180)

Q68000A9100

SCE5781 yellow Q68000A9101

SCE5782 super-red Q68000A9102

SCE5783 green Q68000A9103

SCE5784 high efficiency green Q68000A9104

SCE5785 soft orange on request

SCE5786 InGaAlP Red Q68000A1435

IDOD5216

2.54 (0.100) 2.68 (0.105)

42.93 (1.690) max. 5.36 (0.211)

4.57 (0.180)

2.29 (0.090)

11.43 (0.450) max.

C

L

C

SCE578X Z

OSRAM YYWW V

L

C

0.51 (0.020)

0.46 (0.018) typ.

Pin 1 Pin 13

2.54 (0.100) typ.

±0.13 (0.005)

10.16 (0.400)

(Tol. non accum.)

Pin 1

Identifier

Date Code Intensity Code

0.25 (0.010)

0.3 (0.012) typ.

7.62 (0.300)

5.71 (0.225)

Pin 14

Tolerance: ±0.25 (0.010)

0213

5467

5.33 (0.210)

4.01 (0.158) typ.

Pin 1

Identifier C

L

unless otherwise specified

SCE5780

2006-01-23 3

Maximum Ratings

Parameter Symbol Value Unit

Operating temperature range1) Top – 40 … + 85 °C

Storage temperature range Tstg – 40 … + 100 °C

VCC, Logic Supply Voltage (non-operating) VCC -0.5 to + 7.0 V

Input Voltage Levels Relative to GND -0.5 to VCC +0.5 V

VLL, LED Supply Voltage (non-operating) VCOL -0.5 to + 5.5 V

Solder temperature

1.59 mm (0.063“) below seating plane, t < 5.0 s TS260 °C

Relative Humidity at 85°C 85 %

Power Dissipation at 70°C 1.7 W

Power Dissipation at 85°C 1.25 W

ESD (100 pF, 1.5 kΩ)2.0 kV

Input Current 100 mA

1) For operation at high temperatur e, see Thermal Considerations (page 10)

Optical Characteristics at 25°C

(VLL=VCC=5.0 V at 100% brightness leve l, viewing angle: X axis ± 55°, Y axis ± 65 °)

Description Symbol Values Unit

Red

SCE5780

Yellow

SCE5781

Super-red

SCE5782

Green

SCE5783

High Efficiency Green

SCE5784

Soft Orange

SCE5785

InGaAlP Red

SCE5786

Luminous Intensity (min.)

(typ.) IV37.5

90.0 75

110 75

190 75

150 120

215 120

150 375

950 µcd/dot

µcd/dot

Peak Wavelength (typ.) λpeak 660 585 630 565 568 610 645 nm

Dominant Wavelength (typ.) λdom 639 583 626 570 574 605 632 nm

Notes:

1. Dot to dot intensity matching at 100% brightness is 1.8:1.

2. Display are binned for hue at 2.0 nm intervals for yellow, green, and high efficiency green.

3. Displays within a given intensity category have an intensity matching of 1.5:1 (max.)

2006-01-23 4

SCE5780

Timing Diagram—Data Write Cycle

Timing Diagram—Instruction Cycle

Switching Specificatio ns

(over operating temperature range and VCC=4.5 V to 5.5 V)

Symbol Description Min. Units

TRC Reset Ac tive Time 600 ns

TLDS Load Setup Time 50 ns

TDS Data Setup Time 50 ns

TSDCLK Clock Period 200 ns

TSDCW Clock Width 70 ns

TLDH Load Hold Time 0ns

TDH Data Hold Time 25 ns

TWR Total Write Time 2.2 µs

TBL Time Between Loads 600 ns

Note:

TSDCW is the minimum time the SDCLK may be low or high.

The SDCLK period must be a minimum of 200 ns.

SDCLK

T

SDCW

T

DATA

LOAD

D0

DS

T

LDS

T

TDH

D7

LDH

T

LOAD

DATA

SDCLK

D0 D1 D2 D3 D4 D5 D6 D7

D0

BL

T

WR

T

OR

SCE5780

2006-01-23 5

Input/Output Circuits

The follo wing tw o figures sho w the input and outp ut resis-

tor/diode networks used for ESD protection and to elimi-

nate substrate latch-up caused by input voltage

over/under shoot.

Inputs Clock I/O

Electrical Characteristics (over operating temperature)

Parameter Min. Typ. Max. Units Conditions

VCC 4.5 5.0 5.5 V —

VLL 3.0 —5.5 V —

ICC (PWR DWN) 4) — — 100 µA VCC=VLL=5.0 V, all inputs=0 V or VCC

ILL (PWR DWN) 4) — — 50 µA —

ICC — — 2.0 mA VCC=5.0 V

ILL (20 dots/char) 1) 2) —240 345 mA VCC=VLL=5.0 V, “#” displayed in 8 digits,

brightness=100%, IP=100% at 25°C

IIL — — –10 µA VCC=5.0 V, all inpu ts=0 V

IIH — — 10 µA VCC=VIN=5.0 V (all inputs)

VIH 3.5 — — V VCC=4.5 V to 5.5 V

VIL — — 1.5 VVCC=4.5 V to 5.5 V

IOH (CLK I/O) —–8.9 —mA VCC=4.5 V, VOH=2.4 V

IOL (CLK I/O) —1.6 —mA VCC=4.5 V, VOH=0.4 V

θJC-pin —34 — °C/W —

Internal OSC Frequency 120 —347 kHz VCC=5.0 V, CLKSEL=1, Prescale= ÷1

External OSC Frequency 120 —347 kHz VCC=5.0 V, CLKSEL=0, Prescale= ÷1

External OSC Frequency with Prescale 1.92 —5.55 MHz VCC=5.0 V, CLKSEL=0, Prescale= ÷16

Mux Frequency 3) 375 768 1086 Hz —

Notes:

1) Peak current =1 .87 x ILL x ILL varies with VLL Normalized curve, Figure „ILL Variance“ (page 11).

2) Unused inputs must be tied high.

3) Mux rate=[OSC Frequency/ (64 x 7)].

4) External oscillator must be stopped during power down mode for minimum current.

IDCD5021

GND

1 k

Ω

Input

CC

V

IDCD5026

GND

1 k

Ω

Input/Output

CC

V

SCE5780

2006-01-23 6

Top View

Dot Matrix Format

Pin Assignment

Pin Function Pin Function

1CLKSEL 14 Serial Data

2VCC (Logic) 15 No connect

3VLL (LED) 16 Serial CLK

4No pin 17 No pin

5No pin 18 No pin

6No pin 19 No pin

7No pin 20 No pin

8No pin 21 No pin

9No pin 22 No pin

10 No pin 23 No pin

11 Load 24 Reset

12 GND 25 CLK I/O

13 GND 26 No connect

IDPA5120

0123

4567

IDOD5217

2.54 (0.100)

0.72 (0.028) typ.

0.57 (0.022) typ.

4.57 (0.180)

C0 C1 C2 C3 C4R0

R1

R2

R3

R4

R5

R6

Pin Definitions

Pin Function Definitions

1CLKSEL H=internal clock, L=external clock

2VCC (Logic) Logic power supply

3VLL (LED) LED power supply

4–10 No pin No pins in these positions

11 Load Low input enab les data clocking into the 8-bit

serial shift register. When Load goes high, the

contents of the 8-bit serial shift register will be

decoded.

12,13 GND Power supply ground

14 Serial Data Serial data input

15 No connect Pin has no function

16 Serial CLK For loadi ng data into th e 8-bit serial regis ter on

a low to high transition

17–23 No pin No pins in these positions

24 Reset Asynchronous input, when low will clear the

Multiple x Counte r, User RAM, and Data Regis-

ter. Control Word Register is set to 100%

brightness, maximum peak current, and oscil-

lator divided by 1. The display blanked.

25 CLK I/O Outputs master clock or input external clock for

display multiplexing.

26 No connect Pin has no function

Display Column and Row Format

C0 C1 C2 C3 C4

Row 0 11111

Row 1 00100

Row 2 00100

Row 3 00100

Row 4 00100

Row 5 00100

Row 6 00100

1=Display dot “On” /// 0=Display dot “Off”

Column Data Ranges

Row 0 00H to 1FH

Row 1 00H to 1FH

Row 2 00H to 1FH

Row 3 00H to 1FH

Row 4 00H to 1FH

Row 5 00H to 1FH

Row 6 00H to 1FH

SCE5780

2006-01-23 7

Block Diagram

Operation of the SCE578X

The SCE578X display consists of two CMOS ICs containing con-

trol logic and drivers for eight 5 x 7 characters . The first IC controls

characters 0 through 3 and the second IC controls characters 4

through 7. Th ese co m pon en ts a r e a ssem bled in a compact plasti c

package.

Individual LED dot addressability al lows the user great freedo m in

creating special characters or mini-icons.

The serial data interface p rovides a highly efficient inte r conn ecti o n

between th e d ispl ay and th e m o the r boa r d. Th e S C E57 8X re qu i res

a minimum three input l ines as compare d to fourteen for an equ i va-

lent eight character parallel input part.

The on-board C MOS IC is the ele c troni c h ea rt of the displ ay. Each

IC accepts serially formatted data, which is store d in the inte rnal

RAM. The IC accepts d ata ba sed on th e ch aracter address

selected. The fir st IC is selecte d wh en addressing ch aracters 0

through 3, the se con d IC is s electe d w h en ad dressi n g ch aracters 4

though 7, and both ICs are selected when the Control Word is

addressed.

Asynchronously the RAM is read by the character multiplexer at a

strobe rate that results in a flicker free display. The Block Diagram

shows the thre e functional area s of the IC. The se include: the inpu t

serial data register and control logic, a 140 bit two po rt RAM, and

an internal multiplexer/display driver. The second IC is identical

except characters 4 though 7 are driven.

The following explains how to format the serial data to be loaded

into the display. The user supplies a string of bit mapped decoded

characters. The contents of this string is shown in Figure „Loading

Serial Character Data“ a (page 8). Figure „Loading Serial Charac-

ter Data“ b (page 8) show s that each character consist of eight 8

bit words. The first word encodes the displa y character location and

the succeeding seven b ytes are row data. The row data represents

the status (On, Off) of individual column LEDs. Figure „Loading

Serial Character Data“ c (page 8) shows that each 8 bit w ord is f or-

matted to represent Character Address, or Column Data.

Figure „Loading Serial Character Data“ d (page 8) shows the

sequence for loading the bytes of data. Bringing the LOAD line low

enables the serial register to accept data. The shift action occurs

on the low to high transition of the serial data clock (SDCLK). The

least significa nt bi t (D 0 ) is loaded first. After eight clock pulses the

LOAD line is brought high. With this transition the OPCODE is

decoded. The decoded OPCODE directs D4–D0 to be latched in

the Characte r Address regis ter, stored in the RAM as Column

data, or latched in the Control Word register. The control IC

requires a minimum 600 ns delay between successive byte loads.

As indicated in Figure „Loading Serial Character Data“ a (page 8),

a total of 512 bits of data are required to load all eight characters

into the display.

The Character Address Register selects the character address that

the row and column data will be written to. See Table „Load Char-

acter Adress“ (page 9) for opcode an d chara cter ad dress ing. Af ter

loading the Character Address Register, the next seven bytes load

the column data, one row at a time, starting with row 0 (top row)

and ending with row 6 (bottom row). Each character address has a

7 x 5 bit User RAM formatted as seven rows, each containing five

IDBD5071

LOAD

SDATA

SD CLK

Register

Data

140 bit RAM

Read 7 x 20

Write 28 x 5

Y Address Decode

0 1 2 3

X Address Decode

3-bit Address

Register

6-bit Control

Word Register

Control Word Logic

Column

Digits

Drivers

0 to 3

Counter Chain

& Timing Logic

RESET

Oscillator

CLKSEL

CLK I/O

4 - 5 x 7

Characters

4 - 5 x 7

Characters

4567

VDIM Controls

Display Multiplexer

& Driver

Row Decoder

MUX

Rate

The second IC has the same

IC 2 controls characters 4 to 7

Function diagram as IC 1

Serial

IC 1

IC 2

SCE5780

2006-01-23 8

column data bits. The three most significant bits, D7–D5 represent

the opcode for the row data and the least significant five bits, D4–

D0 represent the column dat a. See Table „Load Column Data“

(page 9) for the column data format. If an address is loaded before

all seven rows are written, the next column data will be loaded into

Row 0 of the new address. The remaining rows of the old address

are not changed.

Table Charcater „D“ (page 8) shows the Row Address for the

example character, “D.” Column data is written and read asynchro-

nously from the 280 bit RAM. Once loaded, the internal oscillator

and character multiplexer reads the data from the RAM. These

characters are row strobed with column data as shown in Figur es

„Row and Column Locations for a Character ’D’“ (page 9) and

„Row Strobing“ (page 10). The character strobe rate is determined

by the internal or user supplied external MUX Clock and the

ICs ÷ 32 0 counter.

Loading Serial Character Data

Character „D“

Row Op code

D 7 D 6 D 5 Column Data

D4 D3 D2 D1 D0

C0 C1 C2 C3 C4

Hex

000 0 11 1 1 01E

100 0 10 0 0 111

200 0 10 0 0 111

300 0 10 0 0 111

400 0 10 0 0 111

500 0 10 0 0 111

600 0 11 1 1 01E

Character 0 Character 1 Character 2 Character 3 Character 4 Character 5 Character 6 Character 7

Example: Serial Clock=5.0 MHz, Clock Period=200 ns

Time between LOADS

LOAD

Serial

Clock

DATA

Clock

Period

t0

D0 D1 D2 D3 D4 D5 D6 D7

11 Clock Cycles, 2.2 µs

Time

Between

Loads

600 ns(min)

Character Address OPCODEOPCODE Column Data

D0

D D1

D D2

D D3

D D4

D

11 Clock Cycles, 2.2 µs

Character 0

Address Row 0 Column

Data

88 Clock Cycles, 17.6 µs

704 Clock Cycles, 140.8 µs

Row 1 Column

Data Row 2 Column

Data Row 3 Column

Data Row 4 Column

Data

D0

0 D1

0 D2

0 D3

0 D4

0 D5

1 D6

0 D7

1

a.

b.

c.

d.

Row 5 Column

Data Row 6 Column

Data

D5

0D6

0 D7

0

Time

Between

Loads

600 ns(min)

OPCODE

SCE5780

2006-01-23 9

The user can activate four Control functions. These include: LED

Brightness Level, IC Power Down, Prescaler, or Display Clear.

OPCODEs and six bit words are used to initiate these functions.

The OPCODEs and Control Words for the Character Address and

Loading Column Data are shown in Tables „Load Character

Address“ and „Load Column Data“.

The user can select eight specific LED brightness levels, Tables

„Display Brightness“. Depending on how D3 is selected either one

(1) for maximum peak current or zero (0) for 12.5% of maximum

peak current in the con trol wo rd per Table „ Displa y Brig htness“, the

user can select 16 specific LED brightness levels. These bright-

ness levels (in percentages of full brightness of the display)

depending on how the user selects D3 can be one (1) or zero (0)

are as fo llows: 100% ( E0HEX or E8HEX), 53% (E1HEX or E9HEX), 40%

(E2HEX or EAHEX), 27% (E3HEX or EBHEX), 20% (E4HEX or ECHEX),

13% (E5HEX or EDHEX), and 6.6% (E6HEX or EEHEX), 0.0% (E7HEX or

EFHEX). The brightness levels are controlled by changing the duty

factor of the row strobe pulse.

The SCE578X offers a unique Display Power Down feature which

reduces ICC to less than 150 mA total. When EFHEX is loaded

(Table „Po wer Down“) the display is set to 0% brightness. When in

the Power Down mode data may still be written into the RAM. The

display is reactivated by loading a new brightness Level Control

Word into the display.

Row and Column Locations for a Character “D”

Load Character Address

Op code

D7 D6 D5 Character Address

D4 D3 D2 D1 D0 Hex Operation

Load

101 00000A0 Character 0

101 00001A1 Character 1

101 00010A2 Character 2

101 00011A3 Character 3

101 00100A4 Character 4

101 00101A5 Character 5

101 00110A6 Character 6

101 00111A7 Character 7

Load Column Data

Op code

D7 D6 D5 Column Data

D4 D3 D2 D1 D0 Operation

Load

000 C0 C1 C2 C3 C4 Row 0

000 C0 C1 C2 C3 C4 Row 1

000 C0 C1 C2 C3 C4 Row 2

000 C0 C1 C2 C3 C4 Row 3

000 C0 C1 C2 C3 C4 Row 4

000 C0 C1 C2 C3 C4 Row 5

000 C0 C1 C2 C3 C4 Row 6

Display Brightness

Op code

D7 D6 D5 Control Word

D4 D3 D2 D1 D0 Hex Operation

Level

111 00000E0 100%

111 00001E1 53%

111 00010E2 40%

111 00011E3 27%

111 00100E4 20%

111 00101E5 13%

111 00110E6 6.6%

111 00111E7 0.0%

Display Brightness

Op code

D7 D6 D5 Control Word

D4 D3 D2 D1 D0 Hex Operation

Level

111 01000E8 100%

111 01001E9 53%

111 01010EA 40%

111 01011EB 27%

111 01100EC 20%

111 01101ED 13%

111 01110EE 6.6%

111 01111EF 0.0%

Power Down

Op code

D7 D6 D5 Control Word

D4 D3 D2 D1 D0 Hex Operation

Level

111 01111EF 0%

brightness

IDXX5191

Row 2

Row 3

Row 4

Row 5

Row 6 01234

Previously "on" LED

On LED

Off LED

Columns

Row 0

Row 1

SCE5780

2006-01-23 10

Row Strobing

The SCE578X allows a high f req uen cy exter na l osc ill ator so ur ce

to drive the display. Data bit, D4, in the control word format con-

trols the prescaler function. The pr escale r all ows the oscillator

source to be divided by 16 by setting D4=1. However, the pres-

caler should not be used, i.e., when using the internal oscillator

source.

The Software Clear (C0HEX), given in Table „Software Clear“,

clears the Address Register and the RAM. The display is blanked

and the Char acter Address Reg ister will be se t to Chara cter 0. The

internal counter and the Control Word Register are unaffected.

The Software Clear will remain activ e until the next d ata input cycle

is initiated.

Multiplexer and Displ ay Driver

The eight characters are row multiplexed with RAM resident col-

umn data. The stro be ra te is estab lish ed b y the in ternal or e xternal

MUX Clock rate. The MUX Clock frequency is divided by a 320

counter chain. This results in a typical strobe rate of 768 Hz. By

pulling the Cl ock SEL l ine low, the displa y can be operate d from an

external MUX Cloc k. The e xte rnal cloc k is a tta che d to the CL K I /O

connection.

An asynchronous hardware Reset (pin 24) is also provided. Bring-

ing this pin low will clear the Character Address Register, Control

Wor d Register , RAM, and blanks t he displa y. This action lea ves t he

displa y set at Char acter Address 0, and the Bright ness Le v el set at

100%, prescaler ÷1.

Electrical and Mechanical Considerations

Thermal Considerations

The display’s power usag e may n eed to be reduced t o o pe ra t e at

high ambient temperatures. The power may be reduced by lower-

ing the brightness level, reducing the total number of LEDs illumi-

nated, or lowering VLED. The VCC supply, relative to the VLED

supply, has little effect on the power dissi pation of the displa y and

is not considered when determining the power dissipation.

To determine the power deration with a given ambient tempera-

ture, use the following formula:

where: Tjmax=maximum IC junction temperature

PD=power dissipated by the ICs

θja=thermal resistance, junction to ambient

To determine the pow er dis sipation of the displa y, use the follo wing

formula:

where: N=number of LEDs on

ILL/140=average current for a single LED

RB=relative brightness level

A typical thermal resistance value (θja) for this display is 50 °C/W

when mounted in a socket solde re d on a 1.57 mm (0 .06 2" ) thic k

PCB with 0.5 mm (0.020"), 1 ounce copper traces and the display

covered by a plastic filter. The display’s maximum IC junction tem-

perature i s 125°C . Power Deration Curve is ba sed on these typ ical

values.

Power Deration Curve (θja=50°C/W)

VCC and VLL are two separate power supplies sharing a common

ground. VCC supplies power for all the display logic. VLL supplies

the power for the LEDs. By separating the two supplies, VCC and

VLL can be varied independently and keeps the logic supply clean.

0

4

5

6

Columns

1234

Load

Row Load Row 0

1

2

3

0

Columns

01234 Columns

01234

Load Row 1 Load Row 2 Load Row 5

Columns

012340

Columns

1234 01

Load Row 4Load Row 3

Columns

IDXX5192

234 01234

Load Row 6

6

5

3

4

2

0

1

6

5

3

4

2

0

1

6

5

3

4

2

0

1

6

5

3

4

2

0

1

6

5

3

4

2

0

1

6

5

3

4

2

0

1

Software Clear

Op code

D7 D6 Control Word

D5 D4 D3 D2 D1 D0 Hex Operation

11 000000 C0 CLEAR

Tjmax TAPDθja

⋅+=

PD N ILL 140 RB⋅⁄⋅=

IDDG5333

-40

0

P

W

-20 0 20 40 60 ˚C 100

0.5

1.0

1.5

2.0

2.5

T

SCE5780

2006-01-23 11

VLL can be varied between 3.0 V and 5.5 V. The LED drive cur-

rent will vary with changes in VLL. See Figure „ILL varianc e“:

ILL Variance

VCC can vary between 4.5 V and 5.5 V. Operation below 4.5 V will

change the timing and switching levels of the inputs.

Interconnect Considerations

Optimum product performance can be had when the following

electrical and mechanical recommendations are adopted. The

SCE578X’s IC is constructed in a high speed CMOS process; con-

sequent l y high speed noise on the SERIAL DATA, SERIAL DATA

CLOCK, LOAD and RESET lines may cause incorrect data to be

written into the serial shift register. Adhere to transmission line ter-

mination procedures when using fast line drivers and long cables

(> 10 cm).

Good ground and power supply decoup ling will insure th at

ICC (< 800 mA peak) switching currents do not generate localized

ground bounce. Therefore it is recommended that each display

package use a 0.1 µF and 20 µF tantulum capacitor between VCC

and ground.

When the internal MUX Clock is being used connect the CLKSEL

pin to VCC. In those applications where RESET will not be con-

nected to the system’s reset control, it is recommended that this

pin be connect ed to the center no de of a se ries 0.1 µF a nd 100 kΩ

RC network. Thus upon initi al power up the RESET will be held

low for 10 ms allowing adequate time for the system power supply

to stabilize.

ESD Protection

The input protection structure of th e SCE578X pro vides signi ficant

protection against ESD damage. It is capable of withstanding dis-

charges greater than 2.0 kV. Take all the stan dard precautions,

normal for CMOS components. These include properly grounding

personnel, tools, tables, and transport carriers that come in con-

tact with unshi elded parts. If these condi tions are not, or cannot be

met, keep the leads of the device shorted together or the parts in

antistatic pac kaging.

Soldering Considerations

The SCE578X can be hand soldered with SN63 solder using a

grounded iron set to 260°C.

Wave soldering is also possible following these conditions: Pre-

heat that does n ot e xceed 93°C on the sol der side of th e PC bo ard

or a package surface temperature of 85°C. Water soluble organic

acid flux (except carboxylic acid) or resin-based RMA flux without

alcohol can be used.

Wa ve temperature of 245°C ± 5°C with a dwell between 1.5 sec.

to 3.0 sec. Exposure to the wave should not exceed tempera-

tures above 260°C for five seconds at 1.59 mm (0.063") below

the seating plane. The packages should not be immersed in the

wave.

Post Solder Cleaning Procedures

The least offensive cleaning solution is hot D.I. water (60°C) for

less than 15 minutes. Addition of mild saponifiers is acceptable. Do

not use commercial dishwasher detergents.

For faster cleaning, solvents may be used. Exercise care in choos-

ing solvents as some may chemically attack the nylon package.

For further information refer to Appnotes 18 and 19.

An alternative to soldering and cleaning the display modules is to

use sockets. Naturally, 14 pin DIP sockets 7.62 mm (0.300") wide

with 2.54 mm (0.100") centers work well for single displays. Multi-

ple display assemblies are best handled by longer SIP sockets or

DIP sock ets whe n av ailab le f or uni fo rm package al ignment. So ck et

manufacturers are A ries Elec tronics, Inc., Frenchtown, NJ; Garry

Manufacturing, New Brunswick, NJ; Robinson-Nugent, New

Albany, IN; and Samtec Electronic Hardward, New Albany, IN.

For further information refer to Appnote 22.

Optical Considerations

The 4.57 m m (0 .180" ) high cha rac ter o f the SC E578 X gi v es read -

ability up to five feet. Proper filter selection enhances readability

over this distance.

Using filters emphasizes the contrast ratio between a lit LED and

the character background. This will increase the discrimination of

different characters. The only limitation is cost. Take into consider-

ation the ambient lighting environment for the best cost/benefit

ratio for filters.

Incandescent (wit h almost no g reen) or fluorescent (w ith almost no

red) lights do not have the flat spectral response of sunlight. Plas-

tic band-pass filter s are an in expen sive and effect ive way to

strengthen contrast ratios. The SCE5780 is a red display and

should be used with long wavelength pass filter having a sharp

cut-off in the 600 nm to 620 nm range. The SCE5782 is a

super-red display and should be used with long wavelength pass

filter having a sharp cut-off in the 570 nm to 600 nm range. The

SCE5784 is a high efficiency green display and should be u sed

with long wavelength pass filter that peaks at 565 nm. The

SCE5785 is a soft orange display and should be used with long

wavelength pass filter that peaks at 610 nm. The SCE5786 is an

InGaAlP red display and should be used wit h long wavelength

pass filter that peaks at 645 nm.

Additional contrast enhancement is gained by shading the dis-

plays. Plastic band-pass filters with built-in louvers offer the next

step up in contrast improvement. Plastic filters can be improved

further with anti-refle ctive coatings to re duce glare . The trad e-off is

fuzzy characters. Mounting the filters close to the display reduces

this effect. Take care not to overheat the plastic filter by allowing f or

proper air flow.

Optimal filter enhancements are gained by using circular polar-

IDDG5334

3

0

LL

V

LL

I

3.5 4 4.5 5 V 5.5

0.2

0.4

0.6

0.8

1.0

1.2

1.4

A

SCE5780

2006-01-23 12

ized, anti-re flec ti ve, band-pas s f ilter s. The c ircu lar po larizing fu r-

ther enhances contrast by reducing the light that travels through

the filter and reflects back off the display to less than 1.0%.

Seve ral filter manufacturers supply quality filter materials. Some of

them are: Panelgraphic Corporation, W. Caldwell, NJ; SGL Homa-

lite, Wilmington, DE; 3M Company, Visual Products Division, St.

Paul, MN; Polaroid Corporation, St. Paul, MN; Polaroid Corpora-

tion, Polarizer Division, Cambridge, MA; Marks Polarized Corpora-

tion, Deer Park, NY, Hoya Optics, Inc., Fremont, CA.

One last note on mounting filters: recessing displays and bezel

assemblies is an inexpensive way to provide a shading effect in

overhead lighting sit uat io ns. Several Bezel manufacturers are :

R.M.F. Products, Batavia, IL; Nobex Components, Griffith Plastic

Corp., Burlingame, CA; Photo Chem ical Produ cts of Californi a,

Santa Monica, CA; I.E.E.-Atlas, Van Nuys, CA.

Microprocessor Interface

The microproces sor interface is through the serial po rt, SPI port or

one out of ei ght d ata b its on the eight b it pa r allel p ort and also con-

trol lines SDCLK and LOAD.

Power Up Sequence

Upon power up display will come on at random. Thus the display

should be reset at power-up. The reset will set the Address Regis-

ter to Digit 0, User RAM is se t to 0 (displa y blank) t he Contro l W ord

is set to 0 (100% brightness) and the internal counters are reset.

Loading Data into the Display

Use following procedure to load data into the display:

1. Power up the display.

2. Bring RST low (600 ns duration minimum) to clear the Multi-

plex C oun ter, Address Register, Control Word Reg i ster, User

Ram and Data Register. The display will be blank. Display

brigh tness is set to 100%.

3. If a different brightness is desired, load the proper brightness

opcode into the Control Word Register.

4. Load the Digit Address into the display.

5. Load display row and column data for the selected digit.

6. Repeat steps 4 and 5 for all digits.

Data Contents for the Word „ABCDEFGH“

Step D7 D6 D5 D4 D3 D2 D1 D0 Function

A

B 1 1 0

1 1 1 0000 0

0000 0 CLEAR

100% BRIGHT-

NESS

1

2

3

4

5

6

7

8

1 0 1

0 0 0

0000 0

00100

0101 0

1000 1

1111 1

10001

1000 1

DIGIT D0 SELECT

ROW 0 (A)

ROW 1 (A)

ROW 2 (A)

ROW 3 (A)

ROW 4 (A)

ROW 5 (A)

ROW 6 (A)

9

10

11

12

13

14

15

16

1 0 1

0 0 0

00001

11111

10001

1000 1

1111 0

1000 1

1111 1

DIGIT D1 SELECT

ROW 0 (B)

ROW 1 (B)

ROW 2 (B)

ROW 3 (B)

ROW 4 (B)

ROW 5 (B)

ROW 6 (B)

17

18

19

20

21

22

23

24

1 0 1

0 0 0

0001 0

00111

01000

1000 0

10000

0100 0

0011 1

DIGIT D2 SELECT

ROW 0 (C)

ROW 1 (C)

ROW 2 (C)

ROW 3 (C)

ROW 4 (C)

ROW 5 (C)

ROW 6 (C)

25

26

27

28

29

30

31

32

1 0 1

0 0 0

00011

1111 0

1000 1

10001

1000 1

10001

11110

DIGIT D3 SELECT

ROW 0 (D)

ROW 1 (D)

ROW 2 (D)

ROW 3 (D)

ROW 4 (D)

ROW 5 (D)

ROW 6 (D)

33

34

35

36

37

38

39

40

1 0 1

0 0 0

00100

1111 1

1000 0

10000

1111 0

1000 0

10000

11111

DIGIT D4 SELECT

ROW 0 (E)

ROW 1 (E)

ROW 2 (E)

ROW 3 (E)

ROW 4 (E)

ROW 5 (E)

ROW 6 (E)

41

42

43

44

45

46

47

48

1 0 1

0 0 0

00101

1111 1

1000 0

10000

1111 0

1000 0

10000

DIGIT D5 SELECT

ROW 0 (F)

ROW 1 (F)

ROW 2 (F)

ROW 3 (F)

ROW 4 (F)

ROW 5 (F)

ROW 6 (F)

49

50

51

52

53

54

55

56

1 0 1

0 0 0

00110

0111 0

1000 1

10000

1000 0

1001 1

10001

01110

DIGIT D6 SELECT

ROW 0 (G)

ROW 1 (G)

ROW 2 (G)

ROW 3 (G)

ROW 4 (G)

ROW 5 (G)

ROW 6 (G)

57

58

59

60

61

62

63

1 0 1

0 0 0

00111

1000 1

10001

1111 1

1000 1

10001

DIGIT D7 SELECT

ROW 0 (H)

ROW 1 (H)

ROW 2 (H)

ROW 3 (H)

ROW 4 (H)

ROW 5 (H)

ROW 6 (H)

SCE5780

2006-01-23 13

Display Interface to Siemens/Intel 8031

Microprocessor (using serial port in mode 0)

Display Interface to Siemens/Intel 8031

Microprocessor (using one bit of parallel port as serial

port)

Display Interface with Motoro la 68HC05C4

Microprocessor (using SPI port)

Cascading Multiple Displays

Multiple displays can be cascaded using the CLKSEL and C LK I/O

pins (Figure „Ca scading Mult iple Displa y “). The displa y desi gnated

as the MasterClock source should have its CLKSEL pin tied high

and the sla ve s should h av e thei r CLKSEL pins tied lo w . All CLK I/O

pins should be tied together. One display CLK I/O can drive 15

slave CLK I/Os. Use RST to synchronize all display counters.

IDCD5227

XTAL2 RxD

18 10

19 XTAL1

RST

917

P3.7

13

P3.3

P3.4 14

8031

U1

TxD 11 SDCLK

RST

LD

GND CLKSEL

CLK I/O

CC

V

DATA

GND

CC

V

40

ID

+

0.01 µF

TAN

22 µF

CC

V

CC

IDCD5228

XTAL2 P3.0

18 10

19 XTAL1

RST

1

8031

U1 SDCLK

RST

LD

GND CLKSEL

CLK I/O

CC

V

DATA

GND

CC

V

40

ID

+

0.01 µF

TAN

22 µF

CC

V

CC

P1.0

9

20

P3.1 11

P3.6 16

P0.0 39

IDCD5229

OSC1 PA0

38 11

39 OSC2

RST

1

68HC05C4

U1 SDCLK

RST

LD

GND CS

CLK I/O

CC

V

DATA

GND

CC

V

40

ID

+

0.01 µF

TAN

22 µF

CC

V

CC

PA2

9

20

PA1 10

SCLK 33

MOSI 32

IDCD5030

RST CLK SEL

Intelligent Display

CC

V

DATA SDCLK LOAD

14 more displays

in between

DATA

SDCLK

Decoder

Address Address Decode 1-14

A0

A1

A3

RST

CLK I/O

Intelligent Display

DATA

RST

SDCLK

CLK I/O

LOAD

CLK SEL

Chip

0

15

A2

LD CE

2006-01-23 14

SCE5780

Character Set

IDCS5095

CODE

HEX

0E

06

0E

1E

02

06

0E

04

14

04

00

01

00

11

19

11

0E

13

15

0E

11

17

10

0E

17

15

0E

11

10

11

1E

0C

00

08

04

0C

00

19

16

10

1E

11

00

HEX

CODE

11

0E

08

04

00

04

15

0E

04

0E

04

00

04

0E

04

0C

0E

11

1F

11

15

12

0D

11

0E

12

0D

12

00

0E

00

01

13

0D

0F

11

00

HEX

CODE HEX

CODE

11

0A

11

0A

04

00

1F

11

1B

0A

11

0E

11

19

11

13

15

00

1F

0E

11

1F

00

04

00

0A

1F

0A

1F

0A

01

06

1F

10

08

11

0E

01

0E

11

01

11

0E

11

1E

11

1E

10

0E

11

10

11

0E

11

1E

11

12

14

11

1E

10

0E

11

01

11

0E

10

16

1E

11

19

10

0B

0C

08

00

0E

10

0E

11

10

00

0E

10

1E

01

0E

00

1C

08

04

0A

08

11

0D

13

11

00

0E

11

0E

10

1E

00

01

0D

0F

11

13

01

04

1F

11

0E

11

1E

11

1E

10

1E

1F

10

1F

0A

12

02

1F

06

02

1E

01

1E

01

10

1F

14

0E

04

1E

05

0F

04

02

04

03

13

08

19

18

0E

12

0D

12

00

04

0E

11

1F

00

0A

0D

12

0D

12

00

16

19

11

00

1F

12

16

10

16

11

12

0C

0E

12

0D

12

00

0A

04

0E

11

08

06

11

0E

11

0E

0A

14

08

0D

12

15

14

08

04

08

00

0C

10

1E

0E

11

08

06

02

04

08

01

1F

10

1E

10

1F

10

0E

11

13

11

0E

11

0A

04

0A

11

15

11

1B

15

11

08

1C

08

0A

04

0F

11

06

01

0F

00

11

04

0A

11

00

11

0A

15

00

11

1F

0A

00

04

00

02

01

12

10

12

1C

00

11

0E

11

1F

11

0E

11

0A

10

04

08

00

0E

10

09

00

09

00

0A

01

1A

0E

00

11

0E

11

00

11

0E

0A

11

0E

11

00

11

0A

11

0E

11

0A

11

00

04

00

02

04

1F

02

00

18

08

0F

08

00

1E

12

08

04

0C

12

0C

12

00

12

0F

00

08

1F

04

08

02

04

1F

08

1F

08

09

1C

08

06

04

0E

0A

04

11

04

02

04

02

04

08

04

08

0A

00

04

0A

1F

04

00

04

00

04

1F

04

00

08

10

18

00

18

00

1F

00

0C

00

10

00

08

01

04

02

00

11

0E

11

0E

11

0E

02

0C

01

11

0F

11

0E

0C

00

0C

00

0C

00

04

08

0C

00

0C

02

01

04

02

08

04

01

00

1F

00

1F

00

08

10

04

08

02

04

10

00

04

11

02

01

0E

11

1F

11

04

07

04

07

11

0E

01

12

11

14

12

18

14

11

10

1F

10

11

1B

15

11

13

11

15

19

11

0E

11

0E

11

0A

11

04

0A

11

04

11

04

0A

11

08

1F

10

02

04

1F

01

04

07

04

07

04

02

00

01

08

04

00

10

04

1C

04

1C

04

15

04

0E

00

1F

00

11

16

19

10

04

11

0A

11

0A

00

04

0E

04

00

0C

00

04

08

04

11

0A

00

02

0C

12

06

02

00

04

1F

08

1F

02

00

18

12

14

12

14

10

04

02

04

08

02

04

0E

04

0C

04

00

04

11

0A

15

00

04

08

04

02

08

04

11

16

19

00

11

0E

11

0E

11

00

02

00

08

05

00

0A

15

0A

15

0A

15

SCE5780

2006-01-23 15

Published by

OSRAM Opto Semiconductors GmbH

Wernerwerkstrasse 2, D-93049 Regensburg

www.osram-os.com

Attention please!

The information describes the type of component and shall not be considered as assured characteristics.

Terms of delivery and rights to change design reserved. Due to technical requirements components may contain

dangerous substances. For information on the types in question please contact our Sales Organization.

If printed or downloaded, please find the late st version in the Inter net.

Packing

Please use the recycling operators known to you. We can also help you – get in touch with your nearest sales office.

By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing

material that is retu rned to us unsorted or which we are not obliged to a ccept, we shall have t o invoice you for any costs

incurred.

Components used in life-support devices or systems must be expressly authorized for such purpose! Critical

components1) may only be used in life-support devices or systems2) with the express written approval of OSRAM OS.

1) A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the

failure of that life-support device or system, or to affect its safety or the effectiveness of that device or system.

2) Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain

human life. If they fail, it is reasonable to assume that the health and the life of the user may be endangered.

Revision History: 2006-01-23

Previous Version: 2005-01-10

Page Subjects (major changes since last revision) Date of change

all Lead free device 2006-01-23