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QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE
OCTOBER 2001
2001 Integrated Device Technology, Inc. DSC - 5848/1c
QS532807
INDUSTRIAL TEMPERATURE RANGE
GUARANTEED LOW SKEW
CMOS CLOCK
DRIVER/BUFFER
FUNCTIONAL BLOCK DIAGRAM
IN
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
DESCRIPTION:
The QS532807 clock driver/buffer circuit can be used for clock
buffering schemes where low skew is a key parameter. The QS532807
offers ten non-inverting outputs. Designed in IDT's proprietary QCMOS
process, these devices provide low propagation delay buffering with
less than 0.5ns on-chip skew. The QS532807 has on-chip series
termination resistors for lower noise clock signals. The QS532807 series
resistor version is recommended for driving unterminated lines with
capacitive loading and other noise sensitive clock distribution circuits.
These clock buffer products are designed for use in high-performance
workstations, embedded and personal computing systems. Several
devices can be used in parallel or scattered throughout a system for
guaranteed low skew, system-wide clock distribution networks.
FEATURES:
− JEDEC compatible LVTTL level
− 10 low skew clock outputs
− Clock input is 5V tolerant
− Pinout and function compatible with QS5807
− 25Ω on-chip resistors available for low noise
− Input hysteresis for b e tter noise margin
− Guaranteed low skew < 0.5ns (max.) between outputs:
− Available in QSOP and SOIC packages
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INDUSTRIAL TEMPERATURE RANGE
QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
PIN CONFIGURATION
QSOP/ SOIC
TOP VIEW
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
IN
GND
O1
GND
VCC
GND
GND
GND
O2
O3
O4
O5
O6
O7
O8
O9
O10
VCC
VCC
VCC
SO20-2
SO20-8
ABSOLUTE MAXIMUM RATINGS (1)
Symbol Description Max. Unit
VTERM(2) Supply Voltage to Ground – 0.5 to +4.6 V
DC Output Voltage VOUT – 0.5 to VCC+0.5 V
V
TERM(3) DC Input Voltage VIN – 0.5 to +7 V
VAC AC Input Voltage (pulse width ≤20ns) -3 V
IOUT DC Output Current VIN < 0 -20 mA
DC Output Current Max. Sink Current/Pin 120 mA
TSTG Storage Temperature – 65 to +150 °C
TJJunction Temperature 150 °C
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any ot her conditi ons above thos e indica ted in the operat ional secti ons
of this specification is not implied. Exposure to absolute maximum
rating conditions f or extended periods may affec t reliability.
2. Vc c Terminals.
3. All terminals except V cc.
CAPACITANCE (TA = +25OC, f = 1.0MHz , VIN = 0V)
QSOP SOIC
Pins Typ. Max. (1) Typ. Max. (1) Unit
CIN 3657pF
NOTE:
1. This param eter is guar anteed but not producti on tested.
PIN DESCRIPTION
Pin Names I/O Description
IN I Clock Input
Ox O Clock Outputs
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QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Followi ng Conditions Apply Unless Otherwise Specifi ed:
Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
Symbol Parameter Test Conditions Min. Typ.(1) Max. Unit
VIH I nput HIGH Voltage Guaranteed Logic HIGH for All Inputs 2 1.7 5.5 V
VIL I nput LOW Voltage Guaranteed Logic LOW for All Inputs –0.5 — 0.8 V
VIC Clamp Di ode Volt age (3) Vcc = Min., IIN = -18mA — –0.7 –1.2 V
VOH Output HIGH Voltage Vcc = Min., IOH = -100µA Vcc - 0.2 — — V
Vcc = Min., IOH = -8mA 2.4 — —
Vcc = Min., IOL = 100µA——0.2
V
OL Output LOW Voltage Vc c = Min., IOL = 6mA — — 0.4 V
Vcc = Min., IOL = 8mA — — 0.5
IIN Input Leakage Current Vc c = Max., VIN = V CC or GND — — ±1 µA
IOFF Input Power Off Leak age Vc c = 0V, VIN = V CC or GND — — ±1 µA
IOS Short Ci rcuit Current (2,3) Vcc = Max., VOUT = GND –60 –195 —mA
I
ODH Output HIGH Current Vc c = 3.3V, VIN = VIH or VIL, VO = 1.5V –50 –80 –200 mA
IODL Output LOW Current Vc c = 3.3V, VIN = VIH or VIL, VO = 1.5V 50 112 200 mA
∆VTI nput Hysteresis VTLH - VTHL for All Inputs — 0.2 — V
ROUT Output Res istance (4) Vcc = Min., IOL = 12mA — 28 — Ω
NOTES:
1. Typical values are at VCC = 3.3V, TA = 25°C.
2. Not more than one output should be used to test this high power condition. Duration is less than one second.
3. Guaranteed by design but not tested.
4. Output resistance represents the total output impedance of the logic device and includes added series termination resistance.
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions Typ. (2) Max. Unit
ICC Quiescent Power Supply Current VCC = Max., VIN = GND or Vcc 0.01 100 µA
∆ICC Supply Current per Input HIGH VCC = Max., VIN = 3V
Input toggling at 50% dut y cycle 0.1 30 µA
ICCD Dynami c Power Supply Current per Output (1) VCC = Max., outputs Enabled 60 90 µA/MHz
ICTotal Power Sup ply Current Examples (1,3) VCC = Max.,
Input at 50% dut y cycle
fI = 10MHz
VIN = GND or Vcc 6 10 mA
VCC = Max.,
Input at 50% dut y cycle
fI = 2.5MHz
VIN = GND or Vcc 1.5 3
NOTES:
1. Guaranteed by design but not tested. CL = 0pF.
2. Typical values are for reference only. Conditions are VCC = 3.3V, TA = 25°C.
3. IC = ICC + (∆ICC)(DH)(NT) + ICCD (fO)(NO)
where:
DH = Input Duty Cycle
NT = Number of TTL HIGH inputs at DH (one)
fO = Output Frequency
NO = Number of outputs at fO (ten)
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INDUSTRIAL TEMPERATURE RANGE
QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
CLOAD = 50pF (no resistor)
Symbol Parameter (1) Min. Max. Unit
tSK(01) Skew between all outputs, same transition — 0.5 ns
tSK(P) Pulse Skew; skew between opposite transitions of the same output (tPHL - tPLH)— 0.5 ns
tSK(T) Part-to-part skew (2) —1ns
tPLH
tPHL Propagation Delay (3)
IN to Ox 1.5 5.2 ns
tROutput Rise Time, 0.8V to 2V — 2 ns
tFOutput Fall Time, 2V to 0.8V — 2 ns
NOTES:
1. Sk ew param eters are guaranteed acros s temperature range, but not tested.
2. tSK(T) only appli es to devices of the same transition, part type, t em perature, power supply v ol tage, loading, and pac kage.
3. The propagation del ay range indicated by Min. and Max. s pecificat i ons results from process and environmental vari abl es. These propagat i on del ays
do not imply limit s kew.
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QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE
50pF
VIN
Pulse
Generator DUT
50Ω
VCC
VOUT
Pulse g e n erator for a ll p u lse s: f ≤ 1.0MH z ; tF ≤ 2.5ns; tR ≤ 2.5ns
INPUT
PART 1 OUTP U T
PART 2 OUTP U T
tPLH1 tPHL1
tPLH2 tPHL2
tSK(t)
tSK(t)
1.5V
3V
0V
VOH
1.5V
1.5V
VOH
VOL
VOL
tSK(t) = tPLH2 - tPLH1 or tPHL2 - tPHL1
INPUT
OUTPUT 2V
0.8V
1.5V
3V
0V
VOH
1.5V
VOL
tPLH tPHL
tRtF
INPUT
OUTPUT
tPLH tPHL
1.5V
3V
0V
VOH
1.5V
VOL
tSK(p) = tPHL - tPLHL
INPUT
OUTPUT 1
tPLH1
1.5V
3V
0V
VOH
1.5V
1.5V
VOH
VOL
VOL
OUTPUT 2
tPHL1
tSK(01) tSK(01)
tPLH2 tPHL2
tSK(01) = tPLH2 - tPLH1 or tPHL2 - tPHL1
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY PULSE SKEW — tSK(P)
OUTPUT SKEW — tSK(O1) PART-TO-PART SKEW — tSK(T)
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INDUSTRIAL TEMPERATURE RANGE
QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
ORDERING INFORMATION
XXXX
Device Type X
Package
SO
Q
532807 Guaranteed Low Skew CMOS Clock Driver/Buffer
QS
Small Outline IC (300 mil) (SO20-2)
Quarter-size Small Outlin e Package (SO20-8)
CORPORATE HEADQUARTERS for SALES: for Tech Support:
2975 Stender Way 800-345-7015 or 408-727-6116 logichelp@idt.com
Santa Clara, CA 95054 fax: 408-492-8674 (408) 654-6459
www.idt.com
