1
®
FN7332
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
PRELIMINARY
EL5104, EL5105, EL5204, EL5205, EL5304
700MHz Slew Enhanced VFA
The EL5104, EL5105, EL5204,
EL5205, and EL5304 represent high-
speed voltage f eedback amplifiers
based on the current feedback amplifier architecture. This
gives the typical high slew rate benefits of a CFA family
along with the stability and ease of use associated with the
VFA type architecture. This family is a vailable in single, dual,
and triple versions, with 200MHz, 400MHz, and 700MHz
versions. These are all available in single, dual and triple
versions. This family operates on single 5V or ±5V supplies
from minimum supply current. The EL5104 and EL5204 also
feature an output enable function, which can be used to put
the output in to a high-impedance mode. This enables the
outputs of multiple amplifiers to be tied together for use in
multiplexing applications.
Features
• Specified for 5V or ±5V applications
• Power-down to 17µA
• -3dB bandwidth = 700MHz
• ±0.1dB bandwidth = 45MH z
• Low supply current = 9.5mA
• Slew rate = 3000V/µs
• Low offset voltage = 10mV max
• Output current = 160mA
•A
VOL = 1400
• Diff gain/phase = 0.01%/0.02°C
Applications
• Video amplifiers
• PCMCIA applications
•A/D drivers
• Line drivers
• Portable computers
• High speed communicatio ns
• RGB applications
• Broadcast equipment
• Active filtering
Ordering Information
PART
NUMBER PACKAGE TAPE & REEL PKG. DWG. #
EL5104IS 8-Pin SO - MDP0027
EL5104IS-T7 8-Pin SO 7” MDP0027
EL5104IS-T13 8-Pin SO 13” MDP0027
EL5104IW-T7 6-Pin SOT-23 7” (3K pcs) MDP0038
EL5104IW-T7A 6-Pin SOT-23 7” (250 pcs) MDP0038
EL5105IC-T7 5-Pin SC-70 7” (3K pcs) P5.049
EL5105IC-T7A 5-Pin SC-70 7” (250 pcs) P5.049
EL5105IW-T7 5-Pin SOT-23 7” (3K pcs) MDP0038
EL5105IW-T7A 5-Pin SOT-23 7” (250 pcs) MDP0038
EL5204IY 10-Pin MSOP - MDP0043
EL5204IY-T7 10-Pin MSOP 7” MDP0043
EL5204IY-T13 10-Pin MSOP 13” MDP0043
EL5205IS 8-Pin SO - MDP0027
EL5205IS-T7 8-Pin SO 7” MDP0027
EL5205IS-T13 8-Pin SO 13” MDP0027
EL5205IY 8-Pin MSOP - MDP0043
EL5205IY-T7 8-Pin MSOP 7” MDP0043
EL5205IY-T13 8-Pin MSOP 13” MDP0043
EL5304IU 16-Pin QSOP - MDP0040
EL5304IU-T7 16-Pin QSOP 7” MDP0040
EL5304IU-T13 16-Pin QSOP 13” MDP0040
Data Sheet May 3, 2004
2
Pinouts EL5104
(6-PIN SOT-23)
TOP VIEW
EL5105
(5-PIN SOT-23, SC-70)
TOP VIEW
EL5104
(8-PIN SO)
TOP VIEW
EL5205
(8-PIN SO, MSOP)
TOP VIEW
EL5204
(10-PIN MSOP)
TOP VIEW
EL5304
(16-PIN QSOP)
TOP VIEW
1
2
3
6
4
5
+-
OUT
VS-
IN+
VS+
ENABLE
IN-
1
2
3
5
4
+-
OUT
VS-
IN+
VS+
IN-
1
2
3
4
8
7
6
5
-
+
NC
IN-
IN+
VS-
ENABLE
VS+
OUT
NC
1
2
3
4
8
7
6
5
-
+
-
+
OUTA
INA-
INA+
VS-
VS+
OUTB
INB-
INB+
1
2
3
4
10
9
8
7
5 6
-
+
-
+
INA+
CEA
VS-
CEB
INA-
OUTA
VS+
OUTB
INB+ INB-
1
2
3
4
16
15
14
13
5
6
7
12
11
10
8 9
-
+
-
+
-
+
INA+
CEA
VS-
CEB
INA-
OUTA
VS+
OUTB
INB+
NC
CEC
INC+
INB-
NC
OUTC
INC-
EL5104, EL5105, EL5204, EL5205, EL5304
3
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage between VS+ and GND. . . . . . . . . . . . . . . . . . 13.2V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±4V
Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80mA
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
DC Electrical Specificat ions VS = ±5V, GND = 0V, TA = 25°C, VCM = 0V, VOUT = 0V, VENABLE = GND or OPEN, unless otherwise
specified.
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
VOS Offset Voltage EL5104, EL5105, EL5204, EL5205 -10 3 10 mV
EL5304 -18 5 18 mV
TCVOS Offset Voltage Temperature Coefficient Measured from TMIN to TMAX 10 µV/°C
IB Input Bias Current VIN = 0V 8 30 µA
IOS Input Offset Current VIN = 0V 4 15 µA
TCIOS Input Bias Current Temperature
Coefficient Measured from TMIN to TMAX 50 nA/°C
PSRR Power Supply Rejection Ratio 60 70 dB
CMRR Common Mode Rejection Ratio VCM from -3V to +3V 56 62 dB
CMIR Common Mode Input Range Guaranteed by CMRR test -3 +3 V
RIN Input Resistance Common mode 50 120 KΩ
CIN Input Capacitance SO package 1 pF
IS,ON Supply Current - Enabled 8.5 9.5 11 mA
IS,OFF Supply Current - Shut Down VS+010µA
VS-1770µA
PSOR Power Supply Operating Range 4 13.2 V
AVOL Open Loop Gain RL = 1kΩ to GND 55 65 dB
RL = 150Ω to GND 60 dB
VOP Positive Output Voltage Swing RL = 150Ω to 0V 3.6 3.8 V
VON Negative Output Voltage Swing RL = 150Ω to 0V -3.8 -3.6 V
IOUT Output Current RL = 10Ω to 0V ±90 ±160 mA
VIH-EN ENABLE pin Voltage for Power Up (VS+)
-2.5 (VS+)
-1.0 V
VIL-EN ENABLE pin Voltage for Shut Down 0.5 V
EL5104, EL5105, EL5204, EL5205, EL5304
4
Closed Loop AC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = +1.5V, VOUT = +1.5V, VCLAMP = +5V,
VENABLE = +5V, AV = +1, RF = 0Ω, RL = 150Ω to GND pin, unless otherwise specified.
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
BW -3dB Bandwidth (VOUT = 200mVP-P)V
S = ±5V, AV = 1, RF = 0Ω700 MHz
SR Slew Rate RL = 150Ω, VOUT = -2.5V to +2.5V 2000 3000 5000 V/µs
tR,tFRise Time, Fall Time ±0.1V step 0.4 ns
OS Overshoot ±0.1V step 10 %
tPD Propagation Delay ±0.1V step 0.4 ns
tS0.1% Settling Time VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±2.5V 7 ns
dG Differential Gain AV = 2, RL = 150Ω, VINDC = -1 to +1V 0.01 %
dP Differential Phase AV = 2, RL = 150Ω, VINDC = -1 to +1V 0.02 °
eNInput Noise Voltage f = 10kHz 10 nV/√Hz
iNInput Noise Current f = 10kHz 54 pA/√Hz
tDIS Disable Time 180 ns
tEN Enable Time 650 ns
IEN Enable Pin Current Enabled, VEN = 0V -1 1 µA
Disabled, VEN = 5V 5 25 µA
Typical Performance Curves
FIGURE 1. PA CKA GE PO WER DISSIPATION vs AMBIENT
TEMPERATURE FIGURE 2. PA CKA GE PO WER DISSIPA TION vs AMBIENT
TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.2
1
0.4
0
0 255075100 150
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
85
1.087W
0.8
0.2
0.6
543mW
125
θ
JA
=115°C/W
MSOP8/10
θ
JA
=230°C/W
SOT23-5/6
1.116W
θJA=112°C/W
QSOP16
1.136W
θJA=110°C/W
SO8
1.4
0.8
0.6
0.2
0
0 255075100 150
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
12585
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.4
1
1.2
EL5104, EL5105, EL5204, EL5205, EL5304
5
All Intersil U.S. products are man ufactured, ass embled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/d esign/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license i s gr a nted b y imp lica tion or oth erw ise unde r any patent or pat en t rights of In t ersil or its sub sidi aries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FIGURE 3. PA CKA GE PO WER DISSIPATION vs AMBIENT
TEMPERATURE FIGURE 4. PA CKA GE PO WER DISSIPA TION vs AMBIENT
TEMPERATURE
Typical Performance Curves
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.7
0.6
0.4
0.3
0.2
0.1
0
0 255075100 150
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
85
607mW
θJA=206°C/W
MSOP8/10
0.5 488mW
θJA=256°C/W
SOT23-5/6
125
791mW
θJA=158°C/W
QSOP16
781mW
θJA=160°C/W
SO8
1
0.8
0.6
0.2
0
0 255075100 150
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
12585
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.4
EL5104, EL5105, EL5204, EL5205, EL5304
