1 MHz to 2.7 GHz
RF Gain Block
Data Sheet
AD8354
Rev. E Document Feedback
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FEATURES
Fixed gain of 20 dB
Operational frequency of 1 MHz to 2.7 GHz
Linear output power up to 4 dBm
Input/output internally matched to 50 Ω
Temperature and power supply stable
Noise figure: 4.2 dB
Power supply: 3 V or 5 V
APPLICATIONS
VCO buffers
General Tx/Rx amplification
Power amplifier predrivers
Low power antenna drivers
FUNCTIONAL BLOCK DIAGRAM
AD8354
BIAS AND VREF
INPT
VPOS
VOUT
COM2COM1
02722-001
Figure 1.
GENERAL DESCRIPTION
The AD8354 is a broadband, fixed-gain, linear amplifier that
operates at frequencies from 1 MHz up to 2.7 GHz. It is
intended for use in a wide variety of wireless devices, including
cellular, broadband, CATV, and LMDS/MMDS applications.
By taking advantage of ADI’s high performance, complementary Si
bipolar process, these gain blocks provide excellent stability
over process, temperature, and power supply. This amplifier is
single-ended and internally matched to 50 Ω with a return loss
of greater than 10 dB over the full operating frequency range.
The AD8354 provides linear output power of nearly 4.3 dBm
with 20 dB of gain at 900 MHz when biased at 3 V and an
external RF choke is connected between the power supply and
the output pin. The dc supply current is 24 mA. At 900 MHz,
the output third-order intercept (OIP3) is greater than 18 dBm;
at 2.7 GHz, the OIP3 is 14 dBm.
The noise figure is 4.2 dB at 900 MHz. The reverse isolation
(S12) is −33 dB at 900 MHz.
The AD8354 can also operate with a 5 V power supply; in
which case, no external inductor is required. Under these
conditions, the AD8354 delivers 4.88 dBm with 20 dB of gain
at 900 MHz. The dc supply current is 26 mA. At 900 MHz, the
OIP3 is greater than 19 dBm; at 2.7 GHz, the OIP3 is 15 dBm.
The noise figure is 4.4 dB at 900 MHz. The reverse isolation
(S12) is −33 dB.
The AD8354 is fabricated on ADI’s proprietary, high performance,
25 GHz, Si complementary, bipolar IC process. The AD8354 is
available in a chip scale package that uses an exposed paddle for
excellent thermal impedance and low impedance electrical
connection to ground. It operates over a −40°C to +85°C
temperature range, and an evaluation board is also available.
AD8354 Data Sheet
Rev. E | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ..............................................7
Theory of Operation ...................................................................... 13
Basic Connections ...................................................................... 13
Applications Information .............................................................. 14
Low Frequency Applications Below 100 MHz ........................... 14
Evaluation Board ............................................................................ 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
11/13Rev. D to Rev. E
Changes to Figure 2 .......................................................................... 6
Added Figure 35, Renumbered Sequentially .............................. 12
Added Exposed Pad Notation to Outline Dimensions ............. 16
Changes to Ordering Guide .......................................................... 16
3/09Rev. C to Rev. D
Changes to Lead Temperature (Soldering, 60 sec) Parameter,
Table 3 ................................................................................................ 5
Changes to Ordering Guide .......................................................... 16
12/05Rev. B to Rev. C
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Moved Figure 39 to Page 15; Renumbered Sequentially ........... 15
Changes to Ordering Guide .......................................................... 16
8/05Rev. A to Rev. B
Updated Format .................................................................. Universal
Changes to Product Title, Features, and General Description .... 1
Changes to Basic Connections Section ....................................... 13
Added Low Frequency Applications Below 100 MHz Section 14
Changes to Ordering Guide .......................................................... 16
Updated Outline Dimensions ....................................................... 16
6/02Rev. 0 to Rev. A
Changes to Ordering Guide ............................................................. 4
Replaced TPC 34 ............................................................................ 10
Updated Outline Dimensions ....................................................... 13
2/02Revision 0: Initial Version
Data Sheet AD8354
Rev. E | Page 3 of 16
SPECIFICATIONS
VS = 3 V, T A = 25°C, 100 nH external inductor between VOUT and VPOS, ZO = 50 Ω, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
OVERALL FUNCTION
Frequency Range 1 2700 MHz
Gain f = 900 MHz 19.5 dB
f = 1.9 GHz 18.6 dB
f = 2.7 GHz 17.1 dB
Delta Gain f = 900 MHz, −40°C ≤ TA+85°C −0.97 dB
f = 1.9 GHz, −40°C T
A
+85°C
dB
f = 2.7 GHz, −40°C TA+85°C −1.33 dB
Gain Supply Sensitivity VPOS ± 10%, f = 900 MHz 0.54 dB/V
f = 1.9 GHz 0.37 dB/V
f = 2.7 GHz 0.2 dB/V
Reverse Isolation (S12) f = 900 MHz 33.5 dB
f = 1.9 GHz −38 dB
f = 2.7 GHz −32.9 dB
RF INPUT INTERFACE Pin INPT
Input Return Loss f = 900 MHz 24.4 dB
f = 1.9 GHz 23 dB
f = 2.7 GHz 12.7 dB
RF OUTPUT INTERFACE Pin VOUT
Output Compression Point f = 900 MHz, 1 dB compression 4.6 dBm
f = 1.9 GHz 3.7 dBm
f = 2.7 GHz 2.7 dBm
Delta Compression Point
f = 900 MHz, −40°C ≤ T
A
+85°C
dB
f = 1.9 GHz, −40°C TA+85°C 0.7 dB
f = 2.7 GHz, −40°C TA+85°C 0.8 dB
Output Return Loss f = 900 MHz 23.6 dB
f = 1.9 GHz 16.5 dB
f = 2.7 GHz 14.6 dB
DISTORTION/NOISE
Output Third-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 19 dBm
f = 1.9 GHz, ∆f = 1 MHz, PIN = −28 dBm 16 dBm
f = 2.7 GHz, ∆f = 1 MHz, P
IN
= −28 dBm
dBm
Output Second-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 29.7 dBm
Noise Figure f = 900 MHz 4.2 dB
f = 1.9 GHz 4.8 dB
f = 2.7 GHz 5.4 dB
POWER INTERFACE Pin VPOS
Supply Voltage 2.7 3 3.3 V
Total Supply Current 16 23 31 mA
Supply Voltage Sensitivity 6.2 mA/V
Temperature Sensitivity −40°C ≤ TA+85°C 33 µA/°C
AD8354 Data Sheet
Rev. E | Page 4 of 16
VS = 5 V, T A = 25°C, no external inductor between VOUT and VPOS, ZO = 50 Ω, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
OVERALL FUNCTION
Frequency Range 1 2700 MHz
Gain f = 900 MHz 19.5 dB
f = 1.9 GHz
18.7
dB
f = 2.7 GHz 17.3 dB
Delta Gain f = 900 MHz, −40°C ≤ TA+85°C −0.93 dB
f = 1.9 GHz, −40°C TA+85°C −0.99 dB
f = 2.7 GHz, −40°C TA+85°C −1.21 dB
Gain Supply Sensitivity
VPOS ± 10%, f = 900 MHz
0.32
dB/V
f = 1.9 GHz 0.21 dB/V
f = 2.7 GHz 0.08 dB/V
Reverse Isolation (S12) f = 900 MHz 33.5 dB
f = 1.9 GHz −37.6 dB
f = 2.7 GHz −32.9 dB
RF INPUT INTERFACE Pin INPT
Input Return Loss f = 900 MHz 24.4 dB
f = 1.9 GHz 23.9 dB
f = 2.7 GHz
13.5
dB
RF OUTPUT INTERFACE Pin VOUT
Output Compression Point f = 900 MHz 4.8 dBm
f = 1.9 GHz 4.6 dBm
f = 2.7 GHz 3.6 dBm
Delta Compression Point f = 900 MHz, −40°C TA+85°C 0.37 dB
f = 1.9 GHz, −40°C TA+85°C −0.14 dB
f = 2.7 GHz, −40°C TA+85°C −0.05 dB
Output Return Loss f = 900 MHz 23.7 dB
f = 1.9 GHz 22.5 dB
f = 2.7 GHz 17.6 dB
DISTORTION/NOISE
Output Third-Order Intercept f = 900 MHz, ∆f = 50 MHz, PIN = −30 dBm 19.3 dBm
f = 1.9 GHz, ∆f = 50 MHz, PIN = −30 dBm 17.3 dBm
f = 2.7 GHz, ∆f = 50 MHz, PIN = −30 dBm 15.3 dBm
Output Second-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 28.7 dBm
Noise Figure f = 900 MHz 4.4 dB
f = 1.9 GHz 5 dB
f = 2.7 GHz 5.6 dB
POWER INTERFACE Pin VPOS
Supply Voltage 4.5 5 5.5 V
Total Supply Current TA = 27°C 17 25 34 mA
Supply Voltage Sensitivity 4 mA/V
Temperature Sensitivity −40°C TA+85°C 28 µA/°C
Data Sheet AD8354
Rev. E | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage, VPOS 5.5 V
Input Power (re: 50 Ω)
10 dBm
Equivalent Voltage 700 mV rms
Internal Power Dissipation
Paddle Not Soldered 325 mW
Paddle Soldered 812 mW
θJA (Paddle Soldered)
80°C/W
θJA (Paddle Not Soldered)
200°C/W
Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec)
AD8354ACP (Non-RoHS Compliant) 240°C
AD8354ACPZ (RoHS Compliant) 260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD8354 Data Sheet
Rev. E | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. NC = NO CO NNE C T.
2. THE EXPOSED PAD MUST BE CONNECT E D
TO A LOW IMPE DANCE GRO UND PAD.
1
COM1
2NC
3INPT
4
COM2
8COM1
7VOUT
6 VPOS
5COM2
AD8354
TOP VIEW
02722-041
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 8 COM1 Device Common. Connect to low impedance ground.
2
NC
No Connection.
3
INPT
RF Input Connection. Must be ac-coupled.
4, 5 COM2 Device Common. Connect to low impedance ground.
6 VPOS Positive Supply Voltage.
7 VOUT RF Output Connection. Must be ac-coupled.
Data Sheet AD8354
Rev. E | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
02722-002
180
150
120
90
60
30
0
330
300
270
240
210
Figure 3. S11 vs. Frequency, VS = 3 V, TA = 25°C, 100 MHz ≤ f ≤ 3 GHz
02722-003
FREQUENCY (MHz)
00 3000
GAIN (dB)
1000 1500 2000 2500
25
20
15 GAIN AT 3.0V
GAIN AT 3.3V
GAIN AT 2.7V
10
5
500
Figure 4. Gain vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
02722-004
FREQUENCY (MHz)
40
500
REVERSE ISOLATION (dB)
1000
–15
–20
–25
–30
–35 S
12
AT 3.0V
S
12
AT 3.3V
S
12
AT 2.7V
1500 2000 2500 3000
–10
–5
0
0
Figure 5. Reverse Isolation vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
02722-005
180
150
120
90
60
30
0
330
300
270
240
210
Figure 6. S22 vs. Frequency, VS = 3 V, TA = 25°C, 100 MHz ≤ f ≤ 3 GHz
02722-006
FREQUENCY (MHz)
0500
GAIN (dB)
1000
25
20
15
10
5
GAIN AT 40°C
GAIN AT +85°C
GAIN AT +25°C
1500 2000 2500 30000
Figure 7. Gain vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
02722-007
FREQUENCY (MHz)
–40 500
REVERSE ISOLATION (dB)
1000
–15
–20
–25
–30
–35
1500 2500 3000
–10
–5
0
0
S
12
AT –40°C
S
12
AT +25°C
S
12
AT +85°C
2000
Figure 8. Reverse Isolation vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
AD8354 Data Sheet
Rev. E | Page 8 of 16
02722-008
FREQUENCY (MHz)
P1dB (dBm)
P1dB (dBm)
–1 500 1000 1500 2000 2500 3000
4
3
2
1
0
5
6
7
0
P1dB AT 3.0V
P1dB AT 2.7V
P1dB AT 3.3V
Figure 9. P1dB vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
02722-009
OUTPUT 1dB COMPRESSION POINT (dBm)
0
2.5
PERCENTAGE
2.6
25
20
15
10
5
30
35
40
2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8
45
50
Figure 10. Distribution of P1dB, VS = 3 V, TA = 25°C, f = 2.2 GHz
02722-010
FREQUENCY (MHz)
10 500
OIP3 (dBm)
1000
20
18
16
14
12
1500 3000
22
02000 2500
OIP3 AT 3.0V
OIP3 AT 2.7V
OIP3 AT 3.3V
Figure 11. OIP3 vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
02722-011
500
4
3
2
1
0
5
6
1000 1500 2000 2500 30000
P
1dB
AT +25°C
P
1dB
AT +85°C
P
1dB
AT –40°C
FREQUENCY (MHz)
P
1dB
(dBm)
Figure 12. P1dB vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
02722-012
OIP3 (dBm)
0
14.4
PERCENT
25
20
15
10
5
30
35
40
45
50
14.6 14.8 15.0 15.2 15.4 15.6 15.8 16.0
Figure 13. Distribution of OIP3, VS = 3 V, TA = 25°C, f = 2.2 GHz
02722-013
FREQUENCY (MHz)
10 500
OIP3 (dBm)
20
18
16
14
12
1500 25002000 3000
22
1000
0
OIP3 AT +85°C
OIP3 AT +25°C
OIP3 AT –40°C
Figure 14. OIP3 vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
Data Sheet AD8354
Rev. E | Page 9 of 16
02722-014
FREQUENCY (MHz)
4.0 500
NOISE FIGURE (dB)
1000
NF AT 3.3V
NF AT 3.0V
NF AT 2.7V
4.2
4.4
4.6
4.8
5.0
5.2
5.4
5.6
5.8
6.0
2000 25001500 3000
0
Figure 15. Noise Figure vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
02722-015
NOISE FIGURE (dB)
0
4.70
PERCENTAGE
25
20
15
10
5
30
35
40
4.75 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 5.25
Figure 16. Distribution of Noise Figure, VS = 3 V, TA = 25°C, f = 2.2 GHz
02722-016
180
150
120
90
60
30
0
330
300
270
240
210
Figure 17. S11 vs. Frequency, VS = 5 V, TA = 25°C, 100 MHz ≤ f ≤ 3 GHz
02722-017
FREQUENCY (MHz)
3.0 500
NOISE FIGURE (dB)
1500
3.5
4.0
4.5
5.0
5.5
6.5
6.0
1000 25002000 30000
NF AT +85°C
NF AT +25°C
NF AT –40°C
Figure 18. Noise Figure vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
02722-018
TEMPERATURE (°C)
0
–60
SUPPLY CURRENT (mA)
5
10
15
20
25
30
–40 –20 0 20 40 60 80 100
I
S
AT 3.0V
I
S
AT 2.7V
I
S
AT 3.3V
Figure 19. Supply Current vs. Temperature, VS = 2.7 V, 3 V, and 3.3 V
02722-019
180
150
120
90
60
30
0
330
300
270
240
210
Figure 20. S22 vs. Frequency, VS = 5 V, TA = 25°C, 100 MHz ≤ f ≤ 3 GHz
AD8354 Data Sheet
Rev. E | Page 10 of 16
02722-020
FREQUENCY (MHz)
500 3000
GAIN (dB)
1000 1500 2000 2500
25
5
0
10
15
20
GAIN AT 5.0V GAIN AT 4.5V
GAIN AT 5.5V
0
Figure 21. Gain vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C
02722-021
FREQUENCY (MHz)
–40 500
REVERSE ISOLATION (dB)
1000
S
12
AT 4.5V S
12
AT 5.0V
–35
–30
–25
–20
–15
–10
–5
0
1500 2000 2500 3000
0
S
12
AT 5.5V
Figure 22. Reverse Isolation vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C
02722-022
0
1
2
3
P1dB (dBm)
4
5
6
7
FREQUENCY (MHz)
500 1000 1500 2000 2500 3000
0
P1dB AT 5.5V
P1dB AT 5.0V
P1dB AT 4.5V
Figure 23. P1dB vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C
02722-023
FREQUENCY (MHz)
0500
GAIN (dB)
25
20
15
10
5
1500 2000 2500 3000
01000
GAIN AT –40°C
GAIN AT +25°C
GAIN AT +85°C
Figure 24. Gain vs. Frequency, VS = 5 V, TA = −40°C, +25°C, and +85°C
02722-024
FREQUENCY (MHz)
500
REVERSE ISOLATION (dB)
–30
–25
–20
–15
–10
–5
0
1000
S
12
AT –40°C
S
12
AT +85°C S
12
AT +25°C
1500 2000 2500 3000
0
–35
–40
Figure 25. Reverse Isolation vs. Frequency, VS = 5 V, TA = −40°C, +25°C, and +85°C
02722-025
0
1
2
3
4
5
6
FREQUENCY (MHz)
P
1dB
(dBm)
500 1000 1500 2000 2500 3000
0
P
1dB
AT +25°C
P
1dB
AT +85°C
P
1dB
AT –40°C
Figure 26. P1dB vs. Frequency, VS = 5 V, TA = 40°C, +25°C, and +85°C
Data Sheet AD8354
Rev. E | Page 11 of 16
02722-026
OUTPUT 1dB COMPRESSION POINT (dBm)
0
3.95
PERCENTAGE
4.00
25
20
15
10
5
30
35
40
45
50
4.05 4.10 4.15 4.20 4.25 4.30 4.35 4.40 4.45 4.50
Figure 27. Distribution of P1dB, VS = 5 V, TA = 25°C, f = 2.2 GHz
02722-027
10
12
14
16
18
20
22
OIP3 AT 5.0V
OIP3 AT 5.5V
OIP3 AT 4.5V
FREQUENCY (MHz)
500 1000 1500 2000 2500 30000
OIP3 (dBm)
Figure 28. OIP3 vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C
02722-028
FREQUENCY (MHz)
4.0 500
NOISE FIGURE (dB)
1000
NF AT 4.5V
4.5
5.0
6.0
1500 2000 2500 3000
6.5
5.5
7.0
0
NF AT 5.5V
NF AT 5.0V
Figure 29. Noise Figure vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C
02722-029
OIP3 (dBm)
0
16.0
PERCENTAGE
25
20
15
10
5
30
35
16.1 16.2 16.3 16.4 16.5 16.6 16.7 16.8 16.9 17.0 17.1 17.2
Figure 30. Distribution of OIP3, VS = 5 V, TA = 25°C, f = 2.2 GHz
02722-030
10
OIP3 (dBm)
12
14
16
18
20
22
OIP3 AT +85°C
OIP3 AT +25°C
OIP3 AT –40°C
FREQUENCY (MHz)
1000 1500 2000 2500 30005000
Figure 31. OIP3 vs. Frequency, VS = 5 V, TA = 40°C, +25°C, and +85°C
02722-031
FREQUENCY (MHz)
4.0
500
NOISE FIGURE (dB)
1000
4.5
5.0
6.0
1500 2000 2500 3000
6.5
5.5
7.0
7.5
3.0
3.5
0
NF AT –40°C
NF AT +25°C
NF AT +85°C
Figure 32. Noise Figure vs. Frequency, VS = 5 V, TA = 40°C, +25°C, and +85°C
AD8354 Data Sheet
Rev. E | Page 12 of 17
02722-032
NOISE FIGURE (dB)
04.5
PERCENTAGE
25
20
15
10
5
30
35
40
4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5 5.6
Figure 33. Distribution of Noise Figure, VS = 5 V, TA = 25°C, f = 2.2 GHz
02722-033
TEMPERATURE (°C)
0
–60
SUPPLY CURRENT (mA)
5
10
15
20
25
30
–40 –20 0 20 40 60 80 100
35
I
S
AT 5.0V
I
S
AT 5.5V
I
S
AT 4.5V
Figure 34. Supply Current vs. Temperature, VS = 4.5 V, 5 V, and 5.5 V
16
18
20
22
24
26
28
30
32
–10 –8 –6 –4 –2 0 2 4 6
SUPP LY CURRENT (mA)
P
OUT
(dBm)
I
S
AT 3V, +85°C
I
S
AT 5V, +25°C
I
S
AT 3V, +25°C
I
S
AT 5V, –40°C
I
S
AT 3V, –40°C
I
S
AT 5V, +85°C
02722-135
Figure 35. Supply Current vs. POUT and Temperature, VS = 5 V
02722-034
15
–15 –30 –25
P
OUT
(dBm)
P
IN
(dBm)
–20 –15 –10 5 0
10
5
0
–5
–10
20
14
19
18
17
16
15
GAIN (dB)
Figure 36. Output Power and Gain vs. Input Power, VS = 3 V, TA = 25°C, f = 900 MHz
02722-035
P
IN
(dBm)
P
OUT
(dBm)
–30 –25 –20 –15 –10 –5 0
–15
10
5
0
–10
20
14
19
18
17
16
15
GAIN (dB)
–5
15
Figure 37. Output Power and Gain vs. Input Power, VS = 5 V, TA = 25°C, f = 900 MHz
Data Sheet AD8354
Rev. E | Page 13 of 16
THEORY OF OPERATION
The AD8354 is a 2-stage, feedback amplifier employing both
shunt-series and shunt-shunt feedback. The first stage is
degenerated and resistively loaded and provides approximately
10 dB of gain. The second stage is a PNP-NPN Darlington
output stage, which provides another 10 dB of gain. Series-
shunt feedback from the emitter of the output transistor sets the
input impedance to 50 over a broad frequency range. Shunt-
shunt feedback from the amplifier output to the input of the
Darlington stage helps to set the output impedance to 50 . The
amplifier can be operated from a 3 V supply by adding a choke
inductor from the amplifier output to VPOS. Without this
choke inductor, operation from a 5 V supply is also possible.
BASIC CONNECTIONS
The AD8354 RF gain block is a fixed gain amplifier with single-
ended input and output ports whose impedances are nominally
equal to 50 over the frequency range 1 MHz to 2.7 GHz.
Consequently, it can be directly inserted into a 50 Ω system
with no impedance matching circuitry required. The input and
output impedances are sufficiently stable vs. variations in
temperature and supply voltage that no impedance matching
compensation is required. A complete set of scattering
parameters is available at www.analog.com.
The input pin (INPT) is connected directly to the base of the
first amplifier stage, which is internally biased to approximately 1 V;
therefore, a dc blocking capacitor should be connected between the
source that drives the AD8354 and the input pin, INPT.
It is critical to supply very low inductance ground connections
to the ground pins (Pin 1, Pin 4, Pin 5, and Pin 8) as well as to
the backside exposed paddle. This ensures stable operation.
The AD8354 is designed to operate over a wide supply voltage
range, from 2.7 V to 5.5 V. The output of the part, VOUT, is
taken directly from the collector of the output amplifier stage.
This node is internally biased to approximately 3.2 V when the
supply voltage is 5 V. Consequently, a dc blocking capacitor
should be connected between the output pin, VOUT, and the
load that it drives. The value of this capacitor is not critical, but
it should be 100 pF or larger.
When the supply voltage is 3 V, it is recommended that an
external RF choke be connected between the supply voltage
and the output pin, VOUT. This increases the dc voltage applied
to the collector of the output amplifier stage, which improves
performance of the AD8354 to be very similar to the performance
produced when 5 V is used for the supply voltage. The inductance
of the RF choke should be approximately 100 nH, and care
should be taken to ensure that the lowest series self-resonant
frequency of this choke is well above the maximum frequency
of operation for the AD8354.
Bypass the supply voltage input, VPOS, using a large value
capacitance (approximately 0.47 µF or larger) and a smaller,
high frequency bypass capacitor (approximately 100 pF)
physically located close to the VPOS pin.
The recommended connections and components are shown in
Figure 41.
AD8354 Data Sheet
Rev. E | Page 14 of 16
APPLICATIONS INFORMATION
The AD8354 RF gain block can be used as a general-purpose,
fixed gain amplifier in a wide variety of applications, such as a
driver for a transmitter power amplifier (see Figure 38). Its
excellent reverse isolation also makes this amplifier suitable for
use as a local oscillator buffer amplifier that would drive the
local oscillator port of an upconverter or downconverter mixer
(see Figure 39).
AD8354
HIGH POWER
AMPLIFIER
02722-036
Figure 38. AD8354 as a Driver Amplifier
AD8354
MIXER
LOCAL OSCILLATOR
02722-037
Figure 39. AD8354 as a LO Driver Amplifier
LOW FREQUENCY APPLICATIONS BELOW 100 MHz
The AD8354 RF gain block can be used below 100 MHz. To
accomplish this, the series dc blocking capacitors, C1 and C2,
need to be changed to a higher value that is appropriate for the
desired frequency. C1 and C2 were changed to 0.1 µF to accomplish
the sweeps in Figure 40.
1
21.5
21.0
20.5
20.0
19.5
19.0
18.5
18.0
17.5
17.0
16.5 CH 1: START 300.000kHz STOP 100.000MHz
02722-042
dB-S21 Mkr 1: 19.40dB
97.638034MHz
Figure 40. Low Frequency Application from
300 kHz to 100 MHz at 5 V VPOS, −12 dBm Input Power
Data Sheet AD8354
Rev. E | Page 15 of 16
EVALUATION BOARD
Figure 41 shows the schematic of the AD8354 evaluation board.
Note that L1 is shown as an optional component that is used to
obtain maximum gain only when VP = 3 V. The board is powered
by a single supply in the 2.7 V to 5.5 V range. The power supply
is decoupled by a 0.47 µF and a 100 pF capacitor.
6
5
7
8
NC = NO CONNECT
02722-038
COM1
NC
INPT
COM1
VOUT
VPOS
COM2COM2
AD8354
C3
100pF C4
0.47µF
OUTPUT
1
2
3
4
C1
1000pF
C2
1000pF
INPUT L1
Figure 41. Evaluation Board Schematic
Table 5. Evaluation Board Configuration Options
Component Function
Default
Value
C1, C2 AC coupling capacitors. 1000 pF,
0603
C3 High frequency bypass capacitor. 100 pF,
0603
C4 Low frequency bypass capacitor. 0.47 µF,
0603
L1 Optional RF choke, used to increase
current through output stage when
VP = 3 V. Not recommended for use
when VP = 5 V.
100 nH,
0603
02722-039
Figure 42. Silkscreen Top
02722-040
Figure 43. Component Side
AD8354 Data Sheet
Rev. E | Page 16 of 16
OUTLINE DIMENSIONS
SEATING
PLANE
0.30
0.23
0.18
0.20 RE F
0.80 M AX
0.65 TYP
1.00
0.85
0.80
1.89
1.74
1.59
0.50 BS C
0.60
0.45
0.30
0.55
0.40
0.30
0.15
0.10
0.05
0.25
0.20
0.15
BOTTOM VIEW
41
58
3.25
3.00
2.75
1.95
1.75
1.55
2.95
2.75
2.55
PI N 1
INDICATOR
2.25
2.00
1.75
TOP VIEW
0.05 M AX
0.02 NOM
12° M AX
EXPOSEDPAD
FOR PRO P E R CONNECT IO N OF
THE EXPOSED PAD, REFER TO
THE P IN CONFIGURAT ION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
03-11-2013-B
Figure 44. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
2 mm × 3 mm Body, Very Thin, Dual Lead
CP-8-1
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
AD8354ACPZ-REEL7 −40°C to +85°C 8-Lead LFCSP_VD, 7" Tape and Reel CP-8-1 0G
AD8354-EVALZ Evaluation Board
1 Z = RoHS Compliant Part.
©20022013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02722-0-11/13(E)