MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet The Silicon Labs Mighty Gecko Module (MGM12P) is a fully-integrated, certified module, enabling rapid development of wireless mesh networking solutions. Based on the Silicon Labs EFR32MG12 Mighty Gecko SoC, the MGM12P combines an energy- efficient, multi-protocol wireless SoC with a proven RF/antenna design and industry leading wireless software stacks. This integration accelerates time-to-market and saves months of engineering effort and development costs. In addition, common software and development tools enable seamless migration from a module to discrete SoC-based design when the time is right. MGM12P can be used in a wide variety of applications: * * * * * * Flash Program Memory Clock Management Memory Protection Unit Debug Interface with ETM RAM Memory * 1 MB of flash and 256 kB of RAM * ZigBee, Thread, BLE, and multi-protocol support * Pin-compatible with MGM111 module * 12-channel Peripheral Reflex System, Low-Energy Sensor Interface & Multichannel Capacitive Sense Interface * Robust peripheral set and up to 25 GPIO Core / Memory ARM Cortex M4 processor with DSP extensions and FPU * 32-bit ARM(R) Cortex(R)-M4 core with 40 MHz maximum operating frequency * Integrated PA with up to +17 dBm transmit power IoT Multi-Protocol Devices Connected Home Lighting Health and Wellness Metering Building Automation and Security TM KEY FEATURES LDMA Controller Energy Management High Frequency Crystal Oscillator High Frequency RC Oscillator Voltage Regulator Voltage Monitor Low Frequency RC Oscillator Auxiliary High Frequency RC Oscillator DC-DC Converter Power-On Reset Low Frequency Crystal Oscillator Ultra Low Frequency RC Oscillator Brown-Out Detector Other CRYPTO CRC True Random Number Generator SMU 32-bit bus Peripheral Reflex System Radio Transceiver Integrated Chip Antenna FRC DEMOD LNA PGA IFADC RF Frontend Q Frequency Synthesizer AGC RAC PA Matching I CRC External Antenna U.FL Connector Serial Interfaces BUFC Antenna MOD I/O Ports Timers and Triggers USART External Interrupts Timer/Counter Protocol Timer Low Energy UARTTM General Purpose I/O Low Energy Timer Watchdog Timer Pin Reset Pulse Counter Real Time Counter and Calendar Pin Wakeup Low Energy Sensor Interface Cryotimer I2C Analog I/F ADC Analog Comparator IDAC Capacitive Sense VDAC Op-Amp Lowest power mode with peripheral operational: EM0--Active EM1--Sleep silabs.com | Building a more connected world. EM2--Deep Sleep EM3--Stop EM4--Hibernate EM4--Shutoff Rev. 1.2 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Feature List 1. Feature List The MGM12P highlighted features are listed below. * Low Power Wireless System-on-Chip. * High Performance 32-bit 40 MHz ARM Cortex(R)-M4 with DSP instruction and floating-point unit for efficient signal processing * 1024 kB flash program memory * 256 kB RAM data memory * 2.4 GHz radio operation * TX power up to +17 dBm * Low Energy Consumption * 10.3 mA RX current at 2.4 GHz (1 Mbps GFSK) * 10.8 mA RX current at 2.4 GHz (250 kbps O-QPSK DSSS) * 10 mA TX current @ 0 dBm output power at 2.4 GHz * 70 A/MHz in Active Mode (EM0) * 2.62 A EM2 DeepSleep current (256 kB RAM retention and RTCC running from LFXO) * High Receiver Performance * -102 dBm sensitivity @ 250 kbps O-QPSK DSSS * -105.7 dBm sensitivity @ 250 kbps O-QPSK DSSS (MGM12P22 and MGM12P32) * -95 dBm sensitivity @ 1Mbps 2GFSK * -101.6 dBm sensitivity @ 1Mbps 2GFSK (MGM12P22 and MGM12P32) * Supported Modulation Format * Shaped OQPSK * 2-FSK / 4-FSK with fully configurable shaping * Supported Protocols: * Bluetooth(R) Low Energy (Bluetooth 5) * zigbee * Thread * Support for Internet Security * General Purpose CRC * True Random Number Generator * Hardware Cryptographic Acceleration for AES 128/256, SHA-1, SHA-2 (SHA-224 and SHA-256) and ECC silabs.com | Building a more connected world. * Wide selection of MCU peripherals * 12-bit 1 Msps SAR Analog to Digital Converter (ADC) * 2xAnalog Comparator (ACMP) * 2xDigital to Analog Converter (VDAC) * 3xOperational Amplifier (Opamp) * Digital to Analog Current Converter (IDAC) * Low-Energy Sensor Interface (LESENSE) * Multi-channel Capacitive Sense Interface (CSEN) * Up to 25 pins connected to analog channels (APORT) shared between analog peripherals * Up to 25 General Purpose I/O pins with output state retention and asynchronous interrupts * 8 Channel DMA Controller * 12 Channel Peripheral Reflex System (PRS) * 2x16-bit Timer/Counter * 3 + 4 Compare/Capture/PWM channels * 2x32-bit Timer/Counter * 3 + 4 Compare/Capture/PWM channels * 32-bit Real Time Counter and Calendar * 16-bit Low Energy Timer for waveform generation * 32-bit Ultra Low Energy Timer/Counter for periodic wake-up from any Energy Mode * 3x16-bit Pulse Counter with asynchronous operation * 2xWatchdog Timer with dedicated RC oscillator * 4xUniversal Synchronous/Asynchronous Receiver/Transmitter (UART/SPI/SmartCard (ISO 7816)/IrDA/I2S) * Low Energy UART (LEUARTTM) * 2xI2C interface with SMBus support and address recognition in EM3 Stop * Wide Operating Range * 1.8 V to 3.8 V single power supply * -40 C to 85 C * WxLxH: 12.9 x 17.8 x 2.3 mm Rev. 1.2 | 2 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Ordering Information 2. Ordering Information Ordering Code Description Max TX Power Sensitivity (O-QPSK) MGM12P32F1024GA-V2 Multi-protocol Module +17 dBm -105.7 dBm Integrated chip an- Cut Tape tenna (100 pcs) MGM12P32F1024GA-V2R Multi-protocol Module +17 dBm -105.7 dBm Integrated chip an- Reel Full Production (certitenna fied) (1000 pcs) MGM12P32F1024GE-V2 +17 dBm -105.7 dBm External (U.FL) Multi-protocol Module Antenna Packaging Production Status Cut Tape (100 pcs) MGM12P32F1024GE-V2R Multi-protocol Module +17 dBm -105.7 dBm External (U.FL) Reel (1000 pcs) MGM12P22F1024GA-V2 Full Production (certified) Full Production (certified) Full Production (certified) Multi-protocol Module +10 dBm -105.7 dBm Integrated chip an- Cut Tape tenna (100 pcs) MGM12P22F1024GA-V2R Multi-protocol Module +10 dBm -105.7 dBm Integrated chip an- Reel Full Production (certitenna fied) (1000 pcs) MGM12P22F1024GE-V2 +10 dBm -105.7 dBm External (U.FL) Multi-protocol Module Cut Tape (100 pcs) MGM12P22F1024GE-V2R Multi-protocol Module +10 dBm -105.7 dBm External (U.FL) Reel (1000 pcs) MGM12P02F1024GA-V2 Full Production (certified) Full Production (certified) Full Production (certified) Multi-protocol Module +10 dBm -102 dBm Integrated chip an- Cut Tape tenna (100 pcs) MGM12P02F1024GA-V2R Multi-protocol Module +10 dBm -102 dBm Integrated chip an- Reel Full Production (certitenna fied) (1000 pcs) MGM12P02F1024GE-V2 +10 dBm -102 dBm External (U.FL) Multi-protocol Module Cut Tape (100 pcs) MGM12P02F1024GE-V2R Multi-protocol Module +10 dBm -102 dBm External (U.FL) Reel (1000 pcs) SLWRB4304A MGM12P Radio Board2 +17 dBm Full Production (certified) Full Production (certified) Full Production (certified) -105.7 dBm Integrated chip an- Single Unit Development Board tenna Note: 1. IAR license required for zigbee and Thread software development. 2. Requires Mesh Networking kit SLWSTK6000A or SLWSTK6000B silabs.com | Building a more connected world. Rev. 1.2 | 3 Table of Contents 1. Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3. System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Power . . . . . . . . . . . 3.3.1 Energy Management Unit (EMU) 3.3.2 DC-DC Converter . . . . . 3.3.3 Power Domains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 .10 .10 .11 3.4 General Purpose Input/Output (GPIO) . . . . . . . . . . . . . . . . . . . . . .11 3.5 Clocking . . . . . . . . . . 3.5.1 Clock Management Unit (CMU) . 3.5.2 Internal Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 .11 .11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 .12 .12 .12 .12 .12 .12 .12 3.7 Communications and Other Digital Peripherals . . . . . . . . . . 3.7.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) . 3.7.2 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART) . 3.7.3 Inter-Integrated Circuit Interface (I2C) . . . . . . . . . . . . 3.7.4 Peripheral Reflex System (PRS) . . . . . . . . . . . . . 3.7.5 Low Energy Sensor Interface (LESENSE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 .13 .13 .13 .13 .13 3.8 Security Features . . . . . . . . . . . . . . 3.8.1 GPCRC (General Purpose Cyclic Redundancy Check) 3.8.2 Crypto Accelerator (CRYPTO) . . . . . . . . 3.8.3 True Random Number Generator (TRNG) . . . . 3.8.4 Security Management Unit (SMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 .13 .14 .14 .14 3.9 Analog. . . . . . . . . . . . . . 3.9.1 Analog Port (APORT) . . . . . . . 3.9.2 Analog Comparator (ACMP) . . . . . 3.9.3 Analog to Digital Converter (ADC) . . . 3.9.4 Capacitive Sense (CSEN) . . . . . . 3.9.5 Digital to Analog Current Converter (IDAC) 3.9.6 Digital to Analog Converter (VDAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 .14 .14 .14 .14 .15 .15 3.2 Radio . . . . . . . . . 3.2.1 Antenna Interface . . . 3.2.2 Packet and State Trace . 3.2.3 Random Number Generator . . . 3.6 Counters/Timers and PWM . . . . . . . . . 3.6.1 Timer/Counter (TIMER) . . . . . . . . 3.6.2 Wide Timer/Counter (WTIMER) . . . . . . 3.6.3 Real Time Counter and Calendar (RTCC) . . 3.6.4 Low Energy Timer (LETIMER) . . . . . . 3.6.5 Ultra Low Power Wake-up Timer (CRYOTIMER) 3.6.6 Pulse Counter (PCNT) . . . . . . . . . 3.6.7 Watchdog Timer (WDOG) . . . . . . . . silabs.com | Building a more connected world. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7 8 8 Rev. 1.2 | 4 3.9.7 Operational Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . .15 3.10 Reset Management Unit (RMU) . . . . . . . . . . . . . . . . . . . . . . . .15 3.11 Core and Memory . . . . . . . . . . . . 3.11.1 Processor Core . . . . . . . . . . . . 3.11.2 Memory System Controller (MSC) . . . . . 3.11.3 Linked Direct Memory Access Controller (LDMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 .15 .15 .15 3.12 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 3.13 Configuration Summary . . . . . . . . . . . . . . . . . . . . . . . . . .17 4. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 Electrical Characteristics . . . . . . . . 4.1.1 Absolute Maximum Ratings . . . . . . 4.1.2 General Operating Conditions . . . . . 4.1.3 DC-DC Converter . . . . . . . . . 4.1.4 Current Consumption . . . . . . . . 4.1.5 Wake Up Times . . . . . . . . . . 4.1.6 Brown Out Detector (BOD) . . . . . . 4.1.7 Frequency Synthesizer . . . . . . . . 4.1.8 2.4 GHz RF Transceiver Characteristics . . 4.1.9 Oscillators . . . . . . . . . . . . 4.1.10 Flash Memory Characteristics . . . . . 4.1.11 General-Purpose I/O (GPIO) . . . . . 4.1.12 Voltage Monitor (VMON) . . . . . . . 4.1.13 Analog to Digital Converter (ADC) . . . 4.1.14 Analog Comparator (ACMP) . . . . . 4.1.15 Digital to Analog Converter (VDAC) . . . 4.1.16 Current Digital to Analog Converter (IDAC) 4.1.17 Capacitive Sense (CSEN) . . . . . . 4.1.18 Operational Amplifier (OPAMP) . . . . 4.1.19 Pulse Counter (PCNT) . . . . . . . 4.1.20 Analog Port (APORT) . . . . . . . . 4.1.21 I2C . . . . . . . . . . . . . . 4.1.22 USART SPI . . . . . . . . . . . 5. Typical Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 .18 .19 .19 .20 .23 .24 .24 .24 .28 .31 .32 .33 .34 .36 .39 .42 .44 .46 .49 .49 .50 .53 . . . . . . . . . . . . . . . . . . . . . . . . 55 5.1 Network Co-Processor (NCP) Application with UART Host . . . . . . . . . . . . . . .55 5.2 Network Co-Processor (NCP) Application with SPI Host . . . . . . . . . . . . . . . .55 5.3 SoC Application . . . . . . . . . . . . . . .56 6. Layout Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.1 Module Placement and Application PCB Layout Guidelines . . . . . . . . . . . . . . .57 6.2 Effect of Plastic and Metal Materials . . . . . . . . . . . . . . . . . . . . .58 6.3 Locating the Module Close to Human Body . . . . . . . . . . . . . . . . . . . .58 6.4 2D Radiation Pattern Plots . . . . . . . . . . . . . . . . . . . .59 7. Hardware Design Guidelines silabs.com | Building a more connected world. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Rev. 1.2 | 5 7.1 Power Supply Requirements . . . . . . . . . . . . . . . . . . . . . . . . .61 7.2 Reset Functions . . . . . . . . . . . . . . . . . . . . . . . .61 7.3 Debug and Firmware Updates . . . . . 7.3.1 Programming and Debug Connections 7.3.2 Packet Trace Interface (PTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 .61 .61 . . . . . 8. Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 8.1 Pin Definitions . . . 8.1.1 GPIO Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62 .64 8.2 Alternate Functionality Pinout . . . . . . . . . . . . . . . . . . . . . . . . .65 8.3 Analog Port (APORT) Client Maps . . . . . . . . . . . . . . . . . . . . . . .76 9. Package Specifications 9.1 MGM12P Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 . . . . . . . . . . . . . . . . . . . . . . . . . . .85 9.2 MGM12P Module Footprint . . . . . . . . . . . . . . . . . . . . . . . . . .86 9.3 MGM12P Recommended PCB Land Pattern . . . . . . . . . . . . . . . . . . . .87 9.4 MGM12P Package Marking. . . . . . . . . . . . . . . . . . . .88 . . . . . . 10. Tape and Reel Specifications . . . . . . . . . . . . . . . . . . . . . . . . 90 10.1 Tape and Reel Specification . . . . . . . . . . . . . . . . . . . . . . . . .90 10.2 Reel Material and Dimensions . . . . . . . . . . . . . . . . . . . . . . . .90 10.3 Module Orientation and Tap . . . . . . . . . . . . . . . . . . . . . . . .91 10.4 Carrier Tape and Cover Tape Information . . . . . . . . . . . . . . . . . . . .92 . 11. Certifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 11.1 CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 11.2 FCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 11.3 ISEDC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95 12. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 silabs.com | Building a more connected world. Rev. 1.2 | 6 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview 3. System Overview 3.1 Introduction This section provides a brief overview of the MGM12P module architecture including both MCU and RF sub-systems. A detailed functional description of the EFR32MG12 SoC used inside the module is available in the EFR32MG12 Mighty Gecko Datasheet and EFR32xG12 Wireless Gecko Reference Manual. A block diagram of the EFR32MG12 SoC is shown in the figure below. Radio Transceiver 2G4RF_ION BALUN PA IFADC PGA Frequency Synthesizer Q To RF Frontend Circuits AGC MOD BUFC I Digital Peripherals TIMER PCNT RTC / RTCC Port Mapper USART I2C 1024 KB ISP Flash Program Memory CRYPTO A A H P B B 256 KB RAM Memory Protection Unit PAVDD Energy Management Floating Point Unit Analog Peripherals LDMA Controller RFVDD IOVDD Voltage Monitor AVDD DVDD IDAC Watchdog Timer VDAC bypass VREGVDD VREGSW DC-DC Converter Voltage Regulator DECOUPLE Internal Reference Clock Management ULFRCO AUXHFRCO 12-bit ADC LFRCO LFXTAL_P LFXO LFXTAL_N HFXTAL_P Port B Drivers PBn Port C Drivers PCn Port D Drivers PDn Port F Drivers PFn Port I Drivers PIn Port J Drivers PJn Op-Amp Port K Drivers VDD PKn Temp Sense Capacitive Sense HFRCO + Analog Comparator HFXO HFXTAL_N PAn CRC LESENSE Mux & FB Brown Out / Power-On Reset ARM Cortex-M4 Core Input Mux Debug Signals (shared w/GPIO) Serial Wire and ETM Debug / Programming LEUART + - RESETn Reset Management Unit Port A Drivers CRYOTIMER APORT LNA 2G4RF_IOP IOVDD LETIMER RAC 2.4 GHz RF CRC DEMOD RFSENSE FRC Port I/O Configuration Figure 3.1. Detailed EFR32MG12 Block Diagram 3.2 Radio The MGM12P modules feature a highly configurable radio transceiver that supports a wide range of wireless protocols including zigbee, Thread, and Bluetooth Low Energy. 3.2.1 Antenna Interface The MGM12P module family includes options for either a high-performance, integrated chip-antenna (MGM12P-GA) or external antenna (MGM12P-GE) via a U.FL connector. The table below includes performance specifications for the integrated chip antenna. Table 3.1. Antenna Efficiency and Peak Gain (MGM12P) Parameter With optimal layout Note Efficiency -1.5 dB to -3 dB Peak gain 1.0 dBi silabs.com | Building a more connected world. Antenna efficiency, gain and radiation pattern are highly dependent on the application PCB layout and mechanical design. Refer to the Layout Guidelines Chapter for PCB layout and antenna integration guidelines for optimal performance. Typical efficiency gain is expected to be between -3.5 dB and -5 dB. Rev. 1.2 | 7 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview 3.2.2 Packet and State Trace The MGM12P Frame Controller has a packet and state trace unit that provides valuable information during the development phase. It features: * Non-intrusive trace of transmit data, receive data and state information * Data observability on a single-pin UART data output, or on a two-pin SPI data output * Configurable data output bitrate / baudrate * Multiplexed transmitted data, received data and state / meta information in a single serial data stream 3.2.3 Random Number Generator The Frame Controller (FRC) implements a random number generator that uses entropy gathered from noise in the RF receive chain. The data is suitable for use in cryptographic applications. Output from the random number generator can be used either directly or as a seed or entropy source for software-based random number generator algorithms such as Fortuna. silabs.com | Building a more connected world. Rev. 1.2 | 8 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview 3.3 Power The MGM12P has an Energy Management Unit (EMU) and efficient integrated regulators to generate internal supply voltages. Only a single external supply voltage is required, from which all internal voltages are created. An integrated DC-DC buck regulator is utilized to further reduce the current consumption. Figure 3.2. MGM12P Power Block for Modules (+10 dBm) silabs.com | Building a more connected world. Rev. 1.2 | 9 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview Figure 3.3. MGM12P Power Block for Modules (+17 dBm) 3.3.1 Energy Management Unit (EMU) The Energy Management Unit manages transitions of energy modes in the device. Each energy mode defines which peripherals and features are available and the amount of current the device consumes. The EMU can also be used to turn off the power to unused RAM blocks, and it contains control registers for the DC-DC regulator and the Voltage Monitor (VMON). The VMON is used to monitor multiple supply voltages. It has multiple channels which can be programmed individually by the user to determine if a sensed supply has fallen below a chosen threshold. 3.3.2 DC-DC Converter The DC-DC buck converter covers a wide range of load currents and provides up to 90% efficiency in energy modes EM0, EM1, EM2, and EM3. Patented RF noise mitigation allows operation of the DC-DC converter without degrading sensitivity of radio components. Protection features include programmable current limiting, short-circuit protection, and dead-time protection. The DC-DC converter may also enter bypass mode when the input voltage is too low for efficient operation. In bypass mode, the DC-DC input supply is internally connected directly to its output through a low resistance switch. Bypass mode also supports in-rush current limiting to prevent input supply voltage droops due to excessive output current transients. silabs.com | Building a more connected world. Rev. 1.2 | 10 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview 3.3.3 Power Domains The MGM12P has two peripheral power domains for operation in EM2 and lower. If all of the peripherals in a peripheral power domain are configured as unused, the power domain for that group will be powered off in the low-power mode, reducing the overall current consumption of the device. Table 3.2. Peripheral Power Subdomains Peripheral Power Domain 1 Peripheral Power Domain 2 ACMP0 ACMP1 PCNT0 PCNT1 ADC0 PCNT2 LETIMER0 CSEN LESENSE DAC0 APORT LEUART0 - I2C0 - I2C1 - IDAC 3.4 General Purpose Input/Output (GPIO) MGM12P has 25 General Purpose Input/Output pins. Each GPIO pin can be individually configured as either an output or input. More advanced configurations including open-drain, open-source, and glitch-filtering can be configured for each individual GPIO pin. The GPIO pins can be overridden by peripheral connections, like SPI communication. Each peripheral connection can be routed to several GPIO pins on the device. The input value of a GPIO pin can be routed through the Peripheral Reflex System to other peripherals. The GPIO subsystem supports asynchronous external pin interrupts. 3.5 Clocking 3.5.1 Clock Management Unit (CMU) The Clock Management Unit controls oscillators and clocks in the MGM12P. Individual enabling and disabling of clocks to all peripheral modules is perfomed by the CMU. The CMU also controls enabling and configuration of the oscillators. A high degree of flexibility allows software to optimize energy consumption in any specific application by minimizing power dissipation in unused peripherals and oscillators. 3.5.2 Internal Oscillators The MGM12P fully integrates two crystal oscillators and four RC oscillators, listed below. * A 38.4MHz high frequency crystal oscillator (HFXO) provides a precise timing reference for the MCU and radio. * A 32.768 kHz crystal oscillator (LFXO) provides an accurate timing reference for low energy modes. * An integrated high frequency RC oscillator (HFRCO) is available for the MCU system, when crystal accuracy is not required. The HFRCO employs fast startup at minimal energy consumption combined with a wide frequency range. * An integrated auxilliary high frequency RC oscillator (AUXHFRCO) is available for timing the general-purpose ADC and the Serial Wire debug port with a wide frequency range. * An integrated low frequency 32.768 kHz RC oscillator (LFRCO) can be used as a timing reference in low energy modes, when crystal accuracy is not required. * An integrated ultra-low frequency 1 kHz RC oscillator (ULFRCO) is available to provide a timing reference at the lowest energy consumption in low energy modes. silabs.com | Building a more connected world. Rev. 1.2 | 11 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview 3.6 Counters/Timers and PWM 3.6.1 Timer/Counter (TIMER) TIMER peripherals keep track of timing, count events, generate PWM outputs and trigger timed actions in other peripherals through the PRS system. The core of each TIMER is a 16-bit counter with up to 4 compare/capture channels. Each channel is configurable in one of three modes. In capture mode, the counter state is stored in a buffer at a selected input event. In compare mode, the channel output reflects the comparison of the counter to a programmed threshold value. In PWM mode, the TIMER supports generation of pulse-width modulation (PWM) outputs of arbitrary waveforms defined by the sequence of values written to the compare registers, with optional dead-time insertion available in timer unit TIMER_0 only. 3.6.2 Wide Timer/Counter (WTIMER) WTIMER peripherals function just as TIMER peripherals, but are 32 bits wide. They keep track of timing, count events, generate PWM outputs and trigger timed actions in other peripherals through the PRS system. The core of each WTIMER is a 32-bit counter with up to 4 compare/capture channels. Each channel is configurable in one of three modes. In capture mode, the counter state is stored in a buffer at a selected input event. In compare mode, the channel output reflects the comparison of the counter to a programmed threshold value. In PWM mode, the WTIMER supports generation of pulse-width modulation (PWM) outputs of arbitrary waveforms defined by the sequence of values written to the compare registers, with optional dead-time insertion available in timer unit WTIMER_0 only. 3.6.3 Real Time Counter and Calendar (RTCC) The Real Time Counter and Calendar (RTCC) is a 32-bit counter providing timekeeping in all energy modes. The RTCC includes a Binary Coded Decimal (BCD) calendar mode for easy time and date keeping. The RTCC can be clocked by any of the on-board oscillators with the exception of the AUXHFRCO, and it is capable of providing system wake-up at user defined instances. When receiving frames, the RTCC value can be used for timestamping. The RTCC includes 128 bytes of general purpose data retention, allowing easy and convenient data storage in all energy modes. 3.6.4 Low Energy Timer (LETIMER) The unique LETIMER is a 16-bit timer that is available in energy mode EM2 Deep Sleep in addition to EM1 Sleep and EM0 Active. This allows it to be used for timing and output generation when most of the device is powered down, allowing simple tasks to be performed while the power consumption of the system is kept at an absolute minimum. The LETIMER can be used to output a variety of waveforms with minimal software intervention. The LETIMER is connected to the Real Time Counter and Calendar (RTCC), and can be configured to start counting on compare matches from the RTCC. 3.6.5 Ultra Low Power Wake-up Timer (CRYOTIMER) The CRYOTIMER is a 32-bit counter that is capable of running in all energy modes. It can be clocked by either the 32.768 kHz crystal oscillator (LFXO), the 32.768 kHz RC oscillator (LFRCO), or the 1 kHz RC oscillator (ULFRCO). It can provide periodic Wakeup events and PRS signals which can be used to wake up peripherals from any energy mode. The CRYOTIMER provides a wide range of interrupt periods, facilitating flexible ultra-low energy operation. 3.6.6 Pulse Counter (PCNT) The Pulse Counter (PCNT) peripheral can be used for counting pulses on a single input or to decode quadrature encoded inputs. The clock for PCNT is selectable from either an external source on pin PCTNn_S0IN or from an internal timing reference, selectable from among any of the internal oscillators, except the AUXHFRCO. The module may operate in energy mode EM0 Active, EM1 Sleep, EM2 Deep Sleep, and EM3 Stop. 3.6.7 Watchdog Timer (WDOG) The watchdog timer can act both as an independent watchdog or as a watchdog synchronous with the CPU clock. It has windowed monitoring capabilities, and can generate a reset or different interrupts depending on the failure mode of the system. The watchdog can also monitor autonomous systems driven by PRS. silabs.com | Building a more connected world. Rev. 1.2 | 12 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview 3.7 Communications and Other Digital Peripherals 3.7.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) The Universal Synchronous/Asynchronous Receiver/Transmitter is a flexible serial I/O module. It supports full duplex asynchronous UART communication with hardware flow control as well as RS-485, SPI, MicroWire and 3-wire. It can also interface with devices supporting: * ISO7816 SmartCards * IrDA * I2S 3.7.2 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART) The unique LEUARTTM provides two-way UART communication on a strict power budget. Only a 32.768 kHz clock is needed to allow UART communication up to 9600 baud. The LEUART includes all necessary hardware to make asynchronous serial communication possible with a minimum of software intervention and energy consumption. 3.7.3 Inter-Integrated Circuit Interface (I2C) The I2C module provides an interface between the MCU and a serial I2C bus. It is capable of acting as both a master and a slave and supports multi-master buses. Standard-mode, fast-mode and fast-mode plus speeds are supported, allowing transmission rates from 10 kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also available, allowing implementation of an SMBus-compliant system. The interface provided to software by the I2C module allows precise timing control of the transmission process and highly automated transfers. Automatic recognition of slave addresses is provided in active and low energy modes. 3.7.4 Peripheral Reflex System (PRS) The Peripheral Reflex System provides a communication network between different peripheral modules without software involvement. Peripheral modules producing Reflex signals are called producers. The PRS routes Reflex signals from producers to consumer peripherals which in turn perform actions in response. Edge triggers and other functionality such as simple logic operations (AND, OR, NOT) can be applied by the PRS to the signals. The PRS allows peripheral to act autonomously without waking the MCU core, saving power. 3.7.5 Low Energy Sensor Interface (LESENSE) The Low Energy Sensor Interface LESENSETM is a highly configurable sensor interface with support for up to 16 individually configurable sensors. By controlling the analog comparators, ADC, and DAC, LESENSE is capable of supporting a wide range of sensors and measurement schemes, and can for instance measure LC sensors, resistive sensors and capacitive sensors. LESENSE also includes a programmable finite state machine which enables simple processing of measurement results without CPU intervention. LESENSE is available in energy mode EM2, in addition to EM0 and EM1, making it ideal for sensor monitoring in applications with a strict energy budget. 3.8 Security Features 3.8.1 GPCRC (General Purpose Cyclic Redundancy Check) The GPCRC module implements a Cyclic Redundancy Check (CRC) function. It supports both 32-bit and 16-bit polynomials. The supported 32-bit polynomial is 0x04C11DB7 (IEEE 802.3), while the 16-bit polynomial can be programmed to any value, depending on the needs of the application. silabs.com | Building a more connected world. Rev. 1.2 | 13 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview 3.8.2 Crypto Accelerator (CRYPTO) The Crypto Accelerator is a fast and energy-efficient autonomous hardware encryption and decryption accelerator. EFR32 devices support AES encryption and decryption with 128- or 256-bit keys, ECC over both GF(P) and GF(2m), SHA-1 and SHA-2 (SHA-224 and SHA-256). Supported block cipher modes of operation for AES include: ECB, CTR, CBC, PCBC, CFB, OFB, GCM, CBC-MAC, GMAC and CCM. Supported ECC NIST recommended curves include P-192, P-224, P-256, K-163, K-233, B-163 and B-233. The CRYPTO is tightly linked to the Radio Buffer Controller (BUFC) enabling fast and efficient autonomous cipher operations on data buffer content. It allows fast processing of GCM (AES), ECC and SHA with little CPU intervention. CRYPTO also provides trigger signals for DMA read and write operations. 3.8.3 True Random Number Generator (TRNG) The TRNG module is a non-deterministic random number generator based on a full hardware solution. The TRNG is validated with NIST800-22 and AIS-31 test suites as well as being suitable for FIPS 140-2 certification (for the purposes of cryptographic key generation). 3.8.4 Security Management Unit (SMU) The Security Management Unit (SMU) allows software to set up fine-grained security for peripheral access, which is not possible in the Memory Protection Unit (MPU). Peripherals may be secured by hardware on an individual basis, such that only priveleged accesses to the peripheral's register interface will be allowed. When an access fault occurs, the SMU reports the specific peripheral involved and can optionally generate an interrupt. 3.9 Analog 3.9.1 Analog Port (APORT) The Analog Port (APORT) is an analog interconnect matrix allowing access to analog modules on a flexible selection of pins. Each APORT bus consists of analog switches connected to a common wire. Since many clients can operate differentially, buses are grouped by X/Y pairs. 3.9.2 Analog Comparator (ACMP) The Analog Comparator is used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is higher. Inputs are selected from among internal references and external pins. The tradeoff between response time and current consumption is configurable by software. Two 6-bit reference dividers allow for a wide range of internally-programmable reference sources. The ACMP can also be used to monitor the supply voltage. An interrupt can be generated when the supply falls below or rises above the programmable threshold. 3.9.3 Analog to Digital Converter (ADC) The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits at up to 1 Msps. The output sample resolution is configurable and additional resolution is possible using integrated hardware for averaging over multiple samples. The ADC includes integrated voltage references and an integrated temperature sensor. Inputs are selectable from a wide range of sources, including pins configurable as either single-ended or differential. 3.9.4 Capacitive Sense (CSEN) The CSEN module is a dedicated Capacitive Sensing block for implementing touch-sensitive user interface elements such a switches and sliders. The CSEN module uses a charge ramping measurement technique, which provides robust sensing even in adverse conditions including radiated noise and moisture. The module can be configured to take measurements on a single port pin or scan through multiple pins and store results to memory through DMA. Several channels can also be shorted together to measure the combined capacitance or implement wake-on-touch from very low energy modes. Hardware includes a digital accumulator and an averaging filter, as well as digital threshold comparators to reduce software overhead. silabs.com | Building a more connected world. Rev. 1.2 | 14 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview 3.9.5 Digital to Analog Current Converter (IDAC) The Digital to Analog Current Converter can source or sink a configurable constant current. This current can be driven on an output pin or routed to the selected ADC input pin for capacitive sensing. The full-scale current is programmable between 0.05 A and 64 A with several ranges consisting of various step sizes. 3.9.6 Digital to Analog Converter (VDAC) The Digital to Analog Converter (VDAC) can convert a digital value to an analog output voltage. The VDAC is a fully differential, 500 ksps, 12-bit converter. The opamps are used in conjunction with the VDAC, to provide output buffering. One opamp is used per singleended channel, or two opamps are used to provide differential outputs. The VDAC may be used for a number of different applications such as sensor interfaces or sound output. The VDAC can generate high-resolution analog signals while the MCU is operating at low frequencies and with low total power consumption. Using DMA and a timer, the VDAC can be used to generate waveforms without any CPU intervention. The VDAC is available in all energy modes down to and including EM3. 3.9.7 Operational Amplifiers The opamps are low power amplifiers with a high degree of flexibility targeting a wide variety of standard opamp application areas. With flexible built-in programming for gain and interconnection they can be configured to support multiple common opamp functions. All pins are also available externally for filter configurations. Each opamp has a rail to rail input and a rail to rail output. They can be used in conjunction with the VDAC module or in stand-alone configurations. The opamps save energy, PCB space, and cost as compared with standalone opamps because they are integrated on-chip. 3.10 Reset Management Unit (RMU) The RMU is responsible for handling reset of the MGM12P. A wide range of reset sources are available, including several power supply monitors, pin reset, software controlled reset, core lockup reset and watchdog reset. 3.11 Core and Memory 3.11.1 Processor Core The ARM Cortex-M4F processor includes a 32-bit RISC processor integrating the following features and tasks in the system: * ARM Cortex-M4F RISC processor achieving 1.25 Dhrystone MIPS/MHz * Memory Protection Unit (MPU) supporting up to 8 memory segments * 1024 KB flash program memory * 256 KB RAM data memory * Configuration and event handling of all modules * 2-pin Serial-Wire debug interface 3.11.2 Memory System Controller (MSC) The Memory System Controller (MSC) is the program memory unit of the microcontroller. The flash memory is readable and writable from both the Cortex-M and DMA. The flash memory is divided into two blocks; the main block and the information block. Program code is normally written to the main block, whereas the information block is available for special user data and flash lock bits. There is also a read-only page in the information block containing system and device calibration data. Read and write operations are supported in energy modes EM0 Active and EM1 Sleep. 3.11.3 Linked Direct Memory Access Controller (LDMA) The Linked Direct Memory Access (LDMA) controller allows the system to perform memory operations independently of software. This reduces both energy consumption and software workload. The LDMA allows operations to be linked together and staged, enabling sophisticated operations to be implemented. silabs.com | Building a more connected world. Rev. 1.2 | 15 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview 3.12 Memory Map The MGM12P memory map is shown in the figures below. Figure 3.4. MGM12P Memory Map -- Core Peripherals and Code Space silabs.com | Building a more connected world. Rev. 1.2 | 16 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet System Overview Figure 3.5. MGM12P Memory Map -- Peripherals 3.13 Configuration Summary The features of the MGM12P are a subset of the feature set described in the device reference manual. The table below describes device specific implementation of the features. Remaining modules support full configuration. Table 3.3. Configuration Summary Module Configuration Pin Connections USART0 IrDA SmartCard US0_TX, US0_RX, US0_CLK, US0_CS USART1 IrDA I2S SmartCard US1_TX, US1_RX, US1_CLK, US1_CS USART2 IrDA SmartCard US2_TX, US2_RX, US2_CLK, US2_CS USART3 IrDA I2S SmartCard US3_TX, US3_RX, US3_CLK, US3_CS TIMER0 with DTI TIM0_CC[2:0], TIM0_CDTI[2:0] TIMER1 - TIM1_CC[3:0] WTIMER0 with DTI WTIM0_CC[2:0], WTIM0_CDTI[2:0] WTIMER1 - WTIM1_CC[3:0] silabs.com | Building a more connected world. Rev. 1.2 | 17 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4. Electrical Specifications 4.1 Electrical Characteristics All electrical parameters in all tables are specified under the following conditions, unless stated otherwise: * Typical values are based on TAMB=25 C and VDD= 3.3 V, by production test and/or technology characterization. * Radio performance numbers are measured in conducted mode, based on Silicon Laboratories reference designs using output power-specific external RF impedance-matching networks for interfacing to a 50 antenna. * Minimum and maximum values represent the worst conditions across supply voltage, process variation, and operating temperature, unless stated otherwise. Refer to Figure 3.2 MGM12P Power Block for Modules (+10 dBm) on page 9 and Figure 3.3 MGM12P Power Block for Modules (+17 dBm) on page 10 to see the relation between the modules external VDD pin and internal voltage supplies. The module has only one external power supply input (VDD). Refer to 4.1.2 General Operating Conditions for more details about operational supply and temperature limits. 4.1.1 Absolute Maximum Ratings Stresses above those listed below may cause permanent damage to the device. This is a stress rating only and functional operation of the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. For more information on the available quality and reliability data, see the Quality and Reliability Monitor Report at http://www.silabs.com/support/quality/pages/default.aspx. Table 4.1. Absolute Maximum Ratings Parameter Symbol Storage temperature range Test Condition Min Typ Max Unit TSTG -40 -- 85 C Voltage on any supply pin VDDMAX -0.3 -- 3.8 V Voltage ramp rate on any supply pin VDDRAMPMAX -- -- 1 V / s -0.3 -- Min of 5.25 and IOVDD +2 V -0.3 -- IOVDD+0.3 V -- -- 10 dBm Sink -- -- 50 mA Source -- -- 50 mA Sink -- -- 200 mA Source -- -- 200 mA DC Voltage on any over-volt- VDIGPIN age tolerant GPIO pin1 Input RF level PRFMAX2G4 Current per I/O pin IIOMAX Current for all I/O pins IIOALLMAX Note: 1. When a GPIO pin is routed to the analog module through the APORT, the maximum voltage = IOVDD. silabs.com | Building a more connected world. Rev. 1.2 | 18 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.2 General Operating Conditions Table 4.2. General Operating Conditions Parameter Symbol Test Condition Min Typ Max Unit Operating Ambient temperature range TA -G temperature grade -40 25 85 C VDD supply voltage 1 VVDD DCDC in regulation 2.4 3.3 3.8 V DCDC in bypass 50mA load 1.8 3.3 3.8 V FWAIT = 1, VSCALE2 -- -- 40 MHz FWAIT = 0, VSCALE0 -- -- 20 MHz Core Clock Frequency fCORE Note: 1. The minimum voltage required in bypass mode is calculated using RBYP from the DCDC specification table. Requirements for other loads can be calculated as VDVDD_min+ILOAD * RBYP_max. 4.1.3 DC-DC Converter Table 4.3. DC-DC Converter Parameter Symbol Test Condition Min Typ Max Unit Input voltage range VDCDC_I Bypass mode, IDCDC_LOAD = 50 mA 1.8 -- VVREGVDD_ V Low noise (LN) mode, 1.8 V output, IDCDC_LOAD = 100 mA, or Low power (LP) mode, 1.8 V output, IDCDC_LOAD = 10 mA 2.4 Low noise (LN) mode, 1.8 V output, IDCDC_LOAD = 200 mA 2.6 Output voltage programmable range1 VDCDC_O Max load current ILOAD_MAX MAX -- VVREGVDD_ V MAX -- VVREGVDD_ V MAX 1.8 -- VVREGVDD V Low noise (LN) mode, Medium Drive2 -- -- 100 mA Low noise (LN) mode, Light Drive2 -- -- 50 mA Low power (LP) mode, LPCMPBIASEMxx3 = 0 -- -- 75 A Low power (LP) mode, LPCMPBIASEMxx3 = 3 -- -- 10 mA Note: 1. Due to internal dropout, the DC-DC output will never be able to reach its input voltage, VVDD 2. Drive levels are defined by configuration of the PFETCNT and NFETCNT registers. Light Drive: PFETCNT=NFETCNT=3; Medium Drive: PFETCNT=NFETCNT=7; Heavy Drive: PFETCNT=NFETCNT=15. 3. In EMU_DCDCMISCCTRL register silabs.com | Building a more connected world. Rev. 1.2 | 19 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.4 Current Consumption 4.1.4.1 Current Consumption 3.3 V using DC-DC Converter Unless otherwise indicated, typical conditions are: VDD = 3.3 V, DC-DC enabled. TOP = 25 C. Minimum and maximum values in this table represent the worst conditions across supply voltage and process variation at TOP = 25 C. Table 4.4. Current Consumption 3.3 V using DC-DC Converter Parameter Symbol Min Typ Max Unit 38.4 MHz crystal, CPU running while loop from flash4 -- 88 -- A/MHz 38 MHz HFRCO, CPU running Prime from flash -- 70 -- A/MHz 38 MHz HFRCO, CPU running while loop from flash -- 70 -- A/MHz 38 MHz HFRCO, CPU running CoreMark from flash -- 85 -- A/MHz 26 MHz HFRCO, CPU running while loop from flash -- 77 -- A/MHz 1 MHz HFRCO, CPU running while loop from flash -- 636 -- A/MHz 38.4 MHz crystal, CPU running while loop from flash4 -- 98 -- A/MHz 38 MHz HFRCO, CPU running Prime from flash -- 81 -- A/MHz 38 MHz HFRCO, CPU running while loop from flash -- 82 -- A/MHz 38 MHz HFRCO, CPU running CoreMark from flash -- 95 -- A/MHz 26 MHz HFRCO, CPU running while loop from flash -- 95 -- A/MHz 1 MHz HFRCO, CPU running while loop from flash -- 1155 -- A/MHz Current consumption in EM0 IACTIVE_CCM_VS mode with all peripherals disabled and voltage scaling enabled, DCDC in Low Noise CCM mode1. 19 MHz HFRCO, CPU running while loop from flash -- 101 -- A/MHz 1 MHz HFRCO, CPU running while loop from flash -- 1155 -- A/MHz Current consumption in EM1 IEM1_DCM mode with all peripherals disabled, DCDC in Low Noise DCM mode2. 38.4 MHz crystal4 -- 59 -- A/MHz 38 MHz HFRCO -- 41 -- A/MHz 26 MHz HFRCO -- 48 -- A/MHz 1 MHz HFRCO -- 610 -- A/MHz 19 MHz HFRCO -- 52 -- A/MHz 1 MHz HFRCO -- 587 -- A/MHz Current consumption in EM0 IACTIVE_DCM mode with all peripherals disabled, DCDC in Low Noise DCM mode2. Current consumption in EM0 IACTIVE_CCM mode with all peripherals disabled, DCDC in Low Noise CCM mode1. Current consumption in EM1 IEM1_DCM_VS mode with all peripherals disabled and voltage scaling enabled, DCDC in Low Noise DCM mode2. silabs.com | Building a more connected world. Test Condition Rev. 1.2 | 20 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Test Condition Min Typ Max Unit Current consumption in EM2 IEM2_VS mode, with votage scaling enabled, DCDC in LP mode. Full 256 kB RAM retention and RTCC running from LFXO -- 2.62 -- A Current consumption in EM3 IEM3_VS mode, with voltage scaling enabled. Full 256 kB RAM retention and CRYOTIMER running from ULFRCO -- 2.33 -- A 128 byte RAM retention, RTCC running from LFXO -- 1.21 -- A 128 byte RAM retention, CRYOTIMER running from ULFRCO -- 0.91 -- A 128 byte RAM retention, no RTCC -- 0.91 -- A No RAM retention, no RTCC -- 0.58 -- A 3 Current consumption in EM4H mode, with voltage scaling enabled. Current consumption in EM4S mode IEM4H_VS IEM4S Note: 1. DCDC Low Noise CCM Mode = Light Drive (PFETCNT=NFETCNT=3), F=6.4 MHz (RCOBAND=4), ANASW=DVDD. 2. DCDC Low Noise DCM Mode = Light Drive (PFETCNT=NFETCNT=3), F=3.0 MHz (RCOBAND=0), ANASW=DVDD. 3. DCDC Low Power Mode = Medium Drive (PFETCNT=NFETCNT=7), LPOSCDIV=1, LPCMPBIASEM234H=0, LPCLIMILIMSEL=1, ANASW=DVDD. 4. CMU_HFXOCTRL_LOWPOWER=0. 5. CMU_LFRCOCTRL_ENVREF = 1, CMU_LFRCOCTRL_VREFUPDATE = 1 silabs.com | Building a more connected world. Rev. 1.2 | 21 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.4.2 Current Consumption Using Radio 3.3 V with DC-DC Unless otherwise indicated, typical conditions are: VDD = 3.3 V, DC-DC enabled. TOP = 25 C. Minimum and maximum values in this table represent the worst conditions across supply voltage and process variation at TOP = 25 C. Table 4.5. Current Consumption Using Radio 3.3 V with DC-DC Parameter Symbol Test Condition Min Typ Max Unit Current consumption in receive mode, active packet reception (MCU in EM1 @ 38.4 MHz, peripheral clocks disabled). IRX_ACTIVE 1 Mbit/s, 2GFSK, F = 2.4 GHz, Radio clock prescaled by 4 -- 10.3 -- mA 2 Mbit/s, 2GFSK, F = 2.4 GHz, Radio clock prescaled by 4 -- 11.5 -- mA LNA in bypass. 802.15.4 receiving frame, F = 2.4 GHz, Radio clock prescaled by 3 -- 10.8 -- mA IRX_LISTEN Current consumption in receive mode, listening for packet (MCU in EM1 @ 38.4 MHz, peripheral clocks disabled) 1 Mbit/s, 2GFSK, F = 2.4 GHz, No radio clock prescaling -- 11.6 -- mA 2 Mbit/s, 2GFSK, F = 2.4 GHz, No radio clock prescaling -- 12.6 -- mA 802.15.4, F = 2.4 GHz, No radio clock prescaling -- 12.3 -- mA F = 2.4 GHz, CW, 0 dBm output power, Radio clock prescaled by 1 (MGM12P02) -- 10 -- mA F = 2.4 GHz, CW, 0 dBm output power, Radio clock prescaled by 1 (MGM12P22) -- 15.8 -- F = 2.4 GHz, CW, 8 dBm output power (MGM12P02) -- 27.1 -- mA F = 2.4 GHz, CW, 8 dBm output power (MGM12P22) -- 31.8 -- mA F = 2.4 GHz, CW, 10.0 dBm output power (MGM12P02) -- 35.4 -- mA F = 2.4 GHz, CW, 10.0 dBm output power (MGM12P22) -- 39.2 -- mA F = 2.4 GHz, CW, 17.0 dBm output power, PAVDD connected directly to VDD -- 121 -- mA LNA in bypass. Current consumption in transmit mode (MCU in EM1 @ 38.4 MHz, peripheral clocks disabled) ITX LNA in bypass. silabs.com | Building a more connected world. Rev. 1.2 | 22 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.5 Wake Up Times Table 4.6. Wake Up Times Parameter Symbol Wakeup time from EM1 tEM1_WU Wake up from EM2 tEM2_WU Wake up from EM3 tEM3_WU Test Condition Min Typ Max Unit -- 3 -- AHB Clocks Code execution from flash -- 10.1 -- s Code execution from RAM -- 3.2 -- s Code execution from flash -- 10.1 -- s Code execution from RAM -- 3.2 -- s Wake up from EM4H1 tEM4H_WU Executing from flash -- 80 -- s Wake up from EM4S1 tEM4S_WU Executing from flash -- 291 -- s Time from release of reset source to first instruction exectution. tRESET Soft Pin Reset released -- 43 -- s Any other reset released -- 350 -- s Power Mode Scaling time tSCALE VSCALE0 to VSCALE2, HFCLK = 19 MHz2, 4 -- 31.8 -- s VSCALE2 to VSCALE0, HFCLK = 19 MHz2, 3 -- 4.3 -- Note: 1. Time from wakeup request until first instruction is executed. Wakeup results in device reset. 2. VSCALE0 to VSCALE2 voltage change transitions occur at a rate of 10 mV/s for approximately 20 s. During this transition, peak currents will be dependent on the value of the DECOUPLE output capacitor, from 35 mA (with a 1 F capacitor) to 70 mA (with a 2.7 F capacitor). 3. Scaling down from VSCALE2 to VSCALE0 requires approximately 2.8 s + 29 HFCLKs. 4. Scaling up from VSCALE0 to VSCALE2 requires approximately 30.3 s + 28 HFCLKs. silabs.com | Building a more connected world. Rev. 1.2 | 23 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.6 Brown Out Detector (BOD) Table 4.7. Brown Out Detector (BOD) Parameter Symbol Test Condition Min Typ Max Unit DVDD BOD threshold VDVDDBOD DVDD rising -- -- 1.62 V DVDD falling (EM0/EM1) 1.35 -- -- V DVDD falling (EM2/EM3) 1.3 -- -- V DVDD BOD hysteresis VDVDDBOD_HYST -- 18 -- mV DVDD BOD response time tDVDDBOD_DELAY Supply drops at 0.1V/s rate -- 2.4 -- s AVDD BOD threshold VAVDDBOD -- -- 1.8 V AVDD falling (EM0/EM1) 1.62 -- -- V AVDD falling (EM2/EM3) 1.53 -- -- V AVDD rising AVDD BOD hysteresis VAVDDBOD_HYST -- 20 -- mV AVDD BOD response time tAVDDBOD_DELAY Supply drops at 0.1V/s rate -- 2.4 -- s EM4 BOD threshold VEM4DBOD AVDD rising -- -- 1.7 V AVDD falling 1.45 -- -- V -- 25 -- mV -- 300 -- s EM4 BOD hysteresis VEM4BOD_HYST EM4 BOD response time tEM4BOD_DELAY Supply drops at 0.1V/s rate 4.1.7 Frequency Synthesizer Table 4.8. Frequency Synthesizer Parameter Symbol Test Condition Min Typ Max Unit RF Synthesizer Frequency range fRANGE 2400 - 2483.5 MHz 2400 -- 2483.5 MHz LO tuning frequency resolution with 38.4 MHz crystal fRES 2400 - 2483.5 MHz -- -- 73 Hz Frequency deviation resolution with 38.4 MHz crystal dfRES 2400 - 2483.5 MHz -- -- 73 Hz Maximum frequency deviation with 38.4 MHz crystal dfMAX 2400 - 2483.5 MHz -- -- 1677 kHz 4.1.8 2.4 GHz RF Transceiver Characteristics silabs.com | Building a more connected world. Rev. 1.2 | 24 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.8.1 RF Transmitter General Characteristics for 2.4 GHz Band Unless otherwise indicated, typical conditions are: TOP = 25 C, VDD = 3.3 V, DVDD = RFVDD = PAVDD. RFVDD and PAVDD path is filtered using ferrites. Crystal frequency=38.4 MHz. RF center frequency 2.45 GHz. Table 4.9. RF Transmitter General Characteristics for 2.4 GHz Band Parameter Symbol Test Condition Min Typ Max Unit Maximum TX power1 POUTMAX 17 dBm-rated part numbers. PAVDD connected directly to VDD2 -- 17 -- dBm 10 dBm-rated part numbers -- 10 -- dBm -30 -- dBm Minimum active TX Power POUTMIN CW Output power step size POUTSTEP -5 dBm< Output power < 0 dBm -- 1 -- dB 0 dBm < output power < POUTMAX -- 0.5 -- dB 1.8 V < VVREGVDD < 3.8 V, PAVDD connected directly to VDD, for output power > 10 dBm. -- 5.7 -- dB 1.8 V < VVREGVDD < 3.8 V using DC-DC converter -- 3.4 -- dB From -40 to +85 C, PAVDD connected to DC-DC output -- 1.5 -- dB From -40 to +85 C, PAVDD connected to VDD -- 1.5 -- dB Over RF tuning frequency range -- 0.2 -- dB 2400 -- 2483.5 MHz Output power variation vs supply at POUTMAX Output power variation vs temperature at POUTMAX POUTVAR_V POUTVAR_T Output power variation vs RF POUTVAR_F frequency at POUTMAX RF tuning frequency range FRANGE Note: 1. Supported transmit power levels are determined by the ordering part number (OPN). Transmit power ratings for all devices covered in this datasheet can be found in the Max TX Power column of the Ordering Information Table. 2. For Bluetooth, the Maximum TX power on Channel 2456 is limited to +15 dBm to comply with In-band Spurious emissions. silabs.com | Building a more connected world. Rev. 1.2 | 25 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.8.2 RF Receiver General Characteristics for 2.4 GHz Band Unless otherwise indicated, typical conditions are: TOP = 25 C, VDD = 3.3 V, DC-DC enabled. Crystal frequency=38.4 MHz. RF center frequency 2.45 GHz. Table 4.10. RF Receiver General Characteristics for 2.4 GHz Band Parameter Symbol RF tuning frequency range FRANGE Receive mode maximum spurious emission SPURRX Max spurious emissions dur- SPURRX_FCC ing active receive mode, per FCC Part 15.109(a) Test Condition Min Typ Max Unit 2400 -- 2483.5 MHz 30 MHz to 1 GHz -- -57 -- dBm 1 GHz to 12 GHz -- -47 -- dBm 216 MHz to 960 MHz, Conducted Measurement -- -55.2 -- dBm Above 960 MHz, Conducted Measurement -- -47.2 -- dBm 4.1.8.3 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 1 Mbps Data Rate Unless otherwise indicated, typical conditions are: T = 25 C, VDD = 3.3 V, DC-DC enabled. Crystal frequency=38.4MHz. RF center frequency 2.45 GHz. Table 4.11. RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 1 Mbps Data Rate Parameter Symbol Test Condition Min Typ Max Unit Sensitivity, 0.1% BER SENS Signal is reference signal1. Using DC-DC converter. -- -95 -- dBm Signal is reference signal.1 Using DC-DC converter. -- -101.6 -- dBm MGM12P22 and MGM12P32. Note: 1. Reference signal is defined 2GFSK at -67 dBm, Modulation index = 0.5, BT = 0.5, Bit rate = 1 Mbps, desired data = PRBS9; interferer data = PRBS15; frequency accuracy better than 1 ppm. silabs.com | Building a more connected world. Rev. 1.2 | 26 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.8.4 RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 2 Mbps Data Rate Unless otherwise indicated, typical conditions are: T = 25 C, VDD = 3.3 V, DC-DC enabled. Crystal frequency=38.4MHz. RF center frequency 2.45 GHz.1 Table 4.12. RF Receiver Characteristics for Bluetooth Low Energy in the 2.4GHz Band, 2 Mbps Data Rate Parameter Symbol Test Condition Min Typ Max Unit Sensitivity, 0.1% BER SENS Signal is reference signal1. Using DC-DC converter. -- -91 -- dBm Signal is reference signal.1 Using DC-DC converter. -- -97 -- dBm MGM12P22 and MGM12P32. Note: 1. Reference signal is defined 2GFSK at -67 dBm, Modulation index = 0.5, BT = 0.5, Bit rate = 2 Mbps, desired data = PRBS9; interferer data = PRBS15; frequency accuracy better than 1 ppm. 4.1.8.5 RF Receiver Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band Unless otherwise indicated, typical conditions are: TOP = 25 C, VDD = 3.3 V, DC-DC enabled. Crystal frequency=38.4 MHz. RF center frequency 2.45 GHz. Table 4.13. RF Receiver Characteristics for 802.15.4 DSSS-OQPSK in the 2.4 GHz Band Parameter Symbol Test Condition Min Typ Max Unit Sensitivity, 1% PER SENS Signal is reference signal. Packet length is 20 octets. Using DC-DC converter. -- -102 -- dBm Signal is reference signal. Packet length is 20 octets. Using DC-DC converter. -- -105.7 -- dBm MGM12P22 and MGM12P32. Note: 1. Reference signal is defined as O-QPSK DSSS per 802.15.4, Frequency range = 2400-2483.5 MHz, Symbol rate = 62.5 ksymbols/s. silabs.com | Building a more connected world. Rev. 1.2 | 27 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.9 Current Consumption 4.1.9.1 Low-Frequency Crystal Oscillator (LFXO) Table 4.14. Low-Frequency Crystal Oscillator (LFXO) Parameter Symbol Crystal Frequency fLFXO Test Condition Crystal Frequency Tolerance Min Typ Max Unit -- 32.768 -- kHz +100 ppm Max Unit -100 4.1.9.2 High-Frequency Crystal Oscillator (HFXO) Table 4.15. High-Frequency Crystal Oscillator (HFXO) Parameter Symbol Crystal Frequency fHFXO Frequency Tolerance for the crystal FTHFXO Test Condition Min Typ 38.4 -40 MHz -- 40 ppm 4.1.9.3 Low-Frequency RC Oscillator (LFRCO) Table 4.16. Low-Frequency RC Oscillator (LFRCO) Parameter Symbol Test Condition Min Typ Max Unit Oscillation frequency fLFRCO ENVREF2 = 1 31.7 32.768 33.3 kHz ENVREF2 = 0 31.8 32.768 33.2 kHz -- 500 -- s ENVREF = 1 in CMU_LFRCOCTRL -- 370 -- nA ENVREF = 0 in CMU_LFRCOCTRL -- 520 -- nA Startup time tLFRCO Current consumption 1 ILFRCO Note: 1. Block is supplied by AVDD if ANASW = 0, or DVDD if ANASW=1 in EMU_PWRCTRL register. 2. in CMU_LFRCOCTRL register. silabs.com | Building a more connected world. Rev. 1.2 | 28 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.9.4 High-Freqency RC Oscillator (HFRCO) Table 4.17. High-Freqency RC Oscillator (HFRCO) Parameter Symbol Test Condition Min Typ Max Unit Frequency Accuracy fHFRCO_ACC At production calibrated frequencies, across supply voltage and temperature -2.5 -- 2.5 % Start-up time tHFRCO fHFRCO 19 MHz -- 300 -- ns 4 < fHFRCO < 19 MHz -- 1 -- s fHFRCO 4 MHz -- 2.5 -- s fHFRCO = 38 MHz -- 244 265 A fHFRCO = 32 MHz -- 204 222 A fHFRCO = 26 MHz -- 173 188 A fHFRCO = 19 MHz -- 143 156 A fHFRCO = 16 MHz -- 123 136 A fHFRCO = 13 MHz -- 110 124 A fHFRCO = 7 MHz -- 85 94 A fHFRCO = 4 MHz -- 32 37 A fHFRCO = 2 MHz -- 28 34 A fHFRCO = 1 MHz -- 26 31 A -- 0.8 -- % Current consumption on all supplies IHFRCO Coarse trim step size (% of period) SSHFRCO_COARS Fine trim step size (% of period) SSHFRCO_FINE -- 0.1 -- % Period jitter PJHFRCO -- 0.2 -- % RMS E silabs.com | Building a more connected world. Rev. 1.2 | 29 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.9.5 Auxiliary High-Freqency RC Oscillator (AUXHFRCO) Table 4.18. Auxiliary High-Freqency RC Oscillator (AUXHFRCO) Parameter Symbol Test Condition Frequency Accuracy fAUXHFRCO_ACC Start-up time tAUXHFRCO Current consumption on all supplies IAUXHFRCO Coarse trim step size (% of period) CO_COARSE Fine trim step size (% of period) CO_FINE Period jitter PJAUXHFRCO Min Typ Max Unit At production calibrated frequencies, across supply voltage and temperature -3 -- 3 % fAUXHFRCO 19 MHz -- 400 -- ns 4 < fAUXHFRCO < 19 MHz -- 1.4 -- s fAUXHFRCO 4 MHz -- 2.5 -- s fAUXHFRCO = 38 MHz -- 193 213 A fAUXHFRCO = 32 MHz -- 157 175 A fAUXHFRCO = 26 MHz -- 135 151 A fAUXHFRCO = 19 MHz -- 108 122 A fAUXHFRCO = 16 MHz -- 100 113 A fAUXHFRCO = 13 MHz -- 77 88 A fAUXHFRCO = 7 MHz -- 53 63 A fAUXHFRCO = 4 MHz -- 29 36 A fAUXHFRCO = 2 MHz -- 28 34 A fAUXHFRCO = 1 MHz -- 27 31 A -- 0.8 -- % -- 0.1 -- % -- 0.2 -- % RMS Min Typ Max Unit 0.95 1 1.07 kHz SSAUXHFRSSAUXHFR- 4.1.9.6 Ultra-low Frequency RC Oscillator (ULFRCO) Table 4.19. Ultra-low Frequency RC Oscillator (ULFRCO) Parameter Symbol Oscillation frequency fULFRCO silabs.com | Building a more connected world. Test Condition Rev. 1.2 | 30 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.10 Flash Memory Characteristics3 Table 4.20. Flash Memory Characteristics3 Parameter Symbol Flash erase cycles before failure ECFLASH Flash data retention RETFLASH Word (32-bit) programming time tW_PROG Test Condition Min Typ Max Unit 10000 -- -- cycles 10 -- -- years Burst write, 128 words, average time per word 20 24.4 30 s Single word 60 68.4 80 Page erase time tPERASE 20 26.4 35 ms Mass erase time1 tMERASE 20 26.5 35 ms Device erase time2 tDERASE -- 69 100 ms Page erase current4 IERASE -- -- 1.6 mA Write current4 IWRITE -- -- 3.8 mA Supply voltage during flash erase and write VFLASH 1.62 -- 3.6 V Note: 1. Mass erase is issued by the CPU and erases all flash 2. Device erase is issued over the AAP interface and erases all flash, SRAM, the Lock Bit (LB) page, and the User data page Lock Word (ULW) 3. Flash data retention information is published in the Quarterly Quality and Reliability Report. 4. Measured at 25 C silabs.com | Building a more connected world. Rev. 1.2 | 31 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.11 General-Purpose I/O (GPIO) Table 4.21. General-Purpose I/O (GPIO) Parameter Symbol Test Condition Min Typ Max Unit Input low voltage VIL GPIO pins -- -- IOVDD*0.3 V Input high voltage VIH GPIO pins IOVDD*0.7 -- -- V Output high voltage relative to IOVDD VOH Sourcing 3 mA, IOVDD 3 V, IOVDD*0.8 -- -- V IOVDD*0.6 -- -- V IOVDD*0.8 -- -- V IOVDD*0.6 -- -- V -- -- IOVDD*0.2 V -- -- IOVDD*0.4 V -- -- IOVDD*0.2 V -- -- IOVDD*0.4 V All GPIO except LFXO pins, GPIO IOVDD -- 0.1 30 nA LFXO Pins, GPIO IOVDD -- 0.1 50 nA IOVDD < GPIO IOVDD + 2 V -- 3.3 15 A 30 40 65 k 15 25 45 ns -- 1.8 -- ns -- 4.5 -- ns DRIVESTRENGTH1 = WEAK Sourcing 1.2 mA, IOVDD 1.62 V, DRIVESTRENGTH1 = WEAK Sourcing 20 mA, IOVDD 3 V, DRIVESTRENGTH1 = STRONG Sourcing 8 mA, IOVDD 1.62 V, DRIVESTRENGTH1 = STRONG Output low voltage relative to VOL IOVDD Sinking 3 mA, IOVDD 3 V, DRIVESTRENGTH1 = WEAK Sinking 1.2 mA, IOVDD 1.62 V, DRIVESTRENGTH1 = WEAK Sinking 20 mA, IOVDD 3 V, DRIVESTRENGTH1 = STRONG Sinking 8 mA, IOVDD 1.62 V, DRIVESTRENGTH1 = STRONG Input leakage current IIOLEAK Input leakage current on 5VTOL pads above IOVDD I5VTOLLEAK I/O pin pull-up/pull-down resistor RPUD Pulse width of pulses retIOGLITCH moved by the glitch suppression filter Output fall time, From 70% to 30% of VIO tIOOF CL = 50 pF, DRIVESTRENGTH1 = STRONG, SLEWRATE1 = 0x6 CL = 50 pF, DRIVESTRENGTH1 = WEAK, SLEWRATE1 = 0x6 silabs.com | Building a more connected world. Rev. 1.2 | 32 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Test Condition Output rise time, From 30% to 70% of VIO tIOOR CL = 50 pF, Min Typ Max Unit -- 2.2 -- ns -- 7.4 -- ns Min Typ Max Unit DRIVESTRENGTH1 = STRONG, SLEWRATE = 0x61 CL = 50 pF, DRIVESTRENGTH1 = WEAK, SLEWRATE1 = 0x6 Note: 1. In GPIO_Pn_CTRL register 4.1.12 Voltage Monitor (VMON) Table 4.22. Voltage Monitor (VMON) Parameter Symbol Test Condition Supply Current (including I_SENSE) IVMON In EM0 or EM1, 1 supply monitored -- 6.3 10 A In EM0 or EM1, 4 supplies monitored -- 12.5 17 A In EM2, EM3 or EM4, 1 supply monitored and above threshol -- 62 -- nA In EM2, EM3 or EM4, 1 supply monitored and below threshold -- 62 -- nA In EM2, EM3 or EM4, 4 supplies monitored and all above threshold -- 99 -- nA In EM2, EM3 or EM4, 4 supplies monitored and all below threshold -- 99 -- nA In EM0 or EM1 -- 2 -- A In EM2, EM3 or EM4 -- 2 -- nA 1.62 -- 3.4 V Coarse -- 200 -- mV Fine -- 20 -- mV Supply drops at 1V/s rate -- 460 -- ns -- 26 -- mV Loading of Monitored Supply ISENSE Threshold range VVMON_RANGE Threshold step size NVMON_STESP Response time tVMON_RES Hysteresis VVMON_HYST silabs.com | Building a more connected world. Rev. 1.2 | 33 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.13 Analog to Digital Converter (ADC) Table 4.23. Analog to Digital Converter (ADC) Parameter Symbol Resolution VRESOLUTION Input voltage range VADCIN Test Condition Single ended Differential Input range of external refer- VADCREFIN_P ence voltage, single ended and differential Min Typ Max Unit 6 -- 12 Bits -- -- VFS V -VFS/2 -- VFS/2 V 1 -- VAVDD V Power supply rejection2 PSRRADC At DC -- 80 -- dB Analog input common mode rejection ratio CMRRADC At DC -- 80 -- dB 1 Msps / 16 MHz ADCCLK, BIASPROG = 0, GPBIASACC = 1 3 -- 270 315 A 250 ksps / 4 MHz ADCCLK, BIASPROG = 6, GPBIASACC = 1 3 -- 125 -- A 62.5 ksps / 1 MHz ADCCLK, BIASPROG = 15, GPBIASACC = 1 3 -- 80 -- A Current from all supplies, us- IADC_NORMAL_LP 35 ksps / 16 MHz ADCCLK, BIAing internal reference buffer. SPROG = 0, GPBIASACC = 1 3 Duty-cycled operation. WAR5 ksps / 16 MHz ADCCLK BIAMUPMODE4 = NORMAL SPROG = 0, GPBIASACC = 1 3 -- 45 -- A -- 8 -- A Current from all supplies, us- IADC_STANDing internal reference buffer. BY_LP Duty-cycled operation. AWARMUPMODE4 = KEEPINSTANDBY or KEEPINSLOWACC 125 ksps / 16 MHz ADCCLK, BIASPROG = 0, GPBIASACC = 1 3 -- 105 -- A 35 ksps / 16 MHz ADCCLK, BIASPROG = 0, GPBIASACC = 1 3 -- 70 -- A Current from all supplies, us- IADC_CONTIing internal reference buffer. NOUS_HP Continous operation. WARMUPMODE4 = KEEPADCWARM 1 Msps / 16 MHz ADCCLK, BIASPROG = 0, GPBIASACC = 0 3 -- 325 -- A 250 ksps / 4 MHz ADCCLK, BIASPROG = 6, GPBIASACC = 0 3 -- 175 -- A 62.5 ksps / 1 MHz ADCCLK, BIASPROG = 15, GPBIASACC = 0 3 -- 125 -- A Current from all supplies, us- IADC_NORMAL_HP 35 ksps / 16 MHz ADCCLK, BIAing internal reference buffer. SPROG = 0, GPBIASACC = 0 3 Duty-cycled operation. WAR5 ksps / 16 MHz ADCCLK BIAMUPMODE4 = NORMAL SPROG = 0, GPBIASACC = 0 3 -- 85 -- A -- 16 -- A Current from all supplies, us- IADC_STANDing internal reference buffer. BY_HP Duty-cycled operation. AWARMUPMODE4 = KEEPINSTANDBY or KEEPINSLOWACC 125 ksps / 16 MHz ADCCLK, BIASPROG = 0, GPBIASACC = 0 3 -- 160 -- A 35 ksps / 16 MHz ADCCLK, BIASPROG = 0, GPBIASACC = 0 3 -- 125 -- A Current from HFPERCLK HFPERCLK = 16 MHz -- 160 -- A Current from all supplies, us- IADC_CONTIing internal reference buffer. NOUS_LP Continous operation. WARMUPMODE4 = KEEPADCWARM IADC_CLK silabs.com | Building a more connected world. Rev. 1.2 | 34 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol ADC clock frequency Min Typ Max Unit fADCCLK -- -- 16 MHz Throughput rate fADCRATE -- -- 1 Msps Conversion time1 tADCCONV 6 bit -- 7 -- cycles 8 bit -- 9 -- cycles 12 bit -- 13 -- cycles WARMUPMODE4 = NORMAL -- -- 5 s WARMUPMODE4 = KEEPINSTANDBY -- -- 2 s WARMUPMODE4 = KEEPINSLOWACC -- -- 1 s Internal reference6, differential 58 67 -- dB -- 68 -- dB Startup time of reference generator and ADC core SNDR at 1Msps and fIN = 10kHz tADCSTART SNDRADC Test Condition measurement External reference5, differential measurement Spurious-free dynamic range SFDRADC (SFDR) 1 MSamples/s, 10 kHz full-scale sine wave -- 75 -- dB Differential non-linearity (DNL) DNLADC 12 bit resolution, no missing codes -1 -- 2 LSB Integral non-linearity (INL), End point method INLADC 12 bit resolution -6 -- 6 LSB Offset error VADCOFFSETERR -3 0 3 LSB Gain error in ADC VADCGAIN Using internal reference -- -0.2 3.5 % Using external reference -- -1 -- % -- -1.84 -- mV/C Temperature sensor slope VTS_SLOPE Note: 1. Derived from ADCCLK 2. PSRR is referenced to AVDD when ANASW=0 and to DVDD when ANASW=1 in EMU_PWRCTRL 3. In ADCn_BIASPROG register 4. In ADCn_CNTL register 5. External reference is 1.25 V applied externally to ADCnEXTREFP, with the selection CONF in the SINGLECTRL_REF or SCANCTRL_REF register field and VREFP in the SINGLECTRLX_VREFSEL or SCANCTRLX_VREFSEL field. The differential input range with this configuration is 1.25 V. 6. Internal reference option used corresponds to selection 2V5 in the SINGLECTRL_REF or SCANCTRL_REF register field. The differential input range with this configuration is 1.25 V. Typical value is characterized using full-scale sine wave input. Minimum value is production-tested using sine wave input at 1.5 dB lower than full scale. silabs.com | Building a more connected world. Rev. 1.2 | 35 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.14 Analog Comparator (ACMP) Table 4.24. Analog Comparator (ACMP) Parameter Symbol Test Condition Input voltage range VACMPIN Supply voltage VACMPVDD Active current not including voltage reference2 IACMP Current consumption of inter- IACMPREF nal voltage reference2 silabs.com | Building a more connected world. Min Typ Max Unit ACMPVDD = ACMPn_CTRL_PWRSEL 1 -- -- VACMPVDD V BIASPROG4 0x10 or FULLBIAS4 = 0 1.8 -- VVREGVDD_ V 0x10 < BIASPROG4 0x20 and FULLBIAS4 = 1 2.1 BIASPROG4 = 1, FULLBIAS4 = 0 -- 50 -- nA BIASPROG4 = 0x10, FULLBIAS4 =0 -- 306 -- nA BIASPROG4 = 0x02, FULLBIAS4 =1 -- 6.5 -- A BIASPROG4 = 0x20, FULLBIAS4 =1 -- 75 92 A VLP selected as input using 2.5 V Reference / 4 (0.625 V) -- 50 -- nA VLP selected as input using VDD -- 20 -- nA VBDIV selected as input using 1.25 V reference / 1 -- 4.1 -- A VADIV selected as input using VDD/1 -- 2.4 -- A MAX -- VVREGVDD_ V MAX Rev. 1.2 | 36 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Test Condition Hysteresis (VCM = 1.25 V, BIASPROG4 = 0x10, FULLBIAS4 = 1) VACMPHYST Comparator delay3 tACMPDELAY Min Typ Max Unit HYSTSEL5 = HYST0 -3 -- 3 mV HYSTSEL5 = HYST1 5 18 27 mV HYSTSEL5 = HYST2 12 33 50 mV HYSTSEL5 = HYST3 17 46 65 mV HYSTSEL5 = HYST4 23 57 82 mV HYSTSEL5 = HYST5 26 68 98 mV HYSTSEL5 = HYST6 30 79 130 mV HYSTSEL5 = HYST7 34 90 150 mV HYSTSEL5 = HYST8 -3 0 3 mV HYSTSEL5 = HYST9 -27 -18 -5 mV HYSTSEL5 = HYST10 -50 -33 -12 mV HYSTSEL5 = HYST11 -65 -45 -17 mV HYSTSEL5 = HYST12 -82 -57 -23 mV HYSTSEL5 = HYST13 -98 -67 -26 mV HYSTSEL5 = HYST14 -130 -78 -30 mV HYSTSEL5 = HYST15 -150 -88 -34 mV BIASPROG4 = 1, FULLBIAS4 = 0 -- 30 -- s BIASPROG4 = 0x10, FULLBIAS4 =0 -- 3.7 -- s BIASPROG4 = 0x02, FULLBIAS4 =1 -- 360 -- ns BIASPROG4 = 0x20, FULLBIAS4 =1 -- 35 -- ns -35 -- 35 mV Offset voltage VACMPOFFSET BIASPROG4 =0x10, FULLBIAS4 =1 Reference Voltage VACMPREF Internal 1.25 V reference 1 1.25 1.47 V Internal 2.5 V reference 2 2.5 2.8 V CSRESSEL6 = 0 -- inf -- k CSRESSEL6 = 1 -- 15 -- k CSRESSEL6 = 2 -- 27 -- k CSRESSEL6 = 3 -- 39 -- k CSRESSEL6 = 4 -- 51 -- k CSRESSEL6 = 5 -- 100 -- k CSRESSEL6 = 6 -- 162 -- k CSRESSEL6 = 7 -- 235 -- k Capacitive sense internal re- RCSRES sistance silabs.com | Building a more connected world. Rev. 1.2 | 37 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Test Condition Min Typ Max Unit Note: 1. ACMPVDD is a supply chosen by the setting in ACMPn_CTRL_PWRSEL and may be IOVDD, AVDD or DVDD 2. The total ACMP current is the sum of the contributions from the ACMP and its internal voltage reference. IACMPTOTAL = IACMP + IACMPREF 3. 100 mV differential drive 4. In ACMPn_CTRL register 5. In ACMPn_HYSTERESIS register 6. In ACMPn_INPUTSEL register silabs.com | Building a more connected world. Rev. 1.2 | 38 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.15 Digital to Analog Converter (VDAC) DRIVESTRENGTH = 2 unless otherwise specified. Table 4.25. Digital to Analog Converter (VDAC) Parameter Symbol Test Condition Output voltage VDACOUT Single-Ended Differential2 Current consumption including references (2 channels)1 IDAC 500 ksps, 12-bit, Min Typ Max Unit 0 -- VVREF V -VVREF -- VVREF V -- 396 -- A -- 72 -- A -- 1.2 -- A DRIVESTRENGTH = 2, REFSEL = 4 44.1 ksps, 12-bit, DRIVESTRENGTH = 1, REFSEL = 4 200 Hz refresh rate, 12-bit Sample- Off mode in EM2, DRIVESTRENGTH = 2, BGRREQTIME = 1, EM2REFENTIME = 9, REFSEL = 4, SETTLETIME = 0x0A, WARMUPTIME = 0x02 Current from HFPERCLK4 IDAC_CLK -- 5.8 -- A/MHz Sample rate SRDAC -- -- 500 ksps DAC clock frequency fDAC -- -- 1 MHz Conversion time tDACCONV fDAC = 1MHz 2 -- -- s Settling time tDACSETTLE 50% fs step settling to 2 LSB -- 2.5 -- s Startup time tDACSTARTUP Enable to 90% fs output, settling to 10 LSB -- -- 12 s Output impedance ROUT DRIVESTRENGTH = 2, 0.4 V VOUT VOPA - 0.4 V, -8 mA < IOUT < 8 mA, Full supply range -- 2 -- DRIVESTRENGTH = 0 or 1, 0.4 V VOUT VOPA - 0.4 V, -400 A < IOUT < 400 A, Full supply range -- 2 -- DRIVESTRENGTH = 2, 0.1 V VOUT VOPA - 0.1 V, -2 mA < IOUT < 2 mA, Full supply range -- 2 -- DRIVESTRENGTH = 0 or 1, 0.1 V VOUT VOPA - 0.1 V, -100 A < IOUT < 100 A -- 2 -- Vout = 50% fs. DC -- 65.5 -- dB Power supply rejection ratio6 PSRR silabs.com | Building a more connected world. Rev. 1.2 | 39 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Min Typ Max Unit 500 ksps, single-ended, internal 1.25V reference -- 60.4 -- dB 500 ksps, single-ended, internal 2.5V reference -- 61.6 -- dB 500 ksps, single-ended, 3.3V VDD reference -- 64.0 -- dB 500 ksps, differential, internal 1.25V reference -- 63.3 -- dB 500 ksps, differential, internal 2.5V reference -- 64.4 -- dB 500 ksps, differential, 3.3V VDD reference -- 65.8 -- dB Signal to noise and distortion SNDRDAC_BAND 500 ksps, single-ended, internal 1.25V reference ratio (1 kHz sine wave). Noise band limited to 22 500 ksps, single-ended, internal kHz. 2.5V reference -- 65.3 -- dB -- 66.7 -- dB 500 ksps, single-ended, 3.3V VDD reference -- 70.0 -- dB 500 ksps, differential, internal 1.25V reference -- 67.8 -- dB 500 ksps, differential, internal 2.5V reference -- 69.0 -- dB 500 ksps, differential, 3.3VDD reference -- 68.5 -- dB -- 70.2 -- dB Signal to noise and distortion SNDRDAC ratio (1 kHz sine wave), Noise band limited to 250 kHz Test Condition Total harmonic distortion THD Differential non-linearity3 DNLDAC -0.99 -- 1 LSB Intergral non-linearity INLDAC -4 -- 4 LSB Offset error5 VOFFSET T = 25 C -8 -- 8 mV Across operating temperature range -25 -- 25 mV T= 25 C, Low-noise internal reference (REFSEL = 1V25LN or 2V5LN) -1.5 -- 1.5 % T = 25 C, Internal reference (REFSEL = 1V25 or 2V5) -5 -- 5 % T = 25 C, External reference (REFSEL = VDD or EXT) -1.5 -- 1.5 % Across operating temperature range, Low-noise internal reference (REFSEL = 1V25LN or 2V5LN) -3.5 -- 3.5 % Across operating temperature range, Internal reference (REFSEL = 1V25 or 2V5) -7.5 -- 7.5 % Across operating temperature range, External reference (REFSEL = VDD or EXT) -1.5 -- 1.5 % Gain error5 VGAIN silabs.com | Building a more connected world. Rev. 1.2 | 40 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol External Load Capactiance, OUTSCALE=0 CLOAD Test Condition Min Typ Max Unit -- -- 75 pF Note: 1. Supply current specifications are for VDAC circuitry operating with static output only and do not include current required to drive the load. 2. In differential mode, the output is defined as the difference between two single-ended outputs. Absolute voltage on each output is limited to the single-ended range. 3. Entire range is monotonic and has no missing codes. 4. Current from HFPERCLK is dependent on HFPERCLK frequency. This current contributes to the total supply current used when the clock to the DAC module is enabled in the CMU. 5. Gain is calculated by measuring the slope from 10% to 90% of full scale. Offset is calculated by comparing actual VDAC output at 10% of full scale to ideal VDAC output at 10% of full scale with the measured gain. 6. PSRR calculated as 20 * log10(VDD / VOUT), VDAC output at 90% of full scale. silabs.com | Building a more connected world. Rev. 1.2 | 41 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.16 Current Digital to Analog Converter (IDAC) Table 4.26. Current Digital to Analog Converter (IDAC) Parameter Symbol Number of ranges NIDAC_RANGES Output current IIDAC_OUT Linear steps within each range NIDAC_STEPS Step size SSIDAC Total accuracy, STEPSEL1 = ACCIDAC 0x80 Start up time tIDAC_SU silabs.com | Building a more connected world. Test Condition Min Typ Max Unit -- 4 -- - RANGSEL1 = RANGE0 0.05 -- 1.6 A RANGSEL1 = RANGE1 1.6 -- 4.7 A RANGSEL1 = RANGE2 0.5 -- 16 A RANGSEL1 = RANGE3 2 -- 64 A -- 32 -- RANGSEL1 = RANGE0 -- 50 -- nA RANGSEL1 = RANGE1 -- 100 -- nA RANGSEL1 = RANGE2 -- 500 -- nA RANGSEL1 = RANGE3 -- 2 -- A EM0 or EM1, AVDD=3.3 V, T = 25 C -3 -- 3 % EM0 or EM1, Across operating temperature range -18 -- 22 % EM2 or EM3, Source mode, RANGSEL1 = RANGE0, AVDD=3.3 V, T = 25 C -- -2 -- % EM2 or EM3, Source mode, RANGSEL1 = RANGE1, AVDD=3.3 V, T = 25 C -- -1.7 -- % EM2 or EM3, Source mode, RANGSEL1 = RANGE2, AVDD=3.3 V, T = 25 C -- -0.8 -- % EM2 or EM3, Source mode, RANGSEL1 = RANGE3, AVDD=3.3 V, T = 25 C -- -0.5 -- % EM2 or EM3, Sink mode, RANGSEL1 = RANGE0, AVDD=3.3 V, T = 25 C -- -0.7 -- % EM2 or EM3, Sink mode, RANGSEL1 = RANGE1, AVDD=3.3 V, T = 25 C -- -0.6 -- % EM2 or EM3, Sink mode, RANGSEL1 = RANGE2, AVDD=3.3 V, T = 25 C -- -0.5 -- % EM2 or EM3, Sink mode, RANGSEL1 = RANGE3, AVDD=3.3 V, T = 25 C -- -0.5 -- % Output within 1% of steady state value -- 5 -- s Rev. 1.2 | 42 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Settling time, (output settled tIDAC_SETTLE within 1% of steady state value), Current consumption2 IIDAC Output voltage compliance in ICOMP_SRC source mode, source current change relative to current sourced at 0 V Output voltage compliance in ICOMP_SINK sink mode, sink current change relative to current sunk at IOVDD Test Condition Min Typ Max Unit Range setting is changed -- 5 -- s Step value is changed -- 1 -- s EM0 or EM1 Source mode, excluding output current, Across operating temperature range -- 11 18 A EM0 or EM1 Sink mode, excluding output current, Across operating temperature range -- 13 21 A EM2 or EM3 Source mode, excluding output current, T = 25 C -- 0.023 -- A EM2 or EM3 Sink mode, excluding output current, T = 25 C -- 0.041 -- A EM2 or EM3 Source mode, excluding output current, T 85 C -- 11 -- A EM2 or EM3 Sink mode, excluding output current, T 85 d C -- 13 -- A RANGESEL1=0, output voltage = min(VIOVDD, VAVDD2-100 mv) -- 0.11 -- % RANGESEL1=1, output voltage = min(VIOVDD, VAVDD2-100 mV) -- 0.06 -- % RANGESEL1=2, output voltage = min(VIOVDD, VAVDD2-150 mV) -- 0.04 -- % RANGESEL1=3, output voltage = min(VIOVDD, VAVDD2-250 mV) -- 0.03 -- % RANGESEL1=0, output voltage = 100 mV -- 0.12 -- % RANGESEL1=1, output voltage = 100 mV -- 0.05 -- % RANGESEL1=2, output voltage = 150 mV -- 0.04 -- % RANGESEL1=3, output voltage = 250 mV -- 0.03 -- % Note: 1. In IDAC_CURPROG register. 2. The IDAC is supplied by either AVDD, DVDD, or IOVDD based on the setting of ANASW in the EMU_PWRCTRL register and PWRSEL in the IDAC_CTRL register. Setting PWRSEL to 1 selects IOVDD. With PWRSEL cleared to 0, ANASW selects between AVDD (0) and DVDD (1). silabs.com | Building a more connected world. Rev. 1.2 | 43 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.17 Capacitive Sense (CSEN) Table 4.27. Capacitive Sense (CSEN) Parameter Symbol Test Condition Single conversion time (1x accumulation) tCNV Maximum external capactive CEXTMAX load Min Typ Max Unit 12-bit SAR Conversions -- 20.2 -- s 16-bit SAR Conversions -- 26.4 -- s Delta Modulation Conversion (single comparison) -- 1.55 -- s CS0CG=7 (Gain = 1x), including routing parasitics -- 68 -- pF CS0CG=0 (Gain = 10x), including routing parasitics -- 680 -- pF -- 1 -- k 12-bit SAR conversions, 20 ms conversion rate, CS0CG=7 (Gain = 1x), 10 channels bonded (total capacitance of 330 pF)1 -- 326 -- nA Delta Modulation conversions, 20 ms conversion rate, CS0CG=7 (Gain = 1x), 10 channels bonded (total capacitance of 330 pF)1 -- 226 -- nA 12-bit SAR conversions, 200 ms conversion rate, CS0CG=7 (Gain = 1x), 10 channels bonded (total capacitance of 330 pF)1 -- 33 -- nA Delta Modulation conversions, 200 ms conversion rate, CS0CG=7 (Gain = 1x), 10 channels bonded (total capacitance of 330 pF)1 -- 25 -- nA 12-bit SAR conversions, 20 ms scan rate, CS0CG=0 (Gain = 10x), 8 samples per scan1 -- 690 -- nA Delta Modulation conversions, 20 ms scan rate, 8 comparisons per sample (DMCR = 1, DMR = 2), CS0CG=0 (Gain = 10x), 8 samples per scan1 -- 515 -- nA 12-bit SAR conversions, 200 ms scan rate, CS0CG=0 (Gain = 10x), 8 samples per scan1 -- 79 -- nA Delta Modulation conversions, 200 ms scan rate, 8 comparisons per sample (DMCR = 1, DMR = 2), CS0CG=0 (Gain = 10x), 8 samples per scan1 -- 57 -- nA Maximum external series im- REXTMAX pedance Supply current, EM2 bonded ICSEN_BOND conversions, WARMUPMODE=NORMAL, WARMUPCNT=0 Supply current, EM2 scan conversions, WARMUPMODE=NORMAL, WARMUPCNT=0 ICSEN_EM2 silabs.com | Building a more connected world. Rev. 1.2 | 44 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Test Condition Min Typ Max Unit Supply current, continuous conversions, WARMUPMODE= KEEPCSENWARM ICSEN_ACTIVE SAR or Delta Modulation conversions of 33 pF capacitor, CS0CG=0 (Gain = 10x), always on -- 90.5 -- A HFPERCLK supply current ICSEN_HFPERCLK Current contribution from HFPERCLK when clock to CSEN block is enabled. -- 2.25 -- A/MHz Note: 1. Current is specified with a total external capacitance of 33 pF per channel. Average current is dependent on how long the module is actively sampling channels within the scan period, and scales with the number of samples acquired. Supply current for a specific application can be estimated by multiplying the current per sample by the total number of samples per period (total_current = single_sample_current * (number_of_channels * accumulation)). silabs.com | Building a more connected world. Rev. 1.2 | 45 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.18 Operational Amplifier (OPAMP) Unless otherwise indicated, specified conditions are: Non-inverting input configuration, VDD = 3.3 V, DRIVESTRENGTH = 2, MAINOUTEN = 1, CLOAD = 75 pF with OUTSCALE = 0, or CLOAD = 37.5 pF with OUTSCALE = 1. Unit gain buffer and 3X-gain connection as specified in table footnotes8 1. Table 4.28. Operational Amplifier (OPAMP) Parameter Symbol Test Condition Supply voltage VOPA HCMDIS = 0, Rail-to-rail input range Input voltage VIN Min Typ Max Unit 2 -- 3.8 V HCMDIS = 1 1.62 -- 3.8 V HCMDIS = 0, Rail-to-rail input range VVSS -- VOPA V HCMDIS = 1 VVSS -- VOPA-1.2 V Input impedance RIN 100 -- -- M Output voltage VOUT VVSS -- VOPA V Load capacitance2 CLOAD OUTSCALE = 0 -- -- 75 pF OUTSCALE = 1 -- -- 37.5 pF DRIVESTRENGTH = 2 or 3, 0.4 V VOUT VOPA - 0.4 V, -8 mA < IOUT < 8 mA, Buffer connection, Full supply range -- 0.25 -- DRIVESTRENGTH = 0 or 1, 0.4 V VOUT VOPA - 0.4 V, -400 A < IOUT < 400 A, Buffer connection, Full supply range -- 0.6 -- DRIVESTRENGTH = 2 or 3, 0.1 V VOUT VOPA - 0.1 V, -2 mA < IOUT < 2 mA, Buffer connection, Full supply range -- 0.4 -- DRIVESTRENGTH = 0 or 1, 0.1 V VOUT VOPA - 0.1 V, -100 A < IOUT < 100 A, Buffer connection, Full supply range -- 1 -- Buffer connection 0.99 1 1.01 - 3x Gain connection 2.93 2.99 3.05 - 16x Gain connection 15.07 15.7 16.33 - DRIVESTRENGTH = 3, OUTSCALE = 0 -- 580 -- A DRIVESTRENGTH = 2, OUTSCALE = 0 -- 176 -- A DRIVESTRENGTH = 1, OUTSCALE = 0 -- 13 -- A DRIVESTRENGTH = 0, OUTSCALE = 0 -- 4.7 -- A Output impedance Internal closed-loop gain Active current4 ROUT GCL IOPA silabs.com | Building a more connected world. Rev. 1.2 | 46 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Test Condition Open-loop gain GOL Loop unit-gain frequency7 Phase Margin Output voltage noise UGF PM NOUT silabs.com | Building a more connected world. Min Typ Max Unit DRIVESTRENGTH = 3 -- 135 -- dB DRIVESTRENGTH = 2 -- 137 -- dB DRIVESTRENGTH = 1 -- 121 -- dB DRIVESTRENGTH = 0 -- 109 -- dB DRIVESTRENGTH = 3, Buffer connection -- 3.38 -- MHz DRIVESTRENGTH = 2, Buffer connection -- 0.9 -- MHz DRIVESTRENGTH = 1, Buffer connection -- 132 -- kHz DRIVESTRENGTH = 0, Buffer connection -- 34 -- kHz DRIVESTRENGTH = 3, 3x Gain connection -- 2.57 -- MHz DRIVESTRENGTH = 2, 3x Gain connection -- 0.71 -- MHz DRIVESTRENGTH = 1, 3x Gain connection -- 113 -- kHz DRIVESTRENGTH = 0, 3x Gain connection -- 28 -- kHz DRIVESTRENGTH = 3, Buffer connection -- 67 -- DRIVESTRENGTH = 2, Buffer connection -- 69 -- DRIVESTRENGTH = 1, Buffer connection -- 63 -- DRIVESTRENGTH = 0, Buffer connection -- 68 -- DRIVESTRENGTH = 3, Buffer connection, 10 Hz - 10 MHz -- 146 -- Vrms DRIVESTRENGTH = 2, Buffer connection, 10 Hz - 10 MHz -- 163 -- Vrms DRIVESTRENGTH = 1, Buffer connection, 10 Hz - 10 MHz -- 170 -- Vrms DRIVESTRENGTH = 0, Buffer connection, 10 Hz - 10 MHz -- 176 -- Vrms DRIVESTRENGTH = 3, 3x Gain connection -- 313 -- Vrms DRIVESTRENGTH = 2, 3x Gain connection, 10 Hz - 10 MHz -- 271 -- Vrms DRIVESTRENGTH = 1, 3x Gain connection, 10 Hz - 10 MHz -- 247 -- Vrms DRIVESTRENGTH = 0, 3x Gain connection, 10 Hz - 10 MHz -- 245 -- Vrms Rev. 1.2 | 47 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Test Condition Min Typ Max Unit Slew rate5 SR DRIVESTRENGTH = 3, INCBW=13 -- 4.7 -- V/s DRIVESTRENGTH = 3, INCBW=0 -- 1.5 -- V/s DRIVESTRENGTH = 2, INCBW=13 -- 1.27 -- V/s DRIVESTRENGTH = 2, INCBW=0 -- 0.42 -- V/s DRIVESTRENGTH = 1, INCBW=13 -- 0.17 -- V/s DRIVESTRENGTH = 1, INCBW=0 -- 0.058 -- V/s DRIVESTRENGTH = 0, INCBW=13 -- 0.044 -- V/s DRIVESTRENGTH = 0, INCBW=0 -- 0.015 -- V/s Startup time6 TSTART DRIVESTRENGTH = 2 -- -- 12 s Input offset voltage VOSI DRIVESTRENGTH = 2 or 3, TJ = 25 C -2 -- 2 mV DRIVESTRENGTH = 1 or 0, TJ = 25 C -2 -- 2 mV DRIVESTRENGTH = 2 or 3, across operating temperature range -12 -- 12 mV DRIVESTRENGTH = 1 or 0, across operating temperature range -30 -- 30 mV DC power supply rejection ratio9 PSRRDC Input referred -- 70 -- dB DC common-mode rejection ratio9 CMRRDC Input referred -- 70 -- dB Total harmonic distortion THDOPA DRIVESTRENGTH = 2, 3x Gain connection, 1 kHz, VOUT = 0.1 V to VOPA - 0.1 V -- 90 -- dB DRIVESTRENGTH = 0, 3x Gain connection, 0.01 kHz, VOUT = 0.1 V to VOPA - 0.1 V -- 90 -- dB silabs.com | Building a more connected world. Rev. 1.2 | 48 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications Parameter Symbol Test Condition Min Typ Max Unit Note: 1. Specified configuration for 3X-Gain configuration is: INCBW = 1, HCMDIS = 1, RESINSEL = VSS, VINPUT = 0.5 V, VOUTPUT = 1.5 V. Nominal voltage gain is 3. 2. If the maximum CLOAD is exceeded, an isolation resistor is required for stability. See AN0038 for more information. 3. When INCBW is set to 1 the OPAMP bandwidth is increased. This is allowed only when the non-inverting close-loop gain is 3, or the OPAMP may not be stable. 4. Current into the load resistor is excluded. When the OPAMP is connected with closed-loop gain > 1, there will be extra current to drive the resistor feedback network. The internal resistor feedback network has total resistance of 143.5 kOhm, which will cause another ~10 A current when the OPAMP drives 1.5 V between output and ground. 5. Step between 0.2V and VOPA-0.2V, 10%-90% rising/falling range. 6. From enable to output settled. In sample-and-off mode, RC network after OPAMP will contribute extra delay. Settling error < 1mV. 7. In unit gain connection, UGF is the gain-bandwidth product of the OPAMP. In 3x Gain connection, UGF is the gain-bandwidth product of the OPAMP and 1/3 attenuation of the feedback network. 8. Specified configuration for Unit gain buffer configuration is: INCBW = 0, HCMDIS = 0, RESINSEL = DISABLE. VINPUT = 0.5 V, VOUTPUT = 0.5 V. 9. When HCMDIS=1 and input common mode transitions the region from VOPA-1.4V to VOPA-1V, input offset will change. PSRR and CMRR specifications do not apply to this transition region. 4.1.19 Pulse Counter (PCNT) Table 4.29. Pulse Counter (PCNT) Parameter Symbol Test Condition Min Typ Max Unit Input frequency FIN Asynchronous Single and Quadrature Modes -- -- 20 MHz Sampled Modes with Debounce filter set to 0. -- -- 8 kHz Min Typ Max Unit 4.1.20 Analog Port (APORT) Table 4.30. Analog Port (APORT) Parameter Symbol Test Condition Supply current1, 2 IAPORT Operation in EM0/EM1 -- 7 -- A Operation in EM2/EM3 -- 915 -- nA Note: 1. Specified current is for continuous APORT operation. In applications where the APORT is not requested continuously (e.g. periodic ACMP requests from LESENSE in EM2), the average current requirements can be estimated by mutiplying the duty cycle of the requests by the specified continuous current number. 2. Supply current increase that occurs when an analog peripheral requests access to APORT. This current is not included in reported module currents. Additional peripherals requesting access to APORT do not incur further current. silabs.com | Building a more connected world. Rev. 1.2 | 49 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.21 I2C 4.1.21.1 I2C Standard-mode (Sm)1 Table 4.31. I2C Standard-mode (Sm)1 Parameter Symbol SCL clock frequency2 Test Condition Min Typ Max Unit fSCL 0 -- 100 kHz SCL clock low time tLOW 4.7 -- -- s SCL clock high time tHIGH 4 -- -- s SDA set-up time tSU_DAT 250 -- -- ns SDA hold time3 tHD_DAT 100 -- 3450 ns Repeated START condition set-up time tSU_STA 4.7 -- -- s (Repeated) START condition tHD_STA hold time 4 -- -- s STOP condition set-up time tSU_STO 4 -- -- s Bus free time between a STOP and START condition tBUF 4.7 -- -- s Note: 1. For CLHR set to 0 in the I2Cn_CTRL register 2. For the minimum HFPERCLK frequency required in Standard-mode, refer to the I2C chapter in the reference manual 3. The maximum SDA hold time (tHD_DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW) silabs.com | Building a more connected world. Rev. 1.2 | 50 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.21.2 I2C Fast-mode (Fm)1 Table 4.32. I2C Fast-mode (Fm)1 Parameter Symbol SCL clock frequency2 Test Condition Min Typ Max Unit fSCL 0 -- 400 kHz SCL clock low time tLOW 1.3 -- -- s SCL clock high time tHIGH 0.6 -- -- s SDA set-up time tSU_DAT 100 -- -- ns SDA hold time3 tHD_DAT 100 -- 900 ns Repeated START condition set-up time tSU_STA 0.6 -- -- s (Repeated) START condition tHD_STA hold time 0.6 -- -- s STOP condition set-up time tSU_STO 0.6 -- -- s Bus free time between a STOP and START condition tBUF 1.3 -- -- s Note: 1. For CLHR set to 1 in the I2Cn_CTRL register 2. For the minimum HFPERCLK frequency required in Fast-mode, refer to the I2C chapter in the reference manual 3. The maximum SDA hold time (tHD,DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW) silabs.com | Building a more connected world. Rev. 1.2 | 51 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.21.3 I2C Fast-mode Plus (Fm+)1 Table 4.33. I2C Fast-mode Plus (Fm+)1 Parameter Symbol SCL clock frequency2 Test Condition Min Typ Max Unit fSCL 0 -- 1000 kHz SCL clock low time tLOW 0.5 -- -- s SCL clock high time tHIGH 0.26 -- -- s SDA set-up time tSU_DAT 50 -- -- ns SDA hold time tHD_DAT 100 -- -- ns Repeated START condition set-up time tSU_STA 0.26 -- -- s (Repeated) START condition tHD_STA hold time 0.26 -- -- s STOP condition set-up time tSU_STO 0.26 -- -- s Bus free time between a STOP and START condition tBUF 0.5 -- -- s Note: 1. For CLHR set to 0 or 1 in the I2Cn_CTRL register 2. For the minimum HFPERCLK frequency required in Fast-mode Plus, refer to the I2C chapter in the reference manual silabs.com | Building a more connected world. Rev. 1.2 | 52 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications 4.1.22 USART SPI SPI Master Timing Table 4.34. SPI Master Timing Parameter Symbol SCLK period 1 3 2 tSCLK CS to MOSI 1 3 Test Condition Min Typ Max Unit 2* tHFPERCLK -- -- ns tCS_MO -14.5 -- 13.5 ns SCLK to MOSI 1 3 tSCLK_MO -8.5 -- 8 ns MISO setup time 1 3 tSU_MI IOVDD = 1.62 V 92 -- -- ns IOVDD = 3.0 V 42 -- -- ns -10 -- -- ns tH_MI MISO hold time 1 3 Note: 1. Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0). 2. tHFPERCLK is one period of the selected HFPERCLK. 3. Measurement done with 8 pF output loading at 10% and 90% of VDD (figure shows 50% of VDD). CS tCS_MO tSCKL_MO SCLK CLKPOL = 0 tSCLK SCLK CLKPOL = 1 MOSI tSU_MI tH_MI MISO Figure 4.1. SPI Master Timing Diagram silabs.com | Building a more connected world. Rev. 1.2 | 53 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Electrical Specifications SPI Slave Timing Table 4.35. SPI Slave Timing Parameter Symbol SCLK period 1 3 2 Test Condition Min Typ Max Unit tSCLK 6* tHFPERCLK -- -- ns SCLK high time1 3 2 tSCLK_HI 2.5 * tHFPERCLK -- -- ns SCLK low time1 3 2 tSCLK_LO 2.5 * tHFPERCLK -- -- ns CS active to MISO 1 3 tCS_ACT_MI 4 -- 70 ns CS disable to MISO 1 3 tCS_DIS_MI 4 -- 50 ns MOSI setup time 1 3 tSU_MO 8 -- -- ns MOSI hold time 1 3 2 tH_MO 7 -- -- ns SCLK to MISO 1 3 2 tSCLK_MI 10 + 1.5* tHFPERCLK -- 65 + 2.5 * tHFPERCLK ns Note: 1. Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0) 2. tHFPERCLK is one period of the selected HFPERCLK 3. Measurement done with 8 pF output loading at 10% and 90% of VDD (figure shows 50% of VDD) CS tCS_ACT_MI tCS_DIS_MI SCLK CLKPOL = 0 SCLK CLKPOL = 1 tSCLK_HI tSU_MO tSCLK_LO tSCLK tH_MO MOSI tSCLK_MI MISO Figure 4.2. SPI Slave Timing Diagram silabs.com | Building a more connected world. Rev. 1.2 | 54 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Typical Connection Diagrams 5. Typical Connection Diagrams 5.1 Network Co-Processor (NCP) Application with UART Host The MGM12P can be controlled over the UART interface as a peripheral to an external host processor. Typical power supply, programming/debug, and host interface connections are shown in the figure below. Refer to AN958: Debugging and Programming Interfaces for Custom Designs for more details. Figure 5.1. Connection Diagram: UART NCP Configuration 5.2 Network Co-Processor (NCP) Application with SPI Host The MGM12P can be controlled over the SPI interface as a peripheral to an external host processor. Typical power supply, programming/debug and host interface connections are shown in the figure below. Refer to AN958: Debugging and Programming Interfaces for Custom Designs for more details. Figure 5.2. Connection Diagram: SPI NCP Configuration silabs.com | Building a more connected world. Rev. 1.2 | 55 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Typical Connection Diagrams 5.3 SoC Application The MGM12P can be used in a standalone SoC configuration with no external host processor. Typical power supply and programming/ debug connections are shown in the figure below. Refer to AN958: Debugging and Programming Interfaces for Custom Designs for more details. Figure 5.3. Connection Diagram: SoC Configuration silabs.com | Building a more connected world. Rev. 1.2 | 56 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Layout Guidelines 6. Layout Guidelines For optimal performance of the MGM12P (with integrated antenna), please follow the PCB layout guidelines and ground plane recommendations indicated in this section. 6.1 Module Placement and Application PCB Layout Guidelines * * * * * Place the module at the edge of the PCB, as shown in the figure below. Do not place any metal (traces, components, battery, etc.) within the clearance area of the antenna (shown in the figure below). Connect all ground pads directly to a solid ground plane. Place the ground vias as close to the ground pads as possible. Do not place plastic or any other dielectric material in touch with the antenna. Figure 6.1. Recommended Application PCB Layout for MGM12P with Integrated Antenna The layouts in the next figure will result in severely degraded RF-performance. Figure 6.2. Non-optimal Module Placements for MGM12P with Integrated Antenna silabs.com | Building a more connected world. Rev. 1.2 | 57 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Layout Guidelines Figure 6.3. Impact of GND Plane Size vs. Range for MGM12P 6.2 Effect of Plastic and Metal Materials Do not place plastic or any other dielectric material in closs proximity to the antenna. Any metallic objects in close proximity to the antenna will prevent the antenna from radiating freely. The minimum recommended distance of metallic and/or conductive objects is 10 mm in any direction from the antenna except in the directions of the application PCB ground planes. 6.3 Locating the Module Close to Human Body Placing the module in touch or very close to the human body will negatively impact antenna efficiency and reduce range. silabs.com | Building a more connected world. Rev. 1.2 | 58 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Layout Guidelines 6.4 2D Radiation Pattern Plots Figure 6.4. Typical 2D Radiation Pattern - Front View Figure 6.5. Typical 2D Radiation Pattern - Side View silabs.com | Building a more connected world. Rev. 1.2 | 59 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Layout Guidelines Figure 6.6. Typical 2D Radiation Pattern - Top View silabs.com | Building a more connected world. Rev. 1.2 | 60 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Hardware Design Guidelines 7. Hardware Design Guidelines The MGM12P is an easy-to-use module with regard to hardware application design but certain design guidelines must be followed to guarantee optimal performance. These guidelines are listed in the next sub-sections. 7.1 Power Supply Requirements Coin cell batteries cannot withstand high peak currents (e.g. higher than 15 mA). If the peak current exceeds 15 mA it's recommended to place 47 - 100 F capacitor in parallel with the coin cell battery to improve the battery life time. Notice that the total current consumption of your application is a combination of the radio, peripherals and MCU current consumption so you must take all of these into account. MGM12P should be powered by a unipolar supply voltage with nominal value of 3.3 V. 7.2 Reset Functions The MGM12P can be reset by three different methods: by pulling the RESET line low, by the internal watchdog timer or software command. The reset state in MGM12P does not provide any power saving functionality and thus is not recommended as a means to conserve power. MGM12P has an internal system power-up reset function. The RESET pin includes an on-chip pull-up resistor and can therefore be left unconnected if no external reset switch or source is needed. 7.3 Debug and Firmware Updates This section contains information on debug and firmware update methods. For additional information, refer to the following application note: AN958: Debugging and Programming Interfaces for Custom Designs. 7.3.1 Programming and Debug Connections It is recommended to expose the debug pins in your own hardware design for firmware update and debug purposes. The following table lists the required pins for JTAG connection and SWD connections. The debug pins have pull-down and pull-up enabled by default, so leaving them enabled may increase current consumption if left connected to supply or ground. If enabling the JTAG pins the module must be power cycled to enable a SWD debug session. Table 7.1. JTAG Pads PAD NAME PAD NUMBER JTAG SIGNAL NAME SWD SIGNAL NAME COMMENTS PF3 24 TDI N/A This pin is disabled after reset. Once enabled the pin has a built-in pull-up. PF2 23 TDO N/A This pin is disabled after reset PF1 22 TMS SWDIO Pin is enabled after reset and has a built-in pull-up PF0 21 TCK SWCLK Pin is enabled after reset and has a built-in pulldown 7.3.2 Packet Trace Interface (PTI) The MGM12P integrates a true PHY-level PTI with the MAC, allowing complete, non-intrusive capture of all packets to and from the EFR32 Wireless STK development tools. silabs.com | Building a more connected world. Rev. 1.2 | 61 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions 8. Pin Definitions 8.1 Pin Definitions TOP VIEW RESETn 30 3 PD14 VDD 29 4 PD15 PF7 28 5 PA0 PF6 27 6 PA1 PF5 26 7 PA2 PF4 25 8 PA3 PF3 24 9 PA4 PF2 23 10 PA5 PF1 22 11 PB11 PF0 21 12 GND GND 20 PC11 PD13 PC10 2 PC9 31 PC8 GND PC7 MGM12P PC6 GND PB13 1 13 14 15 16 17 18 19 Figure 8.1. MGM12P Pinout silabs.com | Building a more connected world. Rev. 1.2 | 62 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Table 8.1. MGM12P Device Pinout Pin Name Pin(s) Description Pin Name Pin(s) Description GND 1 12 20 31 Ground PD13 2 GPIO PD14 3 GPIO PD15 4 GPIO PA0 5 GPIO PA1 6 GPIO PA2 7 GPIO PA3 8 GPIO PA4 9 GPIO PA5 10 GPIO (5V) PB11 11 GPIO PB13 13 GPIO PC6 14 GPIO (5V) PC7 15 GPIO (5V) PC8 16 GPIO (5V) PC9 17 GPIO (5V) PC10 18 GPIO (5V) PC11 19 GPIO (5V) PF0 21 GPIO (5V) PF1 22 GPIO (5V) PF2 23 GPIO (5V) PF3 24 GPIO (5V) PF4 25 GPIO (5V) PF5 26 GPIO (5V) PF6 27 GPIO (5V) PF7 28 GPIO (5V) 30 Reset input, active low. To apply an external reset source to this pin, it is required to only drive this pin low during reset, and let the internal pull-up ensure that reset is released. VDD 29 Module Power Supply RESETn Note: 1. GPIO with 5V tolerance are indicated by (5V). silabs.com | Building a more connected world. Rev. 1.2 | 63 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions 8.1.1 GPIO Overview The GPIO pins are organized as 16-bit ports indicated by letters A through F, and the individual pins on each port are indicated by a number from 15 down to 0. Table 8.2. GPIO Pinout Port Pin 15 Pin 14 Pin 13 Pin 12 Pin 11 Pin 10 Port A - - - - - - - - - - PA5 (5V) PA4 PA3 PA2 PA1 PA0 PB11 - - - - - - - - - - - PC9 (5V) PC8 (5V) PC7 (5V) PC6 (5V) - - - - - - - - - - - - - - - - Port B Port C Port D PB13 - - - - PC11 PC10 (5V) (5V) PD15 PD14 PD13 Pin 9 Pin 8 Pin 7 Pin 6 Pin 5 Pin 4 Pin 3 Pin 2 Pin 1 Pin 0 Port E - - - - - - - - - - - - - - - - Port F - - - - - - - - PF7 (5V) PF6 (5V) PF5 (5V) PF4 (5V) PF3 (5V) PF2 (5V) PF1 (5V) PF0 (5V) Note: 1. GPIO with 5V tolerance are indicated by (5V). silabs.com | Building a more connected world. Rev. 1.2 | 64 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions 8.2 Alternate Functionality Pinout A wide selection of alternate functionality is available for multiplexing to various pins. The following table shows the name of the alternate functionality in the first column, followed by columns showing the possible LOCATION bitfield settings. Note: Some functionality, such as analog interfaces, do not have alternate settings or a LOCATION bitfield. In these cases, the pinout is shown in the column corresponding to LOCATION 0. Table 8.3. Alternate Functionality Overview Alternate Functionality ACMP0_O ACMP1_O LOCATION 0-3 4-7 8 - 11 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 11: PC6 11: PC6 12 - 15 16 - 19 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 20 - 23 24 - 27 28 - 31 Description 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Analog comparator ACMP0, digital output. 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Analog comparator ACMP1, digital output. 0: PA0 Analog to digital converter ADC0 external reference input negative pin. 0: PA1 Analog to digital converter ADC0 external reference input positive pin. ADC0_EXTN ADC0_EXTP 0: PF1 BOOT_RX Bootloader RX. 0: PF0 BOOT_TX Bootloader TX. 0: PA1 CMU_CLK0 2: PC6 3: PC11 0: PA0 CMU_CLK1 CMU_CLKI0 2: PC7 3: PC10 0: PB13 1: PF7 2: PC6 5: PD14 6: PF2 7: PF7 5: PD15 6: PF3 7: PF6 4: PA5 silabs.com | Building a more connected world. Clock Management Unit, clock output number 0. Clock Management Unit, clock output number 1. Clock Management Unit, clock output number I0. Rev. 1.2 | 65 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality LOCATION 0-3 4-7 0: PF0 DBG_SWCLKTCK 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description Debug-interface Serial Wire clock input and JTAG Test Clock. Note that this function is enabled to the pin out of reset, and has a built-in pull down. 0: PF1 DBG_SWDIOTMS Debug-interface Serial Wire data input / output and JTAG Test Mode Select. Note that this function is enabled to the pin out of reset, and has a built-in pull up. 0: PF2 1: PB13 2: PD15 3: PC11 Debug-interface Serial Wire viewer Output. 0: PF3 Debug-interface JTAG Test Data In. DBG_SWO Note that this function is not enabled after reset, and must be enabled by software to be used. Note that this function becomes available after the first valid JTAG command is received, and has a built-in pull up when JTAG is active. DBG_TDI 0: PF2 Debug-interface JTAG Test Data Out. Note that this function becomes available after the first valid JTAG command is received. DBG_TDO ETM_TCLK 8 - 11 1: PA5 3: PC6 silabs.com | Building a more connected world. Embedded Trace Module ETM clock . Rev. 1.2 | 66 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality LOCATION 0-3 4-7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Embedded Trace Module ETM data 0. ETM_TD0 3: PC7 Embedded Trace Module ETM data 1. ETM_TD1 3: PC8 Embedded Trace Module ETM data 2. ETM_TD2 3: PC9 Embedded Trace Module ETM data 3. ETM_TD3 3: PC10 FRC_DCLK FRC_DFRAME FRC_DOUT Description 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 6: PB13 7: PB13 0: PF2 GPIO_EM4WU0 0: PF7 GPIO_EM4WU1 0: PD14 GPIO_EM4WU4 0: PA3 GPIO_EM4WU8 0: PB13 GPIO_EM4WU9 0: PC10 GPIO_EM4WU12 silabs.com | Building a more connected world. 8: PB13 11: PC6 9: PC6 10: PC7 11: PC8 10: PC6 11: PC7 12: PC7 13: PC8 14: PC9 15: PC10 12: PC9 13: PC10 14: PC11 12: PC8 13: PC9 14: PC10 15: PC11 16: PC11 19: PD13 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Frame Controller, Data Sniffer Clock. 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 Frame Controller, Data Sniffer Frame active 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Frame Controller, Data Sniffer Output. Pin can be used to wake the system up from EM4 Pin can be used to wake the system up from EM4 Pin can be used to wake the system up from EM4 Pin can be used to wake the system up from EM4 Pin can be used to wake the system up from EM4 Pin can be used to wake the system up from EM4 Rev. 1.2 | 67 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality I2C0_SCL I2C0_SDA LOCATION 0-3 4-7 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 7: PB13 I2C1_SCL 8 - 11 10: PC6 11: PC7 8: PB13 11: PC6 12 - 15 16 - 19 12: PC8 13: PC9 14: PC10 15: PC11 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 20 - 23 0: PD13 LES_CH5 0: PD14 LES_CH6 0: PD15 LES_CH7 0: PA0 LES_CH8 0: PA1 LES_CH9 0: PA2 LES_CH10 0: PA3 LES_CH11 0: PA4 LES_CH12 0: PA5 LES_CH13 silabs.com | Building a more connected world. Description 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 I2C0 Serial Clock Line input / output. 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 I2C0 Serial Data input / output. I2C1 Serial Clock Line input / output. 20: PC11 19: PC10 28 - 31 20: PD13 21: PD14 22: PD15 23: PF0 18: PC10 19: PC11 I2C1_SDA 24 - 27 I2C1 Serial Data input / output. LESENSE channel 5. LESENSE channel 6. LESENSE channel 7. LESENSE channel 8. LESENSE channel 9. LESENSE channel 10. LESENSE channel 11. LESENSE channel 12. LESENSE channel 13. Rev. 1.2 | 68 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality LETIM0_OUT0 LETIM0_OUT1 LEU0_RX LEU0_TX MODEM_ANT0 MODEM_ANT1 MODEM_DCLK MODEM_DIN MODEM_DOUT LOCATION 0-3 4-7 8 - 11 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 0: PA3 1: PA4 2: PA5 3: PB11 7: PB13 7: PB13 5: PB13 0: PA4 1: PA5 2: PB11 4: PB13 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 7: PC6 7: PB13 6: PB13 0: PA4 OPA0_N 0: PA2 OPA0_P 0: PD15 OPA1_N 0: PD13 OPA1_P silabs.com | Building a more connected world. 12 - 15 16 - 19 16: PC11 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 20 - 23 24 - 27 28 - 31 Description 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Low Energy Timer LETIM0, output channel 0. 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Low Energy Timer LETIM0, output channel 1. 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 LEUART0 Receive input. 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 LEUART0 Transmit output. Also used as receive input in half duplex communication. 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 MODEM antenna control output 0, used for antenna diversity. 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 28: PA0 29: PA1 30: PA2 31: PA3 MODEM antenna control output 1, used for antenna diversity. 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 MODEM data clock out. 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 8: PC7 9: PC8 10: PC9 11: PC10 12: PC11 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 MODEM data in. 12: PC9 13: PC10 14: PC11 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 MODEM data out. 9: PC6 10: PC7 11: PC8 16: PC11 19: PD13 Operational Amplifier 0 external negative input. Operational Amplifier 0 external positive input. Operational Amplifier 1 external negative input. Operational Amplifier 1 external positive input. Rev. 1.2 | 69 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality LOCATION 0-3 4-7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 0: PB13 Operational Amplifier 2 external negative input. OPA2_N 0: PB11 Operational Amplifier 2 external positive input. OPA2_P PCNT0_S0IN PCNT0_S1IN Description 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 7: PB13 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Pulse Counter PCNT0 input number 0. 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Pulse Counter PCNT0 input number 1. 20: PF7 PCNT1_S0IN 19: PF6 PCNT1_S1IN Pulse Counter PCNT1 input number 1. 18: PF6 19: PF7 20: PC11 PCNT2_S0IN 19: PC10 PCNT2_S1IN 18: PC10 19: PC11 Pulse Counter PCNT1 input number 0. Pulse Counter PCNT2 input number 0. Pulse Counter PCNT2 input number 1. PRS_CH0 0: PF0 1: PF1 2: PF2 3: PF3 4: PF4 5: PF5 6: PF6 7: PF7 PRS_CH1 0: PF1 1: PF2 2: PF3 3: PF4 4: PF5 5: PF6 6: PF7 7: PF0 Peripheral Reflex System PRS, channel 1. PRS_CH2 0: PF2 1: PF3 2: PF4 3: PF5 4: PF6 5: PF7 6: PF0 7: PF1 Peripheral Reflex System PRS, channel 2. PRS_CH3 0: PF3 1: PF4 2: PF5 3: PF6 4: PF7 5: PF0 6: PF1 7: PF2 PRS_CH4 4: PD13 5: PD14 6: PD15 silabs.com | Building a more connected world. 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 12: PD13 13: PD14 14: PD15 Peripheral Reflex System PRS, channel 0. Peripheral Reflex System PRS, channel 3. Peripheral Reflex System PRS, channel 4. Rev. 1.2 | 70 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality LOCATION 0-3 4-7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 4: PD14 5: PD15 PRS_CH5 Peripheral Reflex System PRS, channel 5. 3: PD13 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 4: PB11 PRS_CH8 0: PA2 1: PA3 2: PA4 3: PA5 PRS_CH9 0: PA3 1: PA4 2: PA5 3: PB11 PRS_CH10 0: PC6 1: PC7 2: PC8 3: PC9 4: PC10 5: PC11 PRS_CH11 0: PC7 1: PC8 2: PC9 3: PC10 4: PC11 5: PC6 TIM0_CC0 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 PRS_CH6 PRS_CH7 TIM0_CC1 TIM0_CC2 TIM0_CDTI0 TIM0_CDTI1 TIM0_CDTI2 0: PA3 1: PA4 2: PA5 3: PB11 0: PA4 1: PA5 2: PB11 0: PA5 1: PB11 3: PB13 7: PB13 6: PB13 5: PB13 7: PB13 6: PB13 8: PB13 16: PD14 17: PD15 Peripheral Reflex System PRS, channel 7. 10: PA0 Peripheral Reflex System PRS, channel 8. 9: PA0 10: PA1 8: PA0 9: PA1 10: PA2 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 Peripheral Reflex System PRS, channel 9. Peripheral Reflex System PRS, channel 11. 8: PB13 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 10: PC6 11: PC7 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Timer 0 Capture Compare input / output channel 1. 12: PC9 13: PC10 14: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 Timer 0 Capture Compare input / output channel 2. 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 Timer 0 Complimentary Dead Time Insertion channel 0. 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 28: PA0 29: PA1 30: PA2 31: PA3 Timer 0 Complimentary Dead Time Insertion channel 1. 16: PD13 17: PD14 18: PD15 19: PF0 20: PF1 21: PF2 22: PF3 23: PF4 24: PF5 25: PF6 26: PF7 27: PA0 28: PA1 29: PA2 30: PA3 31: PA4 Timer 0 Complimentary Dead Time Insertion channel 2. 9: PC6 10: PC7 11: PC8 12: PC11 7: PC6 8: PC7 9: PC8 10: PC9 11: PC10 6: PC6 7: PC7 8: PC8 9: PC9 10: PC10 11: PC11 silabs.com | Building a more connected world. 16: PC11 Peripheral Reflex System PRS, channel 10. 12: PC10 13: PC11 4: PB13 Peripheral Reflex System PRS, channel 6. 15: PD13 8: PC6 9: PC7 10: PC8 11: PC9 5: PB13 Description 16: PC11 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Timer 0 Capture Compare input / output channel 0. Rev. 1.2 | 71 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality TIM1_CC0 TIM1_CC1 TIM1_CC2 LOCATION 0-3 4-7 8 - 11 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 8: PB13 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 TIM1_CC3 0: PA3 1: PA4 2: PA5 3: PB11 US0_CLK 0: PA2 1: PA3 2: PA4 3: PA5 US0_CS US0_CTS US0_RTS 0: PA3 1: PA4 2: PA5 3: PB11 0: PA4 1: PA5 2: PB11 0: PA5 1: PB11 3: PB13 US0_RX 7: PB13 6: PB13 5: PB13 4: PB11 6: PB13 12 - 15 16 - 19 16: PC11 11: PC6 12: PC7 13: PC8 14: PC9 15: PC10 10: PC6 11: PC7 9: PC6 10: PC7 11: PC8 8: PC6 9: PC7 10: PC8 11: PC9 9: PC6 10: PC7 11: PC8 Timer 1 Capture Compare input / output channel 0. 12: PC8 13: PC9 14: PC10 15: PC11 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 Timer 1 Capture Compare input / output channel 1. 12: PC9 13: PC10 14: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 Timer 1 Capture Compare input / output channel 2. 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 Timer 1 Capture Compare input / output channel 3. 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 USART0 clock input / output. 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 USART0 chip select input / output. 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 28: PA0 29: PA1 30: PA2 31: PA3 USART0 Clear To Send hardware flow control input. 16: PD13 17: PD14 18: PD15 19: PF0 20: PF1 21: PF2 22: PF3 23: PF4 24: PF5 25: PF6 26: PF7 27: PA0 28: PA1 29: PA2 30: PA3 31: PA4 USART0 Request To Send hardware flow control output. 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 USART0 Asynchronous Receive. 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 USART0 Asynchronous Transmit. Also used as receive input in half duplex communication. 12: PC10 13: PC11 12: PC9 13: PC10 14: PC11 12: PC11 7: PC6 6: PC6 7: PC7 8: PC8 9: PC9 10: PC10 11: PC11 4: PA5 5: PB11 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 7: PB13 10: PC6 11: PC7 8: PB13 11: PC6 Description 28: PF4 29: PF5 30: PF6 31: PF7 8: PC7 9: PC8 10: PC9 11: PC10 0: PA1 1: PA2 2: PA3 3: PA4 28 - 31 24: PF0 25: PF1 26: PF2 27: PF3 12: PC10 13: PC11 4: PB13 24 - 27 21: PD13 22: PD14 23: PD15 8: PC6 9: PC7 10: PC8 11: PC9 5: PB13 20 - 23 12: PC8 13: PC9 14: PC10 15: PC11 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 US0_TX USART0 Synchronous mode Master Input / Slave Output (MISO). USART0 Synchronous mode Master Output / Slave Input (MOSI). US1_CLK 0: PA2 1: PA3 2: PA4 3: PA5 4: PB11 6: PB13 silabs.com | Building a more connected world. 9: PC6 10: PC7 11: PC8 12: PC9 13: PC10 14: PC11 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 30: PA0 31: PA1 USART1 clock input / output. Rev. 1.2 | 72 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality US1_CS US1_CTS US1_RTS LOCATION 0-3 0: PA3 1: PA4 2: PA5 3: PB11 0: PA4 1: PA5 2: PB11 0: PA5 1: PB11 3: PB13 US1_RX 4-7 8 - 11 12 - 15 8: PC6 9: PC7 10: PC8 11: PC9 12: PC10 13: PC11 12: PC11 7: PC6 8: PC7 9: PC8 10: PC9 11: PC10 6: PC6 7: PC7 8: PC8 9: PC9 10: PC10 11: PC11 5: PB13 4: PB13 0: PA1 1: PA2 2: PA3 3: PA4 4: PA5 5: PB11 0: PA0 1: PA1 2: PA2 3: PA3 4: PA4 5: PA5 6: PB11 7: PB13 10: PC6 11: PC7 8: PB13 11: PC6 16 - 19 20 - 23 18: PD13 19: PD14 20: PD15 21: PF0 22: PF1 23: PF2 24: PF3 25: PF4 26: PF5 27: PF6 28: PF7 29: PA0 30: PA1 31: PA2 USART1 chip select input / output. 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 28: PA0 29: PA1 30: PA2 31: PA3 USART1 Clear To Send hardware flow control input. 16: PD13 17: PD14 18: PD15 19: PF0 20: PF1 21: PF2 22: PF3 23: PF4 24: PF5 25: PF6 26: PF7 27: PA0 28: PA1 29: PA2 30: PA3 31: PA4 USART1 Request To Send hardware flow control output. 20: PD13 21: PD14 22: PD15 23: PF0 24: PF1 25: PF2 26: PF3 27: PF4 28: PF5 29: PF6 30: PF7 31: PA0 USART1 Asynchronous Receive. 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 USART1 Asynchronous Transmit. Also used as receive input in half duplex communication. 12: PC8 13: PC9 14: PC10 15: PC11 12: PC7 13: PC8 14: PC9 15: PC10 16: PC11 24 - 27 28 - 31 US1_TX Description USART1 Synchronous mode Master Input / Slave Output (MISO). USART1 Synchronous mode Master Output / Slave Input (MOSI). US2_CLK 12: PF0 13: PF1 14: PF3 15: PF4 16: PF5 17: PF6 18: PF7 30: PA5 US2_CS 16: PF6 17: PF7 29: PA5 11: PF0 12: PF1 13: PF3 14: PF4 15: PF5 16: PF7 28: PA5 10: PF0 11: PF1 12: PF3 13: PF4 14: PF5 15: PF6 9: PF0 10: PF1 11: PF3 12: PF4 13: PF5 14: PF6 15: PF7 US2_CTS US2_RTS US2_RX silabs.com | Building a more connected world. 13: PF0 14: PF1 15: PF3 USART2 chip select input / output. USART2 Clear To Send hardware flow control input. USART2 Request To Send hardware flow control output. 27: PA5 16: PF4 17: PF5 18: PF6 19: PF7 USART2 clock input / output. USART2 Asynchronous Receive. 31: PA5 USART2 Synchronous mode Master Input / Slave Output (MISO). Rev. 1.2 | 73 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality LOCATION 0-3 4-7 8 - 11 12 - 15 0: PA5 14: PF0 15: PF1 US2_TX 16 - 19 16: PF3 17: PF4 18: PF5 19: PF6 20 - 23 20: PF7 24 - 27 28 - 31 Description USART2 Asynchronous Transmit. Also used as receive input in half duplex communication. USART2 Synchronous mode Master Output / Slave Input (MOSI). US3_CLK 4: PD14 5: PD15 13: PB11 4: PD15 12: PB11 3: PD13 US3_CS US3_CTS US3_RTS 2: PD13 3: PD14 1: PD13 2: PD14 3: PD15 US3_RX USART3 Request To Send hardware flow control output. 10: PB11 4: PD13 5: PD14 6: PD15 5: PD13 6: PD14 7: PD15 US3_TX USART3 chip select input / output. USART3 Clear To Send hardware flow control input. 11: PB11 0: PD13 1: PD14 2: PD15 USART3 clock input / output. 14: PB11 15: PB11 USART3 Asynchronous Receive. USART3 Synchronous mode Master Input / Slave Output (MISO). USART3 Asynchronous Transmit. Also used as receive input in half duplex communication. USART3 Synchronous mode Master Output / Slave Input (MOSI). 0: PA1 Digital to analog converter VDAC0 external reference input pin. 0: PA3 Digital to Analog Converter DAC0 output channel number 0. 0: PA5 1: PD13 2: PD15 Digital to Analog Converter DAC0 alternative output for channel 0. VDAC0_EXT VDAC0_OUT0 / OPA0_OUT VDAC0_OUT0AL T / OPA0_OUTALT silabs.com | Building a more connected world. Rev. 1.2 | 74 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Alternate Functionality VDAC0_OUT1 / OPA1_OUT LOCATION 0-3 1: PA2 2: PA4 WTIM0_CC0 0: PA0 1: PA1 2: PA2 3: PA3 WTIM0_CC2 8 - 11 12 - 15 16 - 19 4: PA4 5: PA5 17: PB13 0: PA2 1: PA3 2: PA4 3: PA5 24: PC6 25: PC7 26: PC8 27: PC9 13: PB11 15: PB13 0: PA4 1: PA5 13: PB13 9: PB13 22: PC6 23: PC7 5: PB13 14: PC6 15: PC7 3: PB11 1: PB13 10: PC6 11: PC7 8: PC6 9: PC7 10: PC8 11: PC9 WTIM1_CC1 6: PC6 7: PC7 4: PC6 5: PC7 6: PC8 7: PC9 silabs.com | Building a more connected world. 15: PD13 28: PC10 29: PC11 Wide timer 0 Capture Compare input / output channel 1. 24: PC8 25: PC9 26: PC10 27: PC11 20: PC8 21: PC9 22: PC10 23: PC11 Wide timer 0 Capture Compare input / output channel 2. 27: PD13 Wide timer 0 Complimentary Dead Time Insertion channel 1. 25: PD13 26: PD14 27: PD15 28: PF0 29: PF1 30: PF2 31: PF3 Wide timer 0 Complimentary Dead Time Insertion channel 2. 21: PD13 22: PD14 23: PD15 24: PF0 25: PF1 26: PF2 27: PF3 28: PF4 29: PF5 30: PF6 31: PF7 Wide timer 1 Capture Compare input / output channel 0. 24: PF2 25: PF3 26: PF4 27: PF5 28: PF6 29: PF7 19: PD13 20: PD14 21: PD15 22: PF0 23: PF1 Wide timer 1 Capture Compare input / output channel 1. 17: PD13 18: PD14 19: PD15 20: PF0 21: PF1 22: PF2 23: PF3 24: PF4 25: PF5 26: PF6 27: PF7 Wide timer 1 Capture Compare input / output channel 2. 16: PD14 17: PD15 18: PF0 19: PF1 20: PF2 21: PF3 22: PF4 23: PF5 24: PF6 25: PF7 Wide timer 1 Capture Compare input / output channel 3. 20: PC10 21: PC11 16: PC8 17: PC9 18: PC10 19: PC11 12: PC10 13: PC11 8: PC10 9: PC11 Wide timer 0 Capture Compare input / output channel 0. 28: PD14 29: PD15 30: PF0 31: PF1 12: PC8 13: PC9 14: PC10 15: PC11 8: PC8 9: PC9 10: PC10 11: PC11 28: PC8 29: PC9 30: PC10 31: PC11 Wide timer 0 Complimentary Dead Time Insertion channel 0. 16: PC6 17: PC7 18: PC8 19: PC9 7: PB13 WTIM0_CDTI2 Description 29: PD13 30: PD14 31: PD15 18: PC6 19: PC7 5: PB11 WTIM0_CDTI1 26: PC6 27: PC7 15: PB11 7: PB11 WTIM1_CC3 28 - 31 Digital to Analog Converter DAC0 alternative output for channel 1. WTIM0_CDTI0 WTIM1_CC2 24 - 27 Digital to Analog Converter DAC0 output channel number 1. 11: PB11 WTIM1_CC0 20 - 23 0: PD14 VDAC0_OUT1AL T / OPA1_OUTALT WTIM0_CC1 4-7 Rev. 1.2 | 75 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions 8.3 Analog Port (APORT) Client Maps The Analog Port (APORT) is an infrastructure used to connect chip pins with on-chip analog clients such as analog comparators, ADCs, DACs, etc. The APORT consists of a set of shared buses, switches, and control logic needed to configurably implement the signal routing. Figure 8.2 APORT Connection Diagram on page 76 Shows the APORT routing for this device family. A complete description of APORT functionality can be found in the Reference Manual. The APORT information in this section is reflective of the IC used in the modules. Not all ports are available on the modules. The module pins available correspond with the pin names in this section. ACMP0X ACMP0Y ADC1X ADC1Y DY DX CY CX PC6 PC7 PC8 PC9 PC10 PJ14 PC11 PC0 PJ15 PC1 PC2 PC3 PC4 PC5 1X IDAC0 ACMP1X ACMP1Y PF0 POS PF1 PF2 PF3 NEG 0Y 1Y 2Y 3Y 4Y NEXT1 NEXT0 POS 0X 1X 2X 3X 4X NEXT0 NEXT2 NEG 0Y 1Y 2Y 3Y 4Y NEXT1 ACMP1 PF8 PF9 PF10 PF11 PF12 PF13 PF14 ADC0 PF15 PK0 PK1 0X 1X 2X 3X 4X NEXT1 NEXT0 EXTP EXTN PK2 PF4 PF5 POS OPA0_P 1X 2X 3X 4X NEG OPA0_N 1Y 2Y 3Y 4Y PF6 PF7 AX AY BX BY OPA0 OPA2 OUT OUT0 OUT0ALT OUT1 OUT2 OUT3 OUT4 NEXT0 POS OPA2_P 1X 2X 3X 4X NEG OPA2_N 1Y 2Y 3Y 4Y PB10 PB9 PB8 PB7 PB6 PI3 PI2 PI1 OPA1_P 1X 2X 3X 4X POS OPA1_N 1Y 2Y 3Y 4Y NEG OUT1 OUT1ALT OUT1 OUT2 OUT3 OUT4 NEXT1 PI0 PA9 PA8 PA7 LESENSE OPA1 PA6 LESENSE OUT OUT0ALT OUT1ALT VDAC0_OUT0ALT VDAC0_OUT1ALT OPA0_N OPA0_INN0 OUT0 OUT1ALT OPA0_OUT VDAC0_OUT1ALT OPA0_P OPA0_INP0 ADC_EXTP OUT2 OUT2ALT OUT1 OUT2 OUT3 OUT4 NEXT2 ADC0_EXTP ADC_EXTN OUT0ALT ADC0_EXTN OPA1N OPA1_INN0 PA5 LESENSE PA4 LESENSE PA3 LESENSE PA2 LESENSE PA1 LESENSE PA0 LESENSE OPA0ALT PD15 LESENSE 2X 2Y 4X 4Y OPA1_OUT BUSACMP0X, BUSACMP1Y, ... VDAC0_OPA2ALT VDAC0_OPA2ALT OUT2ALT OUT2ALT VDAC0_OUT0ALT OPA1_INP0 BUSADC0X, BUSADC0Y ACMP0X, ACMP1Y, ... PB11 OPA2_P VDAC0_OUT1ALT BUSAX, BUSBY, ... ADC0X, ADC0Y PB12 OUT2 NEG OUT1 CSEN CEXT_SENSE AX, BY, ... PB13 OPA2_N ACMP0 ALT0OUT OPA1_P APORTnX, APORTnY PB14 1X 1Y 3X 3Y CEXT nX, nY 0Y 1Y 2Y 3Y 4Y NEXT1 NEXT0 PB15 POS ALT1OUT OUT 0X 1X 2X 3X 4X NEXT1 NEXT0 1Y PD14 LESENSE PD13 LESENSE PD11 LESENSE PD12 LESENSE PD9 LESENSE PD10 LESENSE PD8 LESENSE Figure 8.2. APORT Connection Diagram Client maps for each analog circuit using the APORT are shown in the following tables. The maps are organized by bus, and show the peripheral's port connection, the shared bus, and the connection from specific bus channel numbers to GPIO pins. In general, enumerations for the pin selection field in an analog peripheral's register can be determined by finding the desired pin connection in the table and then combining the value in the Port column (APORT__), and the channel identifier (CH__). For example, if pin silabs.com | Building a more connected world. Rev. 1.2 | 76 silabs.com | Building a more connected world. PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 PB15 PB13 BUSCY BUSDX PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSCX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 PF15 PF13 BUSAY BUSBX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSAX APORT4Y APORT4X APORT3Y APORT3X APORT2Y APORT2X APORT1Y APORT1X APORT0X Port PA9 PA8 PA9 PA8 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 BUSACMP0Y BUSACMP0X Bus APORT0Y MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions PF7 is available on port APORT2X as CH23, the register field enumeration to connect to PF7 would be APORT2XCH23. The shared bus used by this connection is indicated in the Bus column. Table 8.4. ACMP0 Bus and Pin Mapping Rev. 1.2 | 77 silabs.com | Building a more connected world. PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 PB15 PB13 BUSCY BUSDX PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSCX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 PF15 PF13 BUSAY BUSBX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSAX APORT4Y APORT4X APORT3Y APORT3X APORT2Y APORT2X APORT1Y APORT1X APORT0X Port PJ15 PJ14 PJ15 PJ14 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 BUSACMP1Y BUSACMP1X Bus APORT0Y MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Table 8.5. ACMP1 Bus and Pin Mapping Rev. 1.2 | 78 silabs.com | Building a more connected world. PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 PB15 PB13 BUSCY BUSDX PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSCX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 PF15 PF13 BUSAY BUSBX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSAX APORT4Y APORT4X APORT3Y APORT3X APORT2Y APORT2X APORT1Y APORT1X APORT0X Port PI2 PI1 PI0 PI1 PI0 PI3 PI2 PI3 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 BUSADC0Y BUSADC0X Bus APORT0Y MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Table 8.6. ADC0 Bus and Pin Mapping Rev. 1.2 | 79 silabs.com | Building a more connected world. PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSCY PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSCX CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 Bus APORT1Y APORT1X Port PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSDX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSBX APORT4Y APORT4X APORT2Y APORT2X PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSCY PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSCX PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSAY PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSAX APORT3Y APORT3X APORT1Y APORT1X CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 Bus Port MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Table 8.7. CSEN Bus and Pin Mapping CEXT CEXT_SENSE Table 8.8. IDAC0 Bus and Pin Mapping Rev. 1.2 | 80 silabs.com | Building a more connected world. PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSDX PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSCX PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSBX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSAX APORT4X APORT3X APORT2X APORT1X PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSCY PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSAY APORT4Y APORT3Y APORT2Y APORT1Y CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 Bus Port MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions Table 8.9. VDAC0 / OPA Bus and Pin Mapping OPA0_N OPA0_P Rev. 1.2 | 81 silabs.com | Building a more connected world. PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSCY PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSAY APORT4Y APORT3Y APORT2Y APORT1Y PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSDX PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSCX PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSBX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSAX APORT4X APORT3X APORT2X APORT1X PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSCY PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSAY APORT4Y APORT3Y APORT2Y APORT1Y CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 Bus Port MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions OPA1_N OPA1_P OPA2_N Rev. 1.2 | 82 silabs.com | Building a more connected world. PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSCY PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSAY APORT4Y APORT3Y APORT2Y APORT1Y PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSDX PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSCX PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSBX PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSAX APORT4X APORT3X APORT2X APORT1X PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSCY PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSAY APORT4Y APORT3Y APORT2Y APORT1Y CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 Bus Port MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions OPA2_OUT OPA2_P VDAC0_OUT0 / OPA0_OUT Rev. 1.2 | 83 silabs.com | Building a more connected world. PD8 PD10 PD12 PD14 PA0 PA2 PA4 PA6 PB6 PB8 PB10 PB12 PB14 BUSDY PD9 PD11 PD13 PD15 PA1 PA3 PA5 PA7 PB7 PB9 PB11 PB13 PB15 BUSCY PC0 PC2 PC4 PC6 PC8 PC10 PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 BUSBY PC1 PC3 PC5 PC7 PC9 PC11 PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15 BUSAY APORT4Y APORT3Y APORT2Y APORT1Y CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22 CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 Bus Port MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Pin Definitions VDAC0_OUT1 / OPA1_OUT Rev. 1.2 | 84 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Package Specifications 9. Package Specifications 9.1 MGM12P Dimensions Figure 9.1. MGM12P Package Dimensions Figure 9.2. MGM12P with U.FL Package Dimensions silabs.com | Building a more connected world. Rev. 1.2 | 85 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Package Specifications 9.2 MGM12P Module Footprint The figure below shows the Module footprint and PCB dimensions. Figure 9.3. MGM12P Footprint silabs.com | Building a more connected world. Rev. 1.2 | 86 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Package Specifications 9.3 MGM12P Recommended PCB Land Pattern The figure below shows the recommended land pattern. The antenna clearance section is not required for the MGM12P module version with the U.FL connector. Figure 9.4. MGM12P Recommended PCB Land Pattern silabs.com | Building a more connected world. Rev. 1.2 | 87 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Package Specifications 9.4 MGM12P Package Marking The figure below shows the Module markings printed on the RF-shield. Figure 9.5. MGM12P Package Marking The module marking consists of: MGM12Pxxxxxx - Part number designation Model: MGM12Pxxxx - Model number designation FCC ID: QOQMGM12Px * QOQMGM12P0 for model MGM12P02GA and MGM12P02GE * QOQMGM12P2 for model MGM12P22GA and MGM12P22GE * QOQMGM12P3 for model MGM12P32GA and MGM12P32GE IC: 5123A-MGM12Px * 5123A-MGM12P0 for model MGM12P02GA and MGM12P02GE * 5123A-MGM12P2 for model MGM12P22GA and MGM12P22GE * 5123A-MGM12P3 for model MGM12P32GA and MGM12P32GE CE: * Includes MGM12P02 and MGM12P22 modules only YYWWTTTTTT * YY - The last 2 digits of the assembly year * WW - The 2 digit work week when the device was assembled * TTTTTT - A trace or manufacturing code. The first letter is the device revision silabs.com | Building a more connected world. Rev. 1.2 | 88 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Package Specifications QR Code: YYWWMMABCDE * YY - The last 2 digits of the assembly year * WW - The 2 digit work week when the device was assembled * MMABCDE - Silicon Labs unit code silabs.com | Building a more connected world. Rev. 1.2 | 89 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Tape and Reel Specifications 10. Tape and Reel Specifications 10.1 Tape and Reel Specification This section contains information regarding the tape and reel packaging for the MGM12P Mighty Gecko Module. 10.2 Reel Material and Dimensions * * * * * * * Reel material: Polystyrene (PS) Reel diameter: 13 inches (330 mm) Number of modules per reel: 1000 pcs Disk deformation, folding whitening and mold imperfections: Not allowed Disk set: consists of two 13 inch (330 mm) rotary round disks and one central axis (100 mm) Antistatic treatment: Required Surface resistivity: 104 - 109 /sq. Figure 10.1. Reel Dimension -- Side View Symbol Dimensions [mm] W0 44.0 +0.5/-.0.0 W1 48.0 silabs.com | Building a more connected world. Rev. 1.2 | 90 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Tape and Reel Specifications 10.3 Module Orientation and Tap The user direction of feed, start and end of tape on reel and orientation of the Modules on the tape are shown in the figures below. Figure 10.2. Module Orientation and Feed Direction silabs.com | Building a more connected world. Rev. 1.2 | 91 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Tape and Reel Specifications 10.4 Carrier Tape and Cover Tape Information Figure 10.3. Carrier Tape Information Figure 10.4. Cover Tape Information Symbol Dimensions [mm] Thickness (T) 0.055 +0.005/-0.003 Width (W) 37.50 +0.30/-0.10 silabs.com | Building a more connected world. Rev. 1.2 | 92 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Certifications 11. Certifications 11.1 CE The MGM12P02 and MGM12P22 modules are in conformity with the essential requirements and other relevant requirements of the Radio Equipment Directive (RED) (2014/53/EU). Please note that every application using the MGM12P will need to perform the radio EMC tests on the end-product according to EN 301 489-17. It is ultimately the responsibility of the manufacturer to ensure the compliance of the end-product. The specific product assembly may have an impact on RF radiated characteristics and manufacturers should carefully consider RF radiated testing with the end-product assembly. A formal DoC and a EU Type Examination Certificateare both available via www.silabs.com. 11.2 FCC This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: 1. This device may not cause harmful interference, and 2. This device must accept any interference received, including interference that may cause undesirable operation. Any changes or modifications not expressly approved by Silicon Labs could void the user's authority to operate the equipment. FCC RF Radiation Exposure Statement: This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End users must follow the specific operating instructions for satisfying RF exposure compliance. This transmitter meets both portable and mobile limits as demonstrated in the RF Exposure Analysis. This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter except in accordance with FCC multi-transmitter product procedures. OEM Responsibilities to comply with FCC Regulations OEM integrator is responsible for testing their end-product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.). * With MGM12P22GA, MGM12P22GE, MGM12P02GA and MGM12P02GE the antenna(s) must be installed such that a minimum separation distance of 6.7mm is maintained between the radiator (antenna) and all persons at all times. * With MGM12P32GA and MGM12P32GE the antenna(s) must be installed such that a minimum separation distance of 39mm is maintained between the radiator (antenna) and all persons at all times. * The transmitter module must not be co-located or operating in conjunction with any other antenna or transmitter except in accordance with FCC multi-transmitter product procedures. silabs.com | Building a more connected world. Rev. 1.2 | 93 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Certifications IMPORTANT NOTE: In the event that the above conditions cannot be met (for certain configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization. End Product Labeling The variants of MGM12P Modules are labeled with their own FCC IDs. If the FCC ID is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. In that case, the final product must be labeled in a visible area with the following MODELS MGM12P02GE and MGM12P02GA: "Contains Transmitter Module FCC ID: QOQMGM12P0" or "Contains FCC ID: QOQMGM12P0 MODELS MGM12P22GE and MGM12P22GA: "Contains Transmitter Module FCC ID: QOQMGM12P2" or "Contains FCC ID: QOQMGM12P2 MODELS MGM12P32GE and MGM12P32GA: "Contains Transmitter Module FCC ID: QOQMGM12P3" or "Contains FCC ID: QOQMGM12P3 The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module or change RF related parameters in the user manual of the end product. silabs.com | Building a more connected world. Rev. 1.2 | 94 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Certifications 11.3 ISEDC This radio transmitter (IC: 5123A-MGM12P) has been approved by Industry Canada to operate with the embedded chip antenna and a standard 2.14 dBi dipole antenna. Other antenna types are strictly prohibited for use with this device. This device complies with Industry Canada's license-exempt RSS standards. Operation is subject to the following two conditions: 1. This device may not cause interference; and 2. This device must accept any interference, including interference that may cause undesired operation of the device RF Exposure Statemment Exception from routine SAR evaluation limits are given in RSS-102 Issue 5. MGM12P22GA, MGM12P22GE, MGM12P02GA and MGM12P02GE modules meets the given requirements when the minimum separation distance to human body is 20 mm. MGM12P32GA and MGM12P32GA modules meets the given requirements when the minimum separation distance to human body is 35 mm. RF exposure or SAR evaluation is not required when the separation distance is same or more than stated above. If the separation distance is less than stated above the OEM integrator is responsible for evaluating the SAR. OEM Responsibilities to comply with IC Regulations The MGM12P module has been certified for integration into products only by OEM integrators under the following conditions: * The antenna(s) must be installed such that a minimum separation distance as stated above is maintained between the radiator (antenna) and all persons at all times. * The transmitter module must not be co-located or operating in conjunction with any other antenna or transmitter. As long as the two conditions above are met, further transmitter testing will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed (for example, digital device emissions, PC peripheral requirements, etc.). IMPORTANT NOTE: In the event that these conditions cannot be met (for certain configurations or co-location with another transmitter), then the ISEDC authorization is no longer considered valid and the IC ID cannot be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate ISEDC authorization. End Product Labeling The MGM12P modules are labeled with their own IC ID. If the IC ID is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. In that case, the final end product must be labeled in a visible area with the following: MODELS MGM12P02GE and MGM12P02GA: "Contains Transmitter Module IC: 5123A-MGM12P0" or "Contains IC: 5123A-MGM12P0 MODELS MGM12P22GE and MGM12P22GA: "Contains Transmitter Module IC: 5123A-MGM12P2" or "Contains IC: 5123A-MGM12P2 MODELS MGM12P32GE and MGM12P32GA: "Contains Transmitter Module IC: 5123A-MGM12P3" or "Contains IC: 5123A-MGM12P3" The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module or change RF related parameters in the user manual of the end product silabs.com | Building a more connected world. Rev. 1.2 | 95 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Certifications ISEDC (Francais) Industrie Canada a approuve l'utilisation de cet emetteur radio (IC: 5123A-MGM12P) en conjonction avec des antennes de type dipolaire a 2.14dBi ou des antennes embarquees, integree au produit. L'utilisation de tout autre type d'antenne avec ce composant est proscrite. Ce composant est conforme aux normes RSS, exonerees de licence d'Industrie Canada. Son mode de fonctionnement est soumis aux deux conditions suivantes : 1. Ce composant ne doit pas generer d'interferences 2. Ce composant doit pouvoir est soumis a tout type de perturbation y compris celle pouvant nuire a son bon fonctionnement. Declaration d'exposition RF L'exception tiree des limites courantes d'evaluation SAR est donnee dans le document RSS-102 Issue 5. Les modules MGM12P22GA, MGM12P22GE, MGM12P02GA et MGM12P02GE repondent aux exigences requises lorsque la distance minimale de separation avec le corps humain est de 20 mm. Les modules MGM12P32GA et MGM12P32GA repondent aux exigences requises lorsque la distance minimale de separation avec le corps humain est de 35 mm. La declaration d'exposition RF ou l'evaluation SAR n'est pas necessaire lorsque la distance de separation est identique ou superieure a celle indiquee ci-dessus. Si la distance de separation est inferieure a celle mentionnees plus haut, il incombe a l'integrateur OEM de procede a une evaluation SAR. Responsabilites des OEM pour une mise en conformite avec le Reglement du Circuit Integre Le module MGM12P a ete approuve pour l'integration dans des produits finaux exclusivement realises par des OEM sous les conditions suivantes: * L'antenne (s) doit etre installee de sorte qu'une distance de separation minimale indiquee ci-dessus soit maintenue entre le radiateur (antenne) et toutes les personnes avoisinante, ce a tout moment. * Le module emetteur ne doit pas etre localise ou fonctionner avec une autre antenne ou un autre transmetteur que celle indiquee plus haut. Tant que les deux conditions ci-dessus sont respectees, il n'est pas necessaire de tester ce transmetteur de facon plus poussee. Cependant, il incombe a l'integrateur OEM de s'assurer de la bonne conformite du produit fini avec les autres normes auxquelles il pourrait etre soumis de fait de l'utilisation de ce module (par exemple, les emissions des peripheriques numeriques, les exigences de peripheriques PC, etc.). REMARQUE IMPORTANTE: dans le cas ou ces conditions ne peuvent etre satisfaites (pour certaines configurations ou co-implantation avec un autre emetteur), l'autorisation ISEDC n'est plus consideree comme valide et le numero d'identification ID IC ne peut pas etre appose sur le produit final. Dans ces circonstances, l'integrateur OEM sera responsable de la reevaluation du produit final (y compris le transmetteur) et de l'obtention d'une autorisation ISEDC distincte. Etiquetage des produits finis Les modules MGM12P sont etiquetes avec leur propre ID IC. Si l'ID IC n'est pas visible lorsque le module est integre au sein d'un autre produit, cet autre produit dans lequel le module est installe devra porter une etiquette faisant apparaitre les reference du module integre. Dans un tel cas, sur le produit final doit se trouver une etiquette aisement lisible sur laquelle figurent les informations suivantes : MODELES MGM12P02GE et MGM12P02GA: "Contient le module transmetteur : 5123A-MGM12P0" ou "Contient le circuit: 5123A-MGM12P0 MODELES MGM12P22GE et MGM12P22GA: "Contient le module transmetteur: 5123A-MGM12P2" ou "Contient IC: 5123A-MGM12P2 silabs.com | Building a more connected world. Rev. 1.2 | 96 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Certifications MODELES MGM12P32GE et MGM12P32GA: "Contient le module emetteur IC: 5123A-MGM12P3" ou "Contient IC: 5123A-MGM12P3" L'integrateur OEM doit etre conscient qu'il ne doit pas fournir, dans le manuel d'utilisation, d'informations relatives a la facon d'installer ou de d'enlever ce module RF ainsi que sur la procedure a suivre pour modifier les parametres lies a la radio. silabs.com | Building a more connected world. Rev. 1.2 | 97 MGM12P Mighty Gecko Multi-Protocol Wireless Mesh Module Data Sheet Revision History 12. Revision History Revision 1.2 January 2019 * Updated Section 2. Ordering Information. * Updated Section 9.1 MGM12P Dimensions * Updated Section 9.4 MGM12P Package Marking. * Updated Section 11.1 CE. Revision 1.1 April 2018 * Updated Section 2. Ordering Information. * Updated Section Table 3.1 Antenna Efficiency and Peak Gain (MGM12P) on page 7. * Updated Section 4.1.8 2.4 GHz RF Transceiver Characteristics Revision 1.0 * Minor Updates Revision 0.2 * Initial Publication silabs.com | Building a more connected world. Rev. 1.2 | 98 Simplicity Studio One-click access to MCU and wireless tools, documentation, software, source code libraries & more. Available for Windows, Mac and Linux! IoT Portfolio www.silabs.com/IoT SW/HW www.silabs.com/simplicity Quality www.silabs.com/quality Support and Community community.silabs.com Disclaimer Silicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes without further notice to the product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Without prior notification, Silicon Labs may update product firmware during the manufacturing process for security or reliability reasons. Such changes will not alter the specifications or the performance of the product. Silicon Labs shall have no liability for the consequences of use of the information supplied in this document. This document does not imply or expressly grant any license to design or fabricate any integrated circuits. The products are not designed or authorized to be used within any FDA Class III devices, applications for which FDA premarket approval is required or Life Support Systems without the specific written consent of Silicon Labs. A "Life Support System" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. Silicon Labs products are not designed or authorized for military applications. Silicon Labs products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons. Silicon Labs disclaims all express and implied warranties and shall not be responsible or liable for any injuries or damages related to use of a Silicon Labs product in such unauthorized applications. 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