www.powerint.com May 2011
LNK584-586
LinkZero-AX
Zero Standby Consumption Integrated Off-Line Switcher
™
Product Highlights
Lowest System Cost with Zero Standby Consumption
• Simple system configuration provides zero consumption
standby/Power-Down with user controlled wake up
• Very tight IC parameter tolerances improves system manufac-
turing yield
• Suitable for low-cost clampless designs
• Frequency jittering greatly reduces EMI filter cost
• Extended package creepage improves system field reliability
Advanced Protection/Safety Features
• Hysteretic thermal shutdown protection – automatic recovery
reduces field returns
• Universal input range allows worldwide operation
• Auto-restart reduces delivered power by >85% during
short-circuit and open loop fault conditions
• Simple ON/OFF control, no loop compensation needed
• High bandwidth provides fast turn on with no overshoot
EcoSmart™ – Energy Efficient
• Standby/Power-Down consumption less than 3 mW at
325 VDC input (Note 1)
• Easily meets all global energy efficiency regulations with no
added components
• ON/OFF control provides constant efficiency to very light loads
Applications
• Ultra low consumption isolated or non-isolated standby and
auxiliary supplies
Description
LinkZero-AX combines extremely low standby/Power-Down energy
use with the industry’s lowest component count standby supply
solution. Below 3 mW at 230 VAC in Power-Down (PD) mode
meets IEC 62301 definition of zero power consumption and is
immeasurable on most power meters. LinkZero-AX is set into
Power-Down mode using an external signal to pull the FEEDBACK
pin high for 2.5 ms. Such an external signal can be generated by a
system micro controller or infrared controller. In Power-Down mode
the BYPASS pin remains regulated allowing the LinkZero-AX to be
woken up with a reset pulse to pull the BYPASS pin below a reset
threshold (1.5 V). Ultra low system consumption is therefore achieved
without needing to disconnect the input voltage with a relay.
LinkZero-AX is designed to be used in isolated or non-isolated
converters. In either, the tightly specified FEEDBACK (FB) pin
voltage reference enables universal input primary side regulated
power supplies that cost effectively replace unregulated linear
transformer and other switched mode supplies. The start-up and
operating power are derived directly from the DRAIN pin. The
internal oscillator frequency is jittered to significantly reduce both
quasi-peak and average EMI, minimizing filter cost.
Figure 1. Typical Application Schematic.
Output Power Table
Product3
230 VAC ±15% 85-265 VAC
Open Frame2Open Frame2
LNK584DG 3 W 3 W
LNK584GG 3 W 3 W
LNK585DG 4.5 W 4 W
LNK585GG 5 W 4.5 W
LNK586DG 6 W 5 W
LNK586GG 6.5 W 5.5 W
Table 1. Output Power Table.
Notes:
1. IEC 62301 Clause 4.5 rounds standby power use below 5 mW to zero.
2. Maximum practical continuous power in an open frame design with adequate heat
sinking, measured at 50 °C ambient.
3. Packages: D: SO-8C, G: SMD-8C.
+
+
D
S
BP/M
FB
DC
Output
Wide Range
High-Voltage
DC Input
LinkZero-AX Power
Down
Pulse
≥2.5 ms
PI-5909-120710
PIN <0.00 W at
325 VDC in
Power Down Mode
Reset/Wake
Up Pulse
CBP
Rev. B 05/11
2
LNK584-586
www.powerint.com
Figure 2. Functional Block Diagram.
Figure 3. Pin Configuration.
Pin Functional Description
DRAIN (D) Pin:
The power MOSFET drain connection provides internal
operating current for both start-up, steady-state and Power-
Down mode operation.
BYPASS/MULTI-FUNCTIONAL (BP/M) Pin:
An external bypass capacitor, 0.1 mF or greater for the internally
generated 5.85 V supply is connected to this pin. The minimum
value of capacitor is 0.1 mF for internal circuit operation. Higher
values may be required to enter Power-Down mode (see
LinkZero-AX Power-Down (PD) Mode Design Considerations).
An overvoltage protection disables MOSFET switching if the
current into the pin exceeds 6.5 mA (ISD).
FEEDBACK (FB) Pin:
During normal operation, switching of the power MOSFET is
controlled by this pin. MOSFET switching is disabled when a
voltage greater than an internal VFB reference voltage is applied
to this pin. The VFB reference voltage is internally set to 1.70 V.
LinkZero-AX goes into auto-restart mode when the FEEDBACK
pin voltage has come down to 0.9 V.
SOURCE (S) Pin:
This pin is the power MOSFET source connection. It is also the
ground reference for the BYPASS and FEEDBACK pins.
PI-5910-090810
3a 3b
DS
FB S
S
BP/M
G Package (SMD-8C) D Package (SO-8C)
8
5
7
1
4
2
S6
BP/M
FB
D
1
2
4
8
7
6
5
S
S
S
S
PI-5912-110910
CLOCK
OSCILLATOR
5.85 V
4.85 V
6.5 V3 V
PU
OVERVOLTAGE
PROTECTION
RESET
0.9 V
FAULT
SOURCE
(S)
S
R
Q
DCMAX
ADJ
AUTO-RESTART
COUNTER
RESET JITTER
+
-
VILIMIT
LEADING
EDGE
BLANKING
+
-
DRAIN
(D)
BYPASS PIN
UNDERVOLTAGE
CURRENT LIMIT
FEEDBACK
(FB)
OPEN LOOP
PULL UP
Q
+
+
+
+
REGULATOR
5.85 V
GENERATOR
FEEDBACK REF
1.70 V
CC CUT BACK
1.70 V - 0.9 V
POWER
DOWN
COUNTER
SYSTEM
POWER
DOWN
PU
160 fOSC
CYCLES
BYPASS/
MULTI FUNCTION
(BP/M)
Rev. B 05/11
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LNK584-586
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LinkZero-AX Functional Description
LinkZero-AX comprises a 700 V power MOSFET switch with a
power supply controller on the same die. Unlike conventional
PWM (pulse width modulation) controllers, it uses a simple
ON/OFF control to regulate the output voltage. The controller
consists of an oscillator, feedback (sense and logic) controller,
5.85 V regulator, BYPASS pin undervoltage protection, over-
temperature protection, frequency jittering, current limit protection,
and leading edge blanking. The controller includes a proprietary
Power-Down mode that automatically reduces standby consump-
tion to levels that are immeasurable on most power meters.
Power-Down Mode
The internal controller will go into Power-Down mode when 160
switching cycles are skipped. This can occur due to the
FEEDBACK pin being pulled high using an external Power-Down
pulse signal or due to a light load condition where the total
loading on the transformer (output plus feedback circuit loads)
has reduced to ~0.6% of full load. The device then operates in
an ultra low consumption Power-Down mode where switching
is disabled completely. The controller wakes up (or is reset)
when the BYPASS pin is pulled below 1.5 V and then released
to be recharged through the internal drain connected 5.85 V
regulator block (see Figure 2). When the BYPASS capacitor
recharges to the VBP BYPASS pin threshold, the device starts
switching and operates normally. If the FEEDBACK pin is pulled
high such that 160 cycles are again skipped, the device returns
to Power-Down mode operation as described above. In
applications with dynamic loads it may not be desirable to go
into Power-Down mode under light or no-load conditions.
Techniques to ensure this is avoided are discussed below in the
LinkZero-AX Power-Down Mode Design Considerations section.
Oscillator
The typical oscillator frequency is internally set to an average of
100 kHz. An internal circuit senses the duty cycle of the MOSFET
switch conduction-time and adjusts the oscillator frequency so
that during long conduction intervals (low line voltage) the
frequency is about 100 kHz and at short conduction intervals
(high line voltage) the oscillator frequency is about 78 kHz. This
internal frequency adjustment is used to make the peak power
point constant over line voltage. Two signals are generated from
the oscillator: the maximum duty cycle signal (DCMAX) and the
clock signal that indicates the beginning of a switching cycle.
The oscillator incorporates circuitry that introduces a small
amount of frequency jitter, typically 6% of the switching
frequency, to minimize EMI. The modulation rate of the
frequency jitter is set to 1 kHz to optimize EMI reduction for
both average and quasi-peak measurements. The frequency
jitter, which is proportional to the oscillator frequency, should be
measured with the oscilloscope triggered at the falling edge of
the DRAIN voltage waveform. The oscillator frequency is
gradually reduced when the FEEDBACK pin voltage is lowered
below 1.70 V.
Feedback Input Circuit CV Mode
The feedback input circuit reference is set at 1.70 V. When the
FEEDBACK pin voltage reaches a VFB reference voltage (1.70 V),
a low logic level (disable) is generated at the output of the
feedback circuit. This output is sampled at the beginning of
each cycle. If high, the power MOSFET is turned on for that
cycle (enabled), otherwise the power MOSFET remains off
(disabled). Since the sampling is done only at the beginning of
each cycle, subsequent changes in the FEEDBACK pin voltage
during the remainder of the cycle are ignored.
Output Power Limiting
When the FEEDBACK pin voltage at full load falls below 1.70 V,
the oscillator frequency linearly reduces to typically 60% at the
auto-restart threshold voltage of 0.9 V. This function limits the
power supply output current and power.
5.85 V Regulator
The BYPASS pin voltage is regulated by drawing a current from
the DRAIN whenever the MOSFET is off if needed to charge up
the BYPASS pin to a typical voltage of 5.85 V. When the
MOSFET is on, LinkZero-AX runs off of the energy stored in the
bypass capacitor. Extremely low power consumption of the
internal circuitry allows LinkZero-AX to operate continuously
from the current drawn from the DRAIN pin. A bypass
capacitor value of 0.1 mF is sufficient for both high frequency
decoupling and energy storage.
6.5 V Shunt Regulator and 8.5 V Clamp
In addition, there is a shunt regulator that helps maintain the
BYPASS pin at 6.5 V when current is provided to the BYPASS
pin externally. This facilitates powering the device externally
through a resistor from the bias winding or power supply output
in non-isolated designs, to decrease device dissipation and
increase power supply efficiency.
The 6.5 V shunt regulator is only active in normal operation, and
when in Power-Down mode a clamp at a higher voltage (typical
8.5 V) will clamp the BYPASS pin.
BYPASS Pin Undervoltage Protection
The BYPASS pin undervoltage circuitry disables the power
MOSFET when the BYPASS pin voltage drops below 4.85 V.
Once the BYPASS pin voltage drops below 4.85 V, it must rise
back to 5.85 V to enable (turn on) the power MOSFET.
BYPASS Pin Overvoltage Protection
If the BYPASS pin gets pulled above 6.5 V and the current into
the shunt exceeds 6.5 mA a latch will be set and the power
MOSFET will stop switching. To reset the latch the BYPASS pin
has to be pulled down to below 1.5 V.
Over-Temperature Protection
The thermal shutdown circuit senses the die temperature. The
threshold is set at 142 °C typical with a 70 °C hysteresis. When
the die temperature rises above this threshold (142 °C) the
power MOSFET is disabled and remains disabled until the die
temperature falls by 70 °C, at which point the MOSFET is
re-enabled.
Current Limit
The current limit circuit senses the current in the power
MOSFET. When this current exceeds the internal threshold
(ILIMIT), the power MOSFET is turned off for the remainder of that
cycle. The leading edge blanking circuit inhibits the current limit
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LNK584-586
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comparator for a short time (tLEB) after the power MOSFET is
turned on. This leading edge blanking time has been set so
that current spikes caused by capacitance and rectifier reverse
recovery time will not cause premature termination of the
MOSFET conduction.
Auto Restart
In the event of a fault condition such as output short-circuit,
LinkZero-AX enters into auto-restart operation. An internal
counter clocked by the oscillator gets reset every time the
FEEDBACK pin voltage exceeds the FEEDBACK pin auto-restart
threshold voltage (VFB(AR) typical 0.9 V). If the FEEDBACK pin
voltage drops below VFB(AR) for more than 145 ms to 170 ms
depending on the line voltage, the power MOSFET switching is
disabled. The auto-restart alternately enables and disables the
switching of the power MOSFET at a duty cycle of typically 12%
until the fault condition is removed.
Open Loop Condition on the FEEDBACK Pin
When an open loop condition on the FEEDBACK pin is detected,
an internal current source pulls up the FEEDBACK pin to above
the VFB (1.70 V), the part stops switching and after 160 clock
cycles goes into latched Power-Down mode.
Applications Example
The circuit shown in Figure 4 is a typical non-isolated 5 V, 300 mA
output auxiliary power supply using LinkZero-AX. Isolated
configurations are also fully compatible with the LinkZero-AX
where the FEEDBACK pin receives a signal from a primary
feedback/bias winding or through an optocoupler. The circuit
of Figure 4 is typical of auxiliary supplies in white goods where
isolation is often not required. AC input differential filtering is
accomplished by the π filter formed by C1, C2 and L3. The
proprietary frequency jitter feature of the LinkZero-AX eliminates
the need for any Y capacitor or common-mode inductor. Wire-
wound resistor RF1 is a fusible, flame proof resistor which is used
as a fuse as well as to limit inrush current. Wire wound types are
recommended for designs that operate >132 VAC to withstand
the instantaneous power dissipated when AC is first applied.
The output voltage is directly sensed through feedback resistors
R3 and R9, and regulated by LinkZero-AX (U1) via the FEEDBACK
pin. Capacitor C7 provides high frequency filtering on the
FEEDBACK pin to filter noise and to avoid switching cycle pulse
bunching. The controller in U1 receives feedback from the
output through feedback resistors R9 and R3. Based on that
feedback, it enables or disables the switching of its integrated
MOSFET to maintain output regulation. Switching cycles are
skipped once the FEEDBACK pin threshold voltage (1.70 V) is
exceeded. When the voltage on the FEEDBACK pin falls below
the disable threshold (1.70 V), switching cycles are re-enabled.
By adjusting the ratio of enabled to disabled switching cycles
the output voltage is regulated. At increased loads, beyond the
output peak power point, where all switching cycles are
enabled, the FEEDBACK pin voltage begins to reduce as the
power supply output voltage falls. Under this condition the
switching frequency is also reduced to limit the maximum output
overload power. When the FEEDBACK pin voltage drops below
the auto-restart threshold (typically 0.9 V on the FEEDBACK
pin), the power supply enters the auto-restart mode. In this
mode, the power supply will turn off for approximately 1.2 s and
then turn back on for approximately 145 ms. The auto-restart
function reduces the average output current during an output
short-circuit condition.
Figure 4. Schematic of Non-Isolated 1.5 W, 5 V, 300 mA, 0.00 W Standby Consumption Power Supply.
PI-6121-101210
D
S
FB
BP/M
L3
1 mH
C1
3.3 µF
400 V
C5
150 nF
25 V
C7
1 nF
50 V
C10
47 µF
25 V
C9
330 nF
50 V
C2
3.3 µF
400 V
C4
220 pF
100 V
C8
56 µF
16 V
C6
220 µF
25 V
U1
LNK584DG
LinkZero-AX
R2
4.7 kΩ
R3
511 Ω
1%
R16
750 Ω
R11
100 Ω
R12
20 kΩ
R14
2 kΩ
R4
10 kΩ
R10
20 kΩ
R9
1 kΩ
1%
T1
EE16
3
10
8
1
R13
510 Ω
D6
SS15
R8
5.1 Ω
D1
1N4007
D2
1N4007
D3
1N4007
D4
1N4007
L4
1.8 µH
RF1
10 Ω
2 W
85 - 265
VAC
5 V, 300 mA
RTN
PD Set
PD Reset
RTN
Q2
MMBT3904
Q1
MMBT3904
SW1
Rev. B 05/11
5
LNK584-586
www.powerint.com
The LinkZero-AX device is self biased through the DRAIN pin.
An optional external bias, can be derived either from a third
winding or from an output voltage rail in non-isolated designs.
By providing an external supply current in excess of IS2 (310 mA
for the LNK584) the internal 5.85 V regulator circuit is disabled
providing a simple way to reduce device temperature and
improve efficiency, especially at high line.
A clampless primary circuit is achieved due to the very tight
tolerance current limit device, plus the transformer construction
techniques used. The peak drain voltage is therefore limited to
typically less than 550 V at 265 VAC, providing significant margin
to the 700 V minimum drain voltage specification (BVDSS).
Output rectification and filtering is achieved with output rectifier
D6 and filter capacitor C6. Due to the auto-restart feature, the
average short-circuit output current is significantly less than 1 A,
allowing low current rating and low cost rectifier D6 to be used.
Output circuitry is designed to handle a continuous short-circuit
on the power supply output. In this design a preload resistor R13
is used at the output of the supply to prevent automatic
triggering of the Power-Down mode when the load is removed.
LinkZero-AX Power-Down (PD) Mode
Design Considerations
LinkZero-AX goes into Power-Down mode when 160 consecutive
switching cycles have been skipped. This condition occurs
when the output load is low or the FEEDBACK pin is pulled high
(for example through Q1 and R16 in Figure 4). The value of the
BYPASS pin capacitor must be high enough to sustain enough
current through R16 for more than the period of 160 switching
cycles to successfully trigger the Power-Down mode. At low line
input voltage (90 VAC) the 160 switching cycle period is ~1.6 ms
as the internal oscillator frequency is 100 kHz. However as the
input line voltage increases, the internal oscillator frequency is
gradually reduced to keep the maximum output power relatively
constant. At high line (265 VAC) therefore, the internal oscillator
frequency can be as low as 78 kHz (see parameter table Note C).
Therefore to provide sufficient margin to ensure Power-Down
mode is triggered it is recommended that the Power-Down pulse
(see Figure 1) is 2.5 ms (200 switching cycles at 80 kHz).
LinkZero-AX stops switching once the Power-Down mode is
triggered. The IC does not resume switching until the BYPASS
pin is pulled below 1.5 V using the reset/wake up pulse (see
Figure 1) and then allowed to recharge back up to 5.85 V
through the drain connected 5.85 V regulator block. Transistor
Q2 or mechanical switch SW1 can be used for resetting the
Power-Down mode either electronically or mechanically.
It is important to design the power supply to ensure that load
transients and other external events do not unintentionally
trigger Power-Down mode by causing 160 consecutive switching
cycles to be skipped. It is recommended that a preload resistor
is added to draw ~2% of the full load current (12 mA at 5 V in a
3 W power supply). Although this reduces full load efficiency
slightly, it has no influence on the power consumption during
Power-Down mode since the power supply output is fully
discharged under this condition. Low value feedback resistors
may also be used as a preload too. Recommended value of the
feedback resistors is such that they should draw ~1% of full load
current. Finally a capacitor in parallel to the high side feedback
resistor can be used to increase the speed of the loop (C9 in
Figure 4).
These recommendations apply for full load to zero load transients.
For applications with more limited load range, the preload and
the capacitor in parallel to the high side feedback resistor may
not be necessary.
Layout Considerations
LinkZero-AX Layout Considerations
Layout
See Figure 5 for a recommended circuit board layout for
LinkZero-AX (U1).
Single Point Grounding
Use a single point ground (Kelvin) connection from the input
filter capacitor to the area of copper connected to the SOURCE
pins.
Bypass Capacitor (CBP), FEEDBACK Pin Noise Filter
Capacitor (CFB) and Feedback Resistors
To minimize loop area, these two capacitors should be physically
located as near as possible to the BYPASS and SOURCE pins,
and FEEDBACK pin and source pins respectively. Also note
that to minimize noise pickup, feedback resistors RFB1 and RFB2
are placed close to the FEEDBACK pin.
Primary Loop Area
The area of the primary loop that connects the input filter
capacitor, transformer primary and LinkZero-AX should be kept
as small as possible.
Primary Clamp Circuit
An external clamp may be used to limit peak voltage on the
DRAIN pin at turn off. This can be achieved by using an RCD
clamp or a Zener (~200 V) and diode clamp across the primary
winding. In all cases, to minimize EMI, care should be taken to
minimize the circuit path from the clamp components to the
transformer and LinkZero-AX (U1).
Thermal Considerations
The copper area underneath the LinkZero-AX (U1) acts not only
as a single point ground, but also as a heat sink. As it is
connected to the quiet source node, this area should be
maximized for good heat sinking of U1. The same applies to
the cathode of the output diode.
Y Capacitor
The placement of the Y-type capacitor (if used) should be
directly from the primary input filter capacitor positive terminal to
the common/return terminal of the transformer secondary.
Such a placement will route high magnitude common-mode
surge currents away from U1. Note: If an input π EMI filter is
used, the inductor in the π filter should be placed between the
negative terminals on the input filter capacitors.
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LNK584-586
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Output Diode (DO)
For best performance, the area of the loop connecting the
secondary winding, the output diode (DO) and the output filter
capacitor (CO) should be minimized. In addition, sufficient
copper area should be provided at the anode and cathode
terminals of the diode for heat sinking. A larger area is preferred
at the electrically “quiet” cathode terminal. A large anode area
can increase high frequency conducted and radiated EMI.
Resistor RS and CS represent the secondary side RC snubber.
Quick Design Checklist
As with any power supply design, all LinkZero-AX designs
should be verified on the bench to make sure that component
specifications are not exceeded under worst-case conditions.
The following minimum set of tests is strongly recommended:
1. Maximum drain voltage – Verify that VDS does not exceed
660 V at the highest input voltage and peak (overload) output
power. This margin to the 700 V BVDSS specification gives
margin for design variation, especially in clampless designs.
2. Maximum drain current – At maximum ambient temperature,
maximum input voltage and peak output (overload) power,
verify drain current waveforms for any signs of transformer
saturation and excessive leading-edge current spikes at
start-up. Repeat under steady state conditions and verify
that the leading-edge current spike event is below ILIMIT(MIN) at
the end of the tLEB(MIN). Under all conditions, the maximum
drain current should be below the specified absolute
maximum ratings.
3. Thermal check – At specified maximum output power,
minimum input voltage and maximum ambient temperature,
verify that the temperature specifications are not exceeded
for LinkZero-AX, transformer, output diode and output
capacitors. Enough thermal margin should be allowed for
part-to-part variation of the RDS(ON) of LinkZero-AX as specified
in the data sheet. Under low line and maximum power, maxi-
mum LinkZero-AX source pin temperature of 100 °C is
recommended to allow for these variations.
Figure 5. PCB Layout of a 2.1 W, 6 V, 350 mA Charger.
+
–
HV DC
IN
+
–
LV DC
OUT
Transformer
CB
RFB1
T1
J3
R6
CO
DO
U1
CFB
RFB2
DBP
RBP
CBP
DBRSCS
PI-6098-092410
Rev. B 05/11
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LNK584-586
www.powerint.com
Absolute Maximum Ratings(1,6)
DRAIN Voltage .................................. ........................-0.3 V to 700 V
Peak DRAIN Current (2): LNK584 ...........................200 (375) mA
LNK585 ...........................370 (680) mA
LNK586 ...........................440 (825) mA
Peak Negative Pulsed Drain Current(3)................... .......... -100 m A
Feedback Voltage ......................................................... -0.3 V to 9 V
Feedback Current ................................................................ 100 mA
BYPASS Pin Voltage ...................................... ............. -0.3 V to 9 V
BYPASS Pin Voltage in Power-Down Mode(7) ....... -0.3 V to 11 V
Storage Temperature ...................................... ..... -65 °C to 150 °C
Operating Junction Temperature(4) ....................-40 °C to 150 °C
Lead Temperature(5) ....................................................... .........260 °C
Notes:
1. All voltages referenced to SOURCE, TA = 25 °C.
2. Higher peak DRAIN current allowed while DRAIN source
voltage does not exceed 400 V.
3. Duration not to exceed 2 ms.
4. Normally limited by internal circuitry.
5. 1/16 in. from case for 5 seconds.
6. Maximum ratings specified may be applied, one at a time
without causing permanent damage to the product.
Exposure to Absolute Maximum ratings for extended
periods of time may affect product reliability.
7. Maximum current into pin is 300 mA.
Thermal Resistance
Thermal Resistance: D Package:
(qJA) ..................................100 °C/W(2); 80 °C/W(3)
(qJC) ................................................. ........30 °C/W(1)
G Package:
(qJA) ....................................70 °C/W(2); 60 °C/W(3)
(qJC) ................................................. ........ 11 °C/W(1)
Notes:
1. Measured on the SOURCE pin close to plastic interface.
2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. copper clad.
3. Soldered to 1 sq. in. (645 mm2), 2 oz. copper clad.
Parameter Symbol
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
(Unless Otherwise Specified)
Min Typ Max Units
Control Functions
Output Frequency fOSC
TJ = 25 °C
VFB = 1.70 V, See Note B 93 100 107 kHz
Frequency Jitter Peak-Peak Jitter Compared to
Average Frequency, TJ = 25 °C ±3 %
Ratio of Output
Frequency at
Auto-Restart to fOSC
fOSC(AR)
fOSC
TJ = 25 °C
VFB = VFB(AR)
60 %
Maximum Duty Cycle DCMAX 60 63 %
FEEDBACK Pin
Voltage VFB 1.63 1.70 1.77 V
FEEDBACK Pin
Voltage at Auto-
Restart
VFB(AR) 0.8 0.9 1.05 V
Minimum Switch
ON-Time tON(MIN) 700 ns
DRAIN Supply Current
IS1
Feedback Voltage > VFB
(MOSFET not Switching) 200 260 mA
IS2
0.9 V ≤ VFB ≤ 1.70 V
(MOSFET Switching)
LNK584 260 310
mALNK585 275 330
LNK586 285 340
Rev. B 05/11
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LNK584-586
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Parameter Symbol
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
(Unless Otherwise Specified)
Min Typ Max Units
Control Functions (cont.)
BYPASS Pin
Charge Current
ICH1
VBP = 0 V,
TJ = 25 °C
LNK584 -5.5 -3.8 -1.8
mA
LNK585-586 -7.0 -5.3 -3.3
ICH2
VBP = 4 V,
TJ = 25 °C
LNK584 -3.8 -2.5 -1.0
LNK585-586 -4.8 -3.5 -2.0
BYPASS Pin Voltage VBP 5.60 5.85 6.10 V
BYPASS Pin
Voltage Hysteresis VBP(H) 0.8 1.0 1.2 V
BYPASS Pin
Shunt Voltage BPSHUNT 6.1 6.5 6.9 V
BYPASS Pin
Supply Current IBPSC See Note D 84 mA
Circuit Protection
Current Limit ILIMIT
di/dt = 40 mA/ms
TJ = 25 °CLNK584 126 136 146
mA
di/dt = 75 mA/ms
TJ = 25 °CLNK585 232 250 268
di/dt = 90 mA/ms
TJ = 25 °CLNK586 279 300 321
Power Coefficient I2f
di/dt = 40 mA/ms
TJ = 25 °CLNK584 1665 1850 2091
A2Hz
di/dt = 75 mA/ms
TJ = 25 °CLNK585 5625 6250 7063
di/dt = 90 mA/ms
TJ = 25 °CLNK586 8100 9000 10170
Leading Edge
Blanking Time tLEB TJ = 25 °C 220 265 ns
BYPASS Pin Shutdown
Threshold Current ISD
VBP = BPSHUNT
See Note F 5.0 6.5 8.0 mA
Thermal Shutdown
Temperature TSD See Note A 135 142 150 °C
Thermal Shutdown
Hysteresis TSD(H) See Note A 70 °C
Power-Down (PD) Mode
OFF-State Drain Leakage
in Power-Down Mode IDSS(PD)
TJ = 25 °C, VDRAIN = 325 V
See Figure 21 6.5 9 mA
BYPASS Pin Overvoltage
Protection in
Power-Down Mode
VBP(PDP)
IBP = 300 mA
-5 °C ≤ TJ ≤ 100 °C7.0 8.5 10.9 V
BYPASS Pin Power-Up
Reset Threshold (in
Power-Down Mode or at
Power Supply Start-up)
VBP(PU) 1.5 3 4 V
Rev. B 05/11
9
LNK584-586
www.powerint.com
Parameter Symbol
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
(Unless Otherwise Specified)
Min Typ Max Units
Power-Down (PD) Mode (cont.)
BYPASS Pin Voltage in
Power-Down Mode VBP(PD) IBP = 500 mA 4 V
BYPASS PinPower-
Down to Power-Up
Threshold Delta
VBP(PD)
- VBP(PU)
0.5 V
BYPASS Pin Supply
Current in
Power-Down Mode
IBP(PD)
VBP = VBP(PD)
See Note E 500 mA
Output
ON-State
Resistance RDS(ON)
LNK584
ID = 13 mA
TJ = 25 °C 48 55
W
TJ = 100 °C 76 88
LNK585
ID = 26 mA
TJ = 25 °C24 28
TJ = 100 °C 38 44
LNK586
ID = 33 mA
TJ = 25 °C 19 22
TJ = 100 °C 30 35
Breakdown
Voltage BVDSS VBP = 6.2 V, TJ = 25 °C 700 V
DRAIN Supply
Voltage 50 V
Auto-Restart
ON-Time tAR VIN = 85 VAC, TJ = 25 °C,
See Note C
145 ms
Auto-Restart
Duty Cycle 11 %
Output Enable Delay tEN See Figure 8 14 ms
NOTES:
A. This parameter is derived from characterization.
B. Output frequency specification applies to low line input voltage in the final application. The controller is designed to reduce output
frequency by approximately 20% at high line input voltages to balance low line and high line maximum output power.
C. The auto-restart on-time/off-time is increased by 20% from low to high line voltage input (85 VAC to 265 VAC).
D. IBPSC is the current that can be supplied from the BYPASS pin at 5.85 V when in normal switching mode of operation to power an
optional external circuit. The current will be supplied from the Drain via the internal BYPASS pin voltage regulator. When calculat-
ing the power consumption the IBPSC (84 mA max) and the drain voltage has to be taken into account. More current can be
sourced during Power-Down mode – see Note F.
E. IBPSC(PD) is the current that can be supplied from the BYPASS pin at 4 V when in Power-Down mode to power an optional external
circuit. The current will be supplied from the Drain via the internal BYPASS pin voltage regulator. Lower current is available during
normal operation - see Note E. If the external circuit requires current in excess of IBP(PD) in Power-Down mode, it must be supplied
from an external source such as a bias winding. The IBP(PD) current adds to power supply power consumption during Power-Down
mode – for example at 230 VAC (325 VDC rectified DC rail voltage) the power consumption with be 325 × IBP(PD).
F. LinkZero-AX shuts down if the current into the BYPASS pin reaches ISD at the BPSHUNT voltage.
Rev. B 05/11
10
LNK584-586
www.powerint.com
Figure 7. Duty Cycle Measurement. Figure 8. Output Enable Timing.
PI-2048-033001
DRAIN
VOLTAGE
HV
0 V
90%
10%
90%
t2
t1
D = t1
t2
Figure 6. General Test Circuit.
Figure 9. Peak Negative Pulsed DRAIN Current Waveform.
PI-3707-112503
FB
tP
tEN
DCMAX
tP = 1
fOSC
VDRAIN
(internal signal)
PI-4021-101305
S
S
S
S
BP/M
FB
D
PI-6067-072110
470 Ω
5 W
S1
50 V
0-2 V
0.1 µF
Rev. B 05/11
11
LNK584-586
www.powerint.com
Typical Performance Characteristics
1.1
1.0
0.9
-50 -25 0255075 100 125 150
Junction Temperature (°C)
Breakdown Voltage
(Normalized to 25 °C)
PI-2213-012301
1.2
1.0
0.8
0.6
0.4
0.2
0
-50 -25 0 25 50 75 100 125
Junction Temperature (°C)
PI-6065-071910
Output Frequency
(Normalized to 25 °C)
1.4
1.0
1.2
0.8
0.6
0.4
0.2
0
-50 0 50 100 150
Temperature (°C)
PI-6066-071910
Current Limit
(Normalized to 25 °C)
1.1
1.0
0.9
-50 -25 0255075 100 125 150
Temperature (°C)
FEEDBACK Pin Voltage
(Normalized to 25 °C)
PI-4057-071905
6
5
4
3
2
1
0
0 0.2 0.4 0.6 0.8 1.0
Time (ms)
PI-2240-012301
BYPASS Pin Voltage (V)
7
100
150
175
200
125
0
0 4286101214161820
DRAIN Voltage (V)
DRAIN Current (mA)
PI-3927-083104
25
75
50
Figure 10. Breakdown vs. Temperature.
Figure 12. Current Limit vs. Temperature.
Figure 14. BYPASS Pin Start-up Waveform (CBP = 0.22 mF).
Figure 11. Frequency vs. Temperature.
Figure 13. FEEDBACK Pin Voltage vs. Temperature.
Figure 15. Output Characteristics.
Rev. B 05/11
12
LNK584-586
www.powerint.com
Drain Voltage (V)
Drain Capacitance (pF)
PI-3928-083104
0 100 200 300 400 500 600
1
10
100
1000
Typical Performance Characteristics (cont.)
Figure 16. CDSS vs. Drain Voltage.
Figure 19. FEEDBACK Pin Input Characteristics During Output
Power Limiting (1.70 V to 0.9 V).
Figure 17. Frequency Reduction vs. Duty Cycle (Line Voltage).
Figure 18. FEEDBACK Pin Input Characteristics.
Figure 20. Frequency Cut Back During Output Power Limiting.
110
100
90
80
70
60
0 10 20 30 40 50 60 70
Duty Cycle (%)
PI-6068-071910
Frequency (kHz)
50
40
30
20
0
10
-10
-20
-30
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0
FEEDBACK Pin Voltage (V)
PI-6070-072110
FEEDBACK Pin Current (µA)
0
-4
-2
-6
-8
-10
-12
-14
-16
-18
-20
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8
FEEDBACK Pin Voltage (V)
PI-6071-072110
FEEDBACK Pin Current (µA)
0
-3
-2
-1
-4
-5
-6
-7
-8
-9
-10
-11
-12
-13
-14
-15
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Frequency Normalized to 1
PI-6139-091010
FEEDBACK Pin Current (µA)
Auto-Restart
Figure 21. Typical Drain Current vs. Temperature in
Power-Down Mode.
10
9
8
7
6
5
4
3
2
1
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
PI-6111-081810
Drain Current (µA)
Rev. B 05/11
13
LNK584-586
www.powerint.com
PI-4526-040110
D07C
3.90 (0.154) BSC
Notes:
1. JEDEC reference: MS-012.
2. Package outline exclusive of mold flash and metal burr.
3. Package outline inclusive of plating thickness.
4. Datums A and B to be determined at datum plane H.
5. Controlling dimensions are in millimeters. Inch dimensions
are shown in parenthesis. Angles in degrees.
0.20 (0.008) C
2X
14
5
8
26.00 (0.236) BSC
D
4
A
4.90 (0.193) BSC
2
0.10 (0.004) C
2X
D
0.10 (0.004) C 2X
A-B
1.27 (0.050) BSC
7X 0.31 - 0.51 (0.012 - 0.020)
0.25 (0.010) M C A-B D
0.25 (0.010)
0.10 (0.004)
(0.049 - 0.065)
1.25 - 1.65
1.75 (0.069)
1.35 (0.053)
0.10 (0.004) C
7X
C
H
1.27 (0.050)
0.40 (0.016)
GAUGE
PLANE
0 - 8
1.04 (0.041) REF 0.25 (0.010)
BSC
SEATING
PLANE
0.25 (0.010)
0.17 (0.007)
DETAIL A
DETAIL A
C
SEATING PLANE
Pin 1 ID
B
4
4.90 (0.193)
1.27 (0.050) 0.60 (0.024)
2.00 (0.079)
Reference
Solder Pad
Dimensions
SO-8C (D Package)
Rev. B 05/11
14
LNK584-586
www.powerint.com
SMD-8C (G Package)
PI-4015-101507
.004 (.10)
.012 (.30)
.036 (0.91)
.044 (1.12)
.004 (.10)
0 -
° 8
°
.367 (9.32)
.387 (9.83)
.048 (1.22) .009 (.23)
.053 (1.35)
.032 (.81)
.037 (.94)
.125 (3.18)
.145 (3.68)
-D-
Notes:
1. Controlling dimensions are
inches. Millimeter sizes are
shown in parentheses.
2. Dimensions shown do not
include mold flash or other
protrusions. Mold flash or
protrusions shall not exceed
.006 (.15) on any side.
3. Pin locations start with Pin 1,
and continue counter-clock-
wise to Pin 8 when viewed
from the top. Pin 3 is omitted.
4. Minimum metal to metal
spacing at the package body
for the omitted lead location
is .137 inch (3.48 mm).
5. Lead width measured at
package body.
6. D and E are referenced
datums on the package
body.
.057 (1.45)
.068 (1.73)
(NOTE 5)
E S
.100 (2.54) (BSC)
.372 (9.45)
.240 (6.10) .388 (9.86)
.260 (6.60) .010 (.25)
-E-
Pin 1
D S .004 (.10)
⊕
⊕
G08C
.420
.046 .060 .060 .046
.080
Pin 1
.086
.186
.286
Solder Pad Dimensions
.137 (3.48)
MINIMUM
Rev. B 05/11
15
LNK584-586
www.powerint.com
Part Ordering Information
• LinkSwitch Product Family
• AX Series Number
• Package Identier
D Plastic SO-8C
G Plastic SMD-8C
• Package Material
G GREEN: Halogen Free and RoHS Compliant
• Tape & Reel and Other Options
Blank Standard Configurations
TL Tape & Reel, 2.5 k pcs minimum for D package, 1 k pcs minimum for G Package.
LNK 584 D G - TL
Revision Notes Date
A Initial release 10/10
B Added LNK585 and LNK586 05/11
For the latest updates, visit our website: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES
NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by
one or more U.S. and foreign patents, or Power Integrationslly by pending U.S. and foreign patent applications assigned to Power
Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a
license under certain patent rights as set forth at http://www.powerint.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii)
whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant
injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, Qspeed,
EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks
are property of their respective companies. ©2011, Power Integrations, Inc.
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