© Semiconductor Components Industries, LLC, 2011
November, 2011 − Rev. 1
1Publication Order Number:
NCP2993/D
NCP2993
1.3 Watt Audio Power
Amplifier with Selectable
Fast Turn On Time
The NCP2993 is an audio power amplifier designed for portable
communication device applications such as mobile phone
applications. The NCP2993 is capable of delivering 1.3 W of
continuous average power to an 8.0 BTL load from a 5.0 V power
supply, and 1.1 W to a 4.0 BTL load from a 3.6 V power supply.
The NCP2993 provides high quality audio while requiring few
external components and minimal power consumption. It features a
low−power consumption shutdown mode, which is achieved by
driving the SHUTDOWN pin with logic low.
The NCP2993 contains circuitry to prevent from “pop and click”
noise that would otherwise occur during turn−on and turn−off
transitions. It is a zero pop noise device when a single ended or a
differential audio input is used.
For maximum flexibility, the NCP2993 provides an externally
controlled gain (with resistors). In addition, it integrates 2 different
Turn On times (15 ms or 30 ms) adjustable with the TON pin.
Due to its superior PSRR, it can be directly connected to the
battery, saving the use of an LDO.
This device is available in a 9−Pin Flip−Chip CSP package with a
0.4mm pitch (Lead−Free).
Features
•1.3 W to an 8.0 BTL Load from a 5.0 V Power Supply
•Best−in−Class PSRR: up to −88 dB, Direct Connection to the
Battery
•Zero Pop Noise Signature with a Single Ended Audio Input
•Ultra Low Current Shutdown Mode: 10 nA
•2.5 V−5.5 V Operation
•External Gain Configuration Capability
•External Turn−on Time Configuration Capability: 15 ms or 30 ms
•Thermal Overload Protection Circuitry
•This is a Pb−Free Device*
Typical Applications
•Portable Electronic Devices
•PDAs
•Wireless Phones
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
WLCSP9
FC SUFFIX
CASE 499BM
PIN CONNECTIONS
2993 = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G= Pb−Free Package
MARKING
DIAGRAM
A3
B3
C3
A2
B2
C2
A1
B1
C1
INM OUTA INP
VM TON VP
BYPASS OUTB SHUTDOWN
(Top View)
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ORDERING INFORMATION
2993
AYWW
G
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2
Figure 1. Typical Audio Amplifier Application Circuit with Single Ended Input
+
-
+
-
Vp
INM
Vp
Vp8
OUTA
OUTB
R1
20 k
R2
20 k
INP
BYPASS
24 k
1 F
100 nF
VMTON
SHUTDOWN
CONTROL
Cbypass
24 k
1 FCs
SHUTDOWN
Rf
Ri
Ci
AUDIO
INPUT
Connect to Vp or GND
Figure 2. Typical Audio Amplifier Application Circuit with a Differential Input
+
-
+
-
Vp
INM
Vp
Vp8
OUTA
OUTB
R1
20 k
R2
20 k
INP
BYPASS
24 k
1 F
100 nF
VM
TON
SHUTDOWN
CONTROL
Cbypass
24 k
1 FCs
SHUTDOWN
Rf
Ri
Ci
AUDIO
INPUT
Connect to Vp or GND
24 k100 nF
Ri
Ci
Rf
+
−
24 k
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PIN DESCRIPTION
Pin Name Type Description
A1 INM I Negative input of the first amplifier, receives the audio input signal. Connected to the feedback
resistor Rf and to the input resistor Rin.
A2 OUTA O Negative output of the NCP2993. Connected to the load and to the feedback resistor Rf.
A3 INP I Positive input of the first amplifier, receives the common mode voltage.
B1 VM I Analog Ground.
B2 TON ITON pin selects 2 different Turn On times:
TON = GND −> 30 ms
TON = VP −> 15 ms
B3 VP I Positive analog supply of the cell. Range: 2.5 V−5.5 V.
C1 BYPASS I Bypass capacitor pin which provides the common mode voltage (Vp/2).
C2 OUTB O Positive output of the NCP2993. Connected to the load.
C3 SHUTDOWN I The device enters in shutdown mode when a low level is applied on this pin.
MAXIMUM RATINGS (Note 1)
Rating Symbol Value Unit
Supply Voltage Vp6.0 V
Operating Supply Voltage Op Vp 2.5 to 5.5 V −
Input Voltage Vin −0.3 to VCC +0.3 V
Power Dissipation (Note 2) Pd Internally Limited −
Operating Ambient Temperature TA−40 to +85 °C
Max Junction Temperature TJ150 °C
Storage Temperature Range Tstg −65 to +150 °C
Thermal Resistance Junction−to−Air RJA (Note 3) °C/W
ESD Protection Human Body Model (HBM) (Note 4)
Machine Model (MM) (Note 5)
−2000
200
V
Latchup Current @ TA = 85°C (Note 6) −±100 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = +25°C.
2. The thermal shutdown set to 160°C (typical) avoids irreversible damage on the device due to power dissipation.
3. The RJA is highly dependent of the PCB Heatsink area. For example, RJA can equal 195°C/W with 50 mm2 total area and also 135°C/W with
500 mm2. The bumps have the same thermal resistance and all need to be connected to optimize the power dissipation.
4. Human Body Model, 100 pF discharge through a 1.5 k resistor following specification JESD22/A114.
5. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.
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ELECTRICAL CHARACTERISTICS Limits apply for TA between −40°C to +85°C (Unless otherwise noted).
Characteristic Symbol Conditions
Min
(Note 6) Typ
Max
(Note 6) Unit
Supply Quiescent Current Idd Vp = 2.5 V, No Load
Vp = 5.0 V, No Load
−
−
1.8
1.95
3.5 mA
Vp = 2.5 V, 8
Vp = 5.0 V, 8
−
−
1.8
1.95
3.5
Common Mode Voltage Vcm − − Vp/2 −V
Shutdown Current ISD −0.02 0.5 A
Shutdown Pull−Down RSD −300 −k
Shutdown Voltage High VSDIH −1.2 − − V
Shutdown Voltage Low VSDIL − − − 0.4 V
Turn On Time (Note 8) TWU TON = GND
TON = VP
−30
15
−ms
Turn Off Time TOFF − − 1.0 −s
Output Impedance in Shutdown Mode ZSD − − 8.5 −k
Output Swing Vloadpeak Vp = 2.5 V, RL = 8.0
Vp = 5.0 V, RL = 8.0 (Note 7)
TA = +25°C
1.9
3.8
2.3
4.6
−
−
V
RMS Output Power POVp = 2.5 V, RL = 4.0
THD + N < 1%
Vp = 2.5 V, RL = 8.0
THD + N < 1%
Vp = 5.0 V, RL = 8.0
THD + N < 1%
−
−
0.5
0.32
1.3
−
−
W
Maximum Power Dissipation (Note 8) PDmax Vp = 5.0 V, RL = 8.0 − − 0.65 W
Output Offset Voltage VOS Vp = 2.5 V
Vp = 5.0 V
−1.0 −mV
Signal−to−Noise Ratio SNR Vp = 2.5 V, G = 2.0
20 Hz < F < 20 kHz
−91 −dB
Positive Supply Rejection Ratio PSRR V+ G = 2.0, RL = 8.0
Cby = 1.0 F
Input Grounded
F = 217 Hz
Vp = 5.0 V
Vp = 4.2 V
Vp = 3.0 V
F = 1.0 kHz
Vp = 5.0 V
Vp = 4.2 V
Vp = 3.0 V
−
−
−
−
−
−
−88
−88
−88
−88
−88
−88
−
−
−
−
−
−
dB
Efficiency Vp = 2.5 V, Porms = 320 mW
Vp = 5.0 V, Porms = 1.0 W
−
−
70
60
−
−
%
Thermal Shutdown Temperature Tsd −160 −°C
Total Harmonic Distortion THD Vp = 2.5 V, F = 1.0 kHz
RL = 4.0 AV = 2.0
PO = 0.32 W
Vp = 5.0 V, F = 1.0 kHz
RL = 8.0 AV = 2.0
PO = 1.0 W
−
−
−
−
−
−
−
0.015
−
−
0.01
−
−
−
−
−
−
−
%
6. Min/Max limits are guaranteed by design, test or statistical analysis.
7. This parameter is guaranteed but not tested in production in case of a 5.0 V power supply.
8. See page 10 for a theoretical approach of this parameter.
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TYPICAL CHARACTERISTICS
Figure 3. THD+N vs. Frequency,
Single−Ended Input
Figure 4. THD+N vs. Frequency,
Single−Ended Input
FREQUENCY (Hz)
100,0001,00010
0.001
0.01
1
Figure 5. THD+N vs. Frequency,
Single−Ended Input
Figure 6. THD+N vs. Frequency,
Single−Ended Input
Figure 7. THD+N vs. Frequency,
Single−Ended Input
Figure 8. THD+N vs. Frequency,
Single−Ended Input
THD+N (%)
THD+N
VP = 2.5 V
Pout = 100 mW
RL = 8
FREQUENCY (Hz)
THD+N (%)
THD+N
VP = 3 V
Pout = 250 mW
RL = 8
FREQUENCY (Hz)
THD+N (%)
FREQUENCY (Hz)
THD+N (%)
THD+N
VP = 2.5 V
Pout = 100 mW
RL = 4
FREQUENCY (Hz)
THD+N (%)
THD+N
VP = 3 V
Pout = 250 mW
RL = 4
FREQUENCY (Hz)
THD+N (%)
THD+N
VP = 5 V
Pout = 500 mW
RL = 4
THD+N
VP = 5 V
Pout = 250 mW
RL = 8
100 10,000
0.1
100,00
0
1,00010
0.001
0.01
1
100 10,000
0.1
100,0001,00010
0.001
0.01
1
100 10,000
0.1
100,00
0
1,00010
0.001
0.01
1
100 10,000
0.1
100,0001,00010
0.001
0.01
1
100 10,000
0.1
100,00
0
1,00010
0.001
0.01
1
100 10,000
0.1
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TYPICAL CHARACTERISTICS
Figure 9. THD+N vs. Frequency,
Differential Input
Figure 10. THD+N vs. Frequency,
Differential Input
FREQUENCY (Hz)
Figure 11. THD+N vs. Frequency,
Differential Input
Figure 12. THD+N vs. Frequency,
Differential Input
Figure 13. THD+N vs. Frequency,
Differential Input
Figure 14. THD+N vs. Frequency,
Differential Input
THD+N (%)
THD+N
VP = 2.5 V
Pout = 100 mW
RL = 8
THD+N (%)
FREQUENCY (Hz)
THD+N (%)
THD+N
VP = 5 V
Pout = 500 mW
RL = 8
FREQUENCY (Hz)
THD+N (%)
THD+N
VP = 2.5 V
Pout = 100 mW
RL = 4
FREQUENCY (Hz)
THD+N (%)
THD+N
VP = 3 V
Pout = 250 mW
RL = 4
FREQUENCY (Hz)
THD+N (%)
THD+N
VP = 5 V
Pout = 500 mW
RL = 4
THD+N
VP = 3 V
Pout = 250 mW
RL = 8
100,0001,00010
0.001
0.01
1
100 10,000
0.1
100,00
0
1,00010
0.001
0.01
1
100 10,000
0.1
FREQUENCY (Hz)
100,0001,00010
0.001
0.01
1
100 10,000
0.1
100,00
0
1,00010
0.001
0.01
1
100 10,000
0.1
100,0001,00010
0.001
0.01
1
100 10,000
0.1
100,00
0
1,00010
0.001
0.01
1
100 10,000
0.1
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TYPICAL CHARACTERISTICS
Figure 15. THD+N vs. Pout
Pout (mW)
12004000
0.001
0.1
10
Figure 16. THD+N vs. Pout
Figure 17. PSRR vs. Frequency Figure 18. PSRR vs. Frequency
THD (%)
Pout (mW)
0.1
THD (%)
THD+N
RL = 8
Differential Input
FREQUENCY (Hz)
PSRR (dB)
1
10
0.01
Vp = 2.5 V
2.7 V
3.0 V
4.2 V
3.6 V 5.0 V 5.5 V
1
800 1600 1800
Vp = 2.5 V 4.2 V
3.0 V
2.7 V
3.6 V 5.0 V 5.5 V
FREQUENCY (Hz)
10000010010
−120
−80
0
PSRR (dB)
PSRR
VP = 3 V
G = 2
Input Shorted to GND
Differential Configuration
−100
−60
−40
−20
1000 10000
−100
−90
−80
−70
−60
−50
10 100 1000 10000 100000
PSRR
VP = 3 V
G = 2
Input Shorted
to GND
THD+N
RL = 8
Single−Ended Input
1000200 600 1400
0.01
12004000 800 1600 18001000200 600 1400
−40
−30
−20
−10
0
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TYPICAL CHARACTERISTICS
Figure 19. PSRR vs. Frequency Figure 20. PSRR vs. Frequency
Figure 21. PSRR vs. Frequency Figure 22. PSRR vs. Frequency
Figure 23. Power Dissipation vs. Pout
Pout (mW)
180
0
600400 10008002000
0
100
300
400
500
600
700
900
Pdsp (mW)
FREQUENCY (Hz)
PSRR (dB)
FREQUENCY (Hz)
PSRR (dB)
PSRR
VP = 4.2 V
G = 2
Input Shorted to GND
Differential Configuration
FREQUENCY (Hz)
PSRR (dB)
FREQUENCY (Hz)
PSRR (dB)
PSRR
VP = 5 V
G = 2
Input Shorted to GND
Differential Configuration
1600
200
1200 1400
RL = 8
Vp = 2.5 V 2.7 V
3.0 V
4.2 V
3.6 V
5.0 V
5.5 V
PSRR
VP = 4.2 V
G = 2
Input Shorted
to GND
PSRR
VP = 5 V
G = 2
Input Shorted
to GND
−100
−90
−80
−70
−60
−50
10 100 1000 10000 100000
−40
−30
−20
−10
0
−100
−90
−80
−70
−60
−50
10 100 1000 10000 10000
0
−40
−30
−20
−10
0
−100
−90
−80
−70
−60
−50
10 100 1000 10000 100000
−40
−30
−20
−10
0
−100
−90
−80
−70
−60
−50
10 100 1000 10000 10000
0
−40
−30
−20
−10
0
800
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0
200
400
600
800
1000
1200
1400
1600
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Figure 24. Maximum Output Power vs. VP
VP (V)
MAXIMUM OUTPUT POWER (mW)
THD+N < 1%
RL = 8
1800
2000
Figure 25. SNR vs. Frequency
FREQUENCY (Hz)
SNR (dB)
SNR
Pout = 125 mW
RL = 8
0
10
20
30
40
50
10 100 1000 10000 100000
60
70
80
90
100
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APPLICATION INFORMATION
Detailed Description
The NCP2993 audio amplifier can operate under 2.5 V
until 5.5 V power supply. With less than 1% THD + N, it
can deliver up to 1.35 W RMS output power to an 8.0
load (VP = 5.0 V). If application allows to reach 10%
THD + N, then 1.65 W can be provided using a 5.0 V
power supply.
The structure of the NCP2993 is basically composed of
two identical internal power amplifiers; the first one is
externally configurable with gain−setting resistors Rin and
Rf (the closed−loop gain is fixed by the ratios of these
resistors) and the second is internally fixed in an inverting
unity−gain configuration by two resistors of 20 k. So the
load is driven differentially through OUTA and OUTB
outputs. This configuration eliminates the need for an
output coupling capacitor.
Internal Power Amplifier
The output PMOS and NMOS transistors of the amplifier
were designed to deliver the output power of the
specifications without clipping. The channel resistance
(Ron) of the NMOS and PMOS transistors does not exceed
0.6 when they drive current.
The structure of the internal power amplifier is
composed of three symmetrical gain stages, first and
medium gain stages are transconductance gain stages to
obtain maximum bandwidth and DC gain.
Turn−On and Turn−Off Transitions
When a shutdown low level is applied, the output level
is tied to Ground on each output after 10 s.
With TON = GND, turn on time is set to 30 ms. With TON
= VP
, turn on time is set to 15 ms. To avoid any pop and click
noises, Rin * Cin < 2.4 ms with TON = GND and Rin * Cin
< 1.2 ms with TON = Vp. The electrical characteristics are
identical with the 2 configurations. This fast turn on time
added to a very low shutdown current saves battery life and
brings flexibility when designing the audio section of the
final application.
NCP2993 is a zero pop noise device when using a
single−ended or differential audio input configuration.
Shutdown Function
The device enters shutdown mode when shutdown signal
is low. During the shutdown mode, the DC quiescent
current of the circuit does not exceed 100 nA. In this
configuration, the output impedance is 8.5 k on each
output.
Current Limit Circuit
The maximum output power of the circuit (Porms =
1.0 W, VP = 5.0 V, RL = 8.0 ) requires a peak current in
the load of 500 mA.
In order to limit the excessive power dissipation in the
load when a short−circuit occurs, the current limit in the
load is fixed to 1.1 A. The current in the four output MOS
transistors are real−time controlled, and when one current
exceeds 1.1 A, the gate voltage of the MOS transistor is
clipped and no more current can be delivered.
Thermal Overload Protection
Internal amplifiers are switched off when the
temperature exceeds 160°C, and will be switched on again
only when the temperature decreases fewer than 140°C.
The NCP2993 is unity−gain stable and requires no
external components besides gain−setting resistors, an
input coupling capacitor and a proper bypassing capacitor
in the typical application.
The first amplifier is externally configurable (Rf and
Rin), while the second is fixed in an inverting unity gain
configuration.
The differential−ended amplifier presents two major
advantages:
−The possible output power is four times larger (the
output swing is doubled) as compared to a single−ended
amplifier under the same conditions.
−Output pins (OUTA and OUTB) are biased at the same
potential VP/2, this eliminates the need for an output
coupling capacitor required with a single−ended
amplifier configuration.
The differential closed loop−gain of the amplifier is
given by Avd +2* Rf
Rin
+Vorms
Vinrms .
Output power delivered to the load is given by
Porms +(Vopeak)2
2*R
L (Vopeak is the peak differential output
voltage).
When choosing gain configuration to obtain the desired
output power, check that the amplifier is not current limited
or clipped.
The maximum current which can be delivered to the load
is 500 mA Iopeak +
Vopeak
RL.
Gain−Setting Resistor Selection (Rin and Rf)
Rin and Rf set the closed−loop gain of the amplifier.
In order to optimize device and system performance, the
NCP2993 should be used in low gain configurations.
The low gain configuration minimizes THD + noise
values and maximizes the signal to noise ratio, and the
amplifier can still be used without running into the
bandwidth limitations.
A closed loop gain in the range from 2 to 5 is
recommended to optimize overall system performance.
An input resistor (Rin) value of 24 k is realistic in most
of applications, and doesn’t require the use of a too large
capacitor Cin.
Input Capacitor Selection (Cin)
The input coupling capacitor blocks the DC voltage at
the amplifier input terminal. This capacitor creates a
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11
high−pass filter with Rin, the cut−off frequency is given by
fc +1
2**R
in *C
in .
The size of the capacitor must be large enough to couple
in low frequencies without severe attenuation.
IEC 61000-4-2 Level 4
In some particular applications, NCP2993 may need
extra ESD protection to pass IEC 61000-4-2 Level 4
qualification.
Depending on the test, user can consider different level
of protection:
−up to 22 pF capacitor connected between each amplifier
output terminals and ground.
−Dedicated IEC filters such as ESD7.0 series from
ON Semiconductor.
In any case, the protection should be placed as close as
possible to the ESD stress entry point. Proper and carefull
layout is a key factor to ensure optimum protection level is
achieved. Designer should make sure the connection
impedance between protection and ground / protection and
NCP2993 is as low as possible.
ORDERING INFORMATION
Device Package Shipping†
NCP2993FCT2G 9−Pin Flip−Chip
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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PACKAGE DIMENSIONS
WLCSP9 1.22x1.22
CASE 499BM−01
ISSUE O
SEATING
PLANE
0.05 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
2X DIM
A
MIN MAX
−−−
MILLIMETERS
A1
D1.22 BSC
E
b0.24 0.29
e0.40 BSC
0.66
ÈÈ
D
E
AB
PIN A1
REFERENCE
A0.05 BC
0.03 C
0.05 C
9X b
12 3
C
B
A
0.05 C
A
A1
A2
C
0.17 0.24
1.22 BSC
0.40
0.25
9X
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.05 C
2X TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 3
e
A2 0.40 REF
RECOMMENDED
A1 PACKAGE
OUTLINE
e
PITCH
0.40
PITCH
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
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NCP2993/D
PUBLICATION ORDERING INFORMATION
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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