Features
• Data rates to 250 kb/s NRZ
• LSTTL compatible
• High common mode transient immunity:
> 1000 V/µs
• High density packaging
• Open collection outputs
• Guaranteed performance from temperature:
0°C to 70°C
• Safety approval
- UL Recognized - 3750Vrms for 1min (5000Vrms for
1 min Option 020 devices) per UL1577.
- IEC/EN/DIN EN 60747-5-2 Approved
- VIORM = 630 Vpeak for option 060
Applications
• High speed logic ground isolation
– LSTTL-to-LSTTL and TTL-to-LSTTL
• High voltage isolation
• Analog signal ground isolation
Schematic
HCPL-2533
Dual Channel, High Speed Logic Interface Optocoupler
Data Sheet
Description
The HCPL-2533 is a dual channel optocoupler which is
specied for use in LSTTL-to-LSTTL and TTL-to-LSTTL
logic interfaces. A nominal 8 mA LSTTL sink current
through the input LED will provide enough output
current for proper operation of 1 LSTTL gate under
worst-case conditions when used in the recommended
circuits. The CTR of the HCPL-2533 is 15% minimum at
IF = 8 mA.
The HCPL-2533 contains a pair of light emitting diodes
and integrated photon detectors with a 3000 Vdc
withstand test between input and output. Separate
connection for the photodiode bias and output tran-
sistor collector reduce the base-collector capacitance,
giving improved speed compared with conventional
phototransistor couplers.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
I
F1
SHIELD
8
7
V
CC
+
2
V
O1
I
CC
V
F1
I
O1
1
-
I
F2
6
5
GND
-
4
V
O2
V
F2
I
O2
3
+
USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED
BETWEEN PINS 5 AND 8 IS RECOMMENDED.
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
2
Absolute Maximum Ratings
Storage Temperature ......................................................................................................................................................... –55°C to +125°C
Operating Temperature ................................................................................................................................................... –55°C to +100°C
Lead Solder Temperature (1.6 mm below seating plane) ..........................................................................................260°C for 10 s
Average Input Current – IF (each channel) ..................................................................................................................................25 mA[1]
Peak Input Current – IF (each channel) (50% duty cycle, 1 ms pulse width) ..................................................................50 mA[2]
Peak Transient Input Current – IF (each channel) (≤1 µs pulse width, 300 pps) ................................................................... 1.0 A
Reverse Input Voltage – VR (each channel) ............................................................................................................................................5 V
Input Power Dissipation (each channel) .....................................................................................................................................45 mW[3]
Average Output Current – IO (each channel) ....................................................................................................................................8 mA
Peak Output Current – IO (each channel) ........................................................................................................................................ 16 mA
Supply and Output Voltage – VCC (Pin 8-5), VO (Pin 7, 6-5) .............................................................................................–0.5 V to 7 V
Output Power Dissipation (each channel) .................................................................................................................................35 mW[4]
Notes:
1. Derate linearly above +70˚C free-air temperature at a rate of 0.8 mA/˚C.
2. Derate linearly above +70˚C free-air temperature at a rate of 1.6 mA/˚C.
3. Derate linearly above +70˚C free-air temperature at a rate of 0.9 mW/˚C.
4. Derate linearly above +70˚C free-air temperature at a rate of 1.0 mW/˚C.
Ordering Information
HCPL-2533 is UL Recognized with 3750 Vrms and 5000 Vrms (Option 020) for 1 minute per UL1577 and are approved
under CSA Component Acceptance Notice #5, File CA 88324.
Part
number
Option
Package
Surface
Mount
Gull
Wing
Tape
& Reel
UL 5000 Vrms/
1 Minute rating
IEC/EN/DIN
EN 60747-5-2 Quantity
RoHS
Compliant
Non RoHS
Compliant
HCPL-2533
-000E No option
300mil
DIP-8
50 per tube
-300E -300 X X 50 per tube
-500E -500 X X X 1000 per reel
-020E -020 X 50 per tube
-320E -320 X X X 50 per tube
-520E -520 X X X X 1000 per reel
-060E -060 X 50 per tube
-360E -360 X X X 50 per tube
-560E -560 X X X X 1000 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-2533-500E to order product of 300mil DIP Gull Wing Surface Mount package in Tape and Reel packag-
ing with RoHS compliant.
Example 2:
HCPL-2533 to order product of 300mil DIP package in tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July 2001 and
RoHS compliant option will use ‘-XXXE‘.
3
Regulatory Information
The devices contained in this data sheet have been approved by the following organizations:
Solder Reow Thermal Prole
Recommended Pb-Free IR Prole
IEC/EN/DIN EN 60747-5-2
Approved under:
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01.
(Option 060 only)
UL
Recognized under UL 1577, Component Recognition
Program, File E55361.
CSA
Approved under CSA Component Acceptance Notice
#5, File CA 88324.
217
°
C
RAMP-DOWN
6
°
C/SEC. MAX.
RAMP-UP
3
°
C/SEC. MAX.
150 - 200
°
C
260 +0/-5
°
C
t 25
°
C to PEAK
60 to 150 SEC.
20-40 SEC.
TIME WITHIN 5
°
C of ACTUAL
PEAK TEMPERATURE
t
p
t
s
PREHEAT
60 to 180 SEC.
t
L
T
L
T
smax
T
smin
25
T
p
TIME
TEMPERATURE
NOTES:
THE TIME FROM 25
°
C to PEAK TEMPERATURE = 8 MINUTES MAX.
T
smax
= 200
°
C, T
smin
= 150
°
C
Note: Non-halide flux should be used.
0
TIME (SECONDS)
TEMPERATURE (
°
C)
200
100
50 150100 200 250
300
0
30
SEC.
50 SEC.
30
SEC.
160
°
C
140
°
C
150
°
C
PEAK
TEMP.
245
°
C
PEAK
TEMP.
240
°
C
PEAK
TEMP.
230
°
C
SOLDERING
TIME
200
°
C
PREHEATING TIME
150
°
C, 90 + 30 SEC.
2.5
°
C ± 0.5
°
C/SEC.
3
°
C + 1
°
C/- 0.5
°
C
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
PREHEATING RATE 3
°
C + 1
°
C/- 0.5
°
C/SEC.
REFLOW HEATING RATE 2.5
°
C ± 0.5
°
C/SEC.
Note: Non-halide flux should be used.
4
Insulation and Safety Related Specications
8-Pin DIP
(300 Mil) SO-8
Parameter Symbol Value Value Units Conditions
Minimum External L(101) 7.1 4.9 mm Measured from input terminals to output to
Air Gap (External to output terminals, shortest distance through
Clearance) air.
Minimum External L(102) 7.4 4.8 mm Measured from input terminals to output
Tracking (External terminals, shortest distance path along body.
Creepage)
Minimum Internal 0.08 0.08 mm Through insulation distance, conductor to
Plastic Gap conductor, usually the direct distance
(Internal Clearance) between the photoemitter and photodetector
inside the optocoupler cavity.
Minimum Internal NA NA mm Measured from input terminals to output
Tracking (Internal terminals, along internal cavity.
Creepage)
Tracking Resistance CTI 200 200 Volts DIN IEC 112/VDE 0303 Part 1
(Comparative
Tracking Index)
Isolation Group IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
Option 300 - surface mount classication is Class A in accordance with CECC 00802.
5
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics (Option 060)
Characteristic
Description Symbol HCPL-2533 Unit
Installation classication per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 150 V rms
for rated mains voltage ≤ 300 V rms I-IV
for rated mains voltage ≤ 600 V rms I-III
Climatic Classication 55/100/21
Pollution Degree (DIN VDE 0110/1.89) 2
Maximum Working Insulation Voltage VIORM 630 Vpeak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test VPR 1181 Vpeak
with tm = 1 sec, Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and Sample Test, VPR 945 Vpeak
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage VIOTM 6000 Vpeak
(Transient Overvoltage, tini = 10 sec)
Safety Limiting Values
(Maximum values allowed in the event of a failure.)
Case Temperature TS 175 °C
Input Current** IS,INPUT 230 mA
Output Power** PS,OUTPUT 600 mW
Insulation Resistance at TS, VIO = 500 V RS > 109 Ω
* Refer to the optocoupler section of the Isolation and Control Components Designer's Catalog, under Product Safety Regulations section,
IEC/EN/DIN EN 60747-5-2, for a detailed description of Method a and Method b partial discharge test proles.
** Refer to the following gure for dependence of PS and IS on ambient temperature.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits in application.
OUTPUT POWER – PS, INPUT CURRENT – IS
0
0
TS – CASE TEMPERATURE – °C
200
700
400
25
800
50 75 100
200
150 175
PS (mW)
IS (mA)
125
100
300
600
500
6
Switching Specications at TA = 25°C
VCC = 5 V, IF = 8 mA, RL = 7.5 kΩ unless otherwise specied.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay tPHL 0.8 1.5 µs 4,6 10
Time to Logic Low
at Output
Propagation Delay tPLH 1.0 2.5 µs 4,6 10
Time to Logic High
at Output
Common Mode CMH 1000 V/µs IF = 0 mA, VCM = 10 VP–P 7 9,10
Transient Immunity at
Logic High Level
Output
Common Mode CML –1000 V/µs VCM = 10 VP–P 7 9,10
Transient Immunity at
Logic Low Level Output
*All typicals at 25°C.
Electrical Specications, LSTTL-to-LSTTL
Over recommended temperature (TA = 0˚C to +70˚C) unless otherwise specied.
Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note
Current Transfer Ratio CTR 15 22 % IF = 8 mA, VO = 0.5 V, 1 5,6
VCC = 4.5 V, TA = 25°
11 15 % IF = 8 mA, VO = 0.5 V,
VCC = 4.5 V
Logic Low Output VOL 0.2 0.5 V IF = 8 mA, IO = 0.7 mA, 5
Voltage VCC = 4.5 V
Logic Low Supply ICCL 40 µA IF1 = IF2 = 8 mA
Current V01 = V02 = Open,
VCC = 5.5 V
Input Forward VF 1.5 1.7 V IF = 8 mA, TA = 25°C 2 5
Voltage
Temperature ∆VF –1.6 mV/˚C IF = 8 mA 5
Coecient of Forward ∆TA
Voltage
7
Switching Specications at TA = 25°C
VCC = 5 V, IF = 16 mA, RL = 4.7 kΩ unless otherwise specied.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay tPHL 0.3 1.5 µs 4,6 11
Time to Logic Low
at Output
Propagation Delay tPLH 1.1 2.5 µs 4,6 11
Time to Logic High
at Output
Common Mode CMH 1000 V/µs IF = 0 mA, VCM = 10 VP–P 7 9,11
Transient Immunity at
Logic High Level
Output
Common Mode CML –1000 V/µs VCM = 10 VP–P 7 9,11
Transient Immunity at
Logic Low Level Output
*All typicals at 25˚C.
Electrical Specications, TTL-to-LSTTL
Over recommended temperature (TA = 0˚C to +70˚C) unless otherwise specied.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Current Transfer Ratio CTR 12 18 % IF = 16 mA, VO = 0.5 V, 1 5,6
VCC = 4.5 V, TA = 25°C
9 13 % IF = 16 mA, VO = 0.5 V,
VCC = 4.5 V
Logic Low Output VOL 0.2 0.5 V IF = 16 mA, IO = 1.1 mA, 5
Voltage VCC = 4.5 V
Logic Low Supply ICCL 80 µA IF1 = IF2 = 16 mA
Current V01 = V02 = Open,
VCC = 5.5 V
Input Forward VF 1.5 1.7 V IF = 16 mA, TA = 25°C 2 5
Voltage
Temperature ∆VF –1.6 mV/˚C IF = 16 mA 5
Coecient of Forward ∆TA
Voltage
8
Electrical Specications
Over recommended temperature (TA = 0°C to +70°C) unless otherwise specied.
Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note
Logic High IOH 0.5 nA TA = 25°C, 5 5
Output Current IF1 = IF2 = 0 mA
VO1 = VO2 = VCC = 5.5 V
50 µA IF1 = IF2 = mA 5
VO1 = VO2 = VCC = 5.5 V
Logic High ICCH 0.05 4 µA IF1 = IF2 = 0 mA
Supply Current VO1 = VO2 = Open,
VCC = 5.5 V
Input Reverse VR 5 V IF = 10 µA, TA = 25°C 5
Breakdown Voltage
Input Capacitance CIN 60 pF f = 1 MHz, VF = 0 V 5
Input-Output II–O 1.0 µA 45% Relative Humidity, 7
Insulation Leakage t = 5s
Current VI–O = 3000 Vdc,
TA = 25°C
Resistance RI–O 1012 Ω VI–O = 500 Vdc 7
(Input–Output)
Capacitance CI–O 0.6 pF f = 1 MHz 7
(Input–Output)
Input–Input II–I 0.005 µA 45% Relative Humidity, 8
Insulation Leakage t = 5s
Current VI–I = 500 Vdc
Resistance RI–I 1011 Ω VI–I = 500 Vdc 8
(Input–Input)
Capacitance CI–I 0.25 pF f = 1 MHz 8
(Input–Input)
*All typicals at 25°C.
Notes:
5. Each channel.
6. Current Transfer Ratio is dened as the ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
7. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
8. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
9. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common mode
pulse VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in Logic Low level is
the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain
in a Logic Low state (i.e., VO < 0.8 V).
10. The 7.5 k load represents 1 LSTTL unit load of 0.36 mA and a 20 kΩ pull-up resistor.
11. The 4.7 k load represents 1 LSTTL unit load of 0.36 mA and an 8.2 kΩ pull-up resistor.
9
Figure 2. Input current vs. forward voltageFigure 1. Current transfer ratio vs. input current Figure 3. Current transfer ratio vs. temperature
Figure 5. Logic high output current vs. temperatureFigure 4. Propagation delay vs. temperature
Figure 6. Switching test circuit
HCPL-2533 fig 1
1.4
1.2
0.8
0.6
0.2
00 8
NORMALIZED CURRENT TRANSFER RATIO
I
F
– INPUT CURRENT – mA
4 12 16 20 24
V
O
= 0.5 V
V
CC
= 5.0 V
T
A
= 25°C
NORMALIZED TO
I
F
= 8 mA
I
F
= 16 mA
1.0
0.4
HCPL-2533 fig 2
VF – FORWARD VOLTAGE – VOLTS
100
10
0.1
0.01
1.10 1.20 1.30 1.40
IF – FORWARD CURRENT – mA
1.50
1.0
0.001
1000
IF
VF
+TA = 25°C
–
HCPL-2533 fig 3
1.2
0.8
0.6
0.2
0
-60 -20
NORMALIZED CURRENT TRANSFER RATIO
T
A
– TEMPERATURE – °C
-40 20 40 80 100
V
O
= 0.5 V
V
CC
= 5.0 V
1.0
0.4
I
F
= 8 mA
I
F
= 16 mA
NORMALIZED TO T
A
= 25°C
0 60
HCPL-2533 fig 5
10
10 30
I
OH
– OUTPUT CURRENT – nA
T
A
– TEMPERATURE – °C
10 50 70 100 110
100
40 8020 60 90
HCPL-2533 fig 6
V
O
HP 8007
PULSE
GEN.
Z
O
= 50 Ω
t
r
= 5 ns
I
F
MONITOR
I
F
R
L
C
L
= 15 pF
100 Ω
0
t
PHL
t
PLH
V
O
I
F
V
OL
1.3 V 1.3 V
5 V
+5 V
10% DUTY CYCLE
1/f 500 µs
81
72
63
54
Figure 7. Test circuit for transient immunity and typical waveforms
Figure 8. Recommended circuits
Recommended Operation
The HCPL-2533 optocoupler is specied for use in LSTTL-
to-LSTTL and TTL-to-LSTTL interfaces. The recommended
circuits show the interface design and give suggested
component values. The input current IF is given as both
a nominal value and a range. The range in IF results
from the tolerances in VCC and the input resistor RIN.
The CTR of the optocoupler is given as the minimum
HCPL-2533 fig 7
VO
IF
RL
A
HP 8007
PULSE GEN.
VCM
+
VFF
VO
VOL
VO
0 V 10%
90% 10%
90%
SWITCH AT A: I = 0 mA
F
SWITCH AT B: I = 16 mA
F
VCM
trtf
5 V
+5 V
–
10 V tr, tf = 8 ns
B
81
72
63
54
HCPL-2533 fig 8
I
O
R
IN
R
L
V
CC2
V
CC1
I
F
HCPL-2533
7404
74LS04
7405
74LS05
74LS04
74LS05
A
A) TYPICAL NON-INVERTING CIRCUIT
R
IN
V
CC1
HCPL-2533 74LS04
74LS05
B) TYPICAL INVERTING CIRCUIT
(SEE NOTE 12)
81
72
63
54
R
IN
B
R
L
81
72
63
54
I
O
R
L
V
CC2
B
R
L
AI
F
7405
74LS05
R
IN
initial value over temperature, taken directly from the
Electrical Specications. The value given for IOL (min) is
based on the minimum CTR and the minimum IF using
worst case values for RL and VCC. The resulting IOL (min)
has ample design margin, allowing more than 20% for
CTR degradation even under these worst case condi-
tions. For additional information on CTR degradation
see Application Note 1002.
Recommended Circuit Design Parameters
LSTTL-to- TTL-to-
Parameter Symbol LSTTL LSTTL Units Comments Fig. Note
Input
Logic Low Output VOL (A) 0.5 0.4 V Maximum
Voltage – Input Gate
Supply Voltage – Input VCC1 5.0 5.0 V ± 5%
Input Resistor RIN 360 180 Ω ± 5% 8a
430 200 8b
Input Current IF 8 16 mA Nominal
Input Current Range IF 6.75–10 14.0–20 mA 8a
14.5–20 8b
Output
Logic Low Output VOL (B) 0.5 0.5 V Maximum
Voltage – HCPL-2533
Supply Voltage – Input VCC2 5.0 5.0 V ± 5%
Pull-Up Resistor RL 20 8.2 kΩ ± 5% 13
Required Current Sink IOL 0.61 1.0 mA Worst Case VCC, 14
for Logic Low (max) RL, IIL (B)
HCPL-2533 Current CTR 11 9 % Minimum TA = 0°C to
Transfer Ratio +70°C
Logic Low Output IOL 0.74 1.26 mA Worst Case VCC, CTR, IF 8a 15
Current – HCPL-2533 (min) 1.30 TA = 0°C to +70°C 8b
Data Rate fD 250 250 Kb/s NRZ, TA = 25°C 16
Notes:
12. The inverting circuit has higher power consumption and must use open collector gates on the input.
13. The load resistor RL must be large enough to guarantee logic LOW and small enough to guarantee logic HIGH under worst case conditions:
VCC (max) – VOL VCC (min) – VIH (B)
IOL (2533) – IIL (B) IOH (2533) – IIH (B)
The selection of RL is the same for both inverting and non-inverting circuits.
14. The maximum current sink required for logic LOW is:
IOL (max) = IIL (B) (max) + IR (max)
where IR is the current through RL.
15. The ratio of IOL (min) to IOL (max) gives the design margin for CTR degradation. See Application Note 1002.
16. The maximum data rate is dened as:
1
tPHL + tPLH
fD = bits/second NRZ
≤ RL ≤
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Obsoletes 5953-0458
AV02-0521EN - June 19, 2007