IRFPS3810
HEXFET® Power MOSFET
The HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to
achieve extremely low on-resistance per silicon area.
This benefit, combined with the fast switching speed
and ruggedized device design that HEXFET power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use in
a wide variety of applications.
S
D
G
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 170
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 120A
IDM Pulsed Drain Current 670
PD @TC = 25°C Power Dissipation 580 W
Linear Derating Factor 3.8 W/°C
VGS Gate-to-Source Voltage ± 30 V
EAS Single Pulse Avalanche Energy1350 mJ
IAR Avalanche Current100 A
EAR Repetitive Avalanche Energy58 mJ
dv/dt Peak Diode Recovery dv/dt 2.3 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Absolute Maximum Ratings
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.26
RθCS Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W
RθJA Junction-to-Ambient ––– 40
Thermal Resistance
VDSS = 100V
RDS(on) = 0.009 Ω
ID = 170A
Description
04/26/02
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lAdvanced Process Technology
lUltra Low On-Resistance
lDynamic dv/dt Rating
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
Super-247™
PD - 93912B
IRFPS3810
2www.irf.com
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.009 ΩVGS = 10V, ID = 100A
VGS(th) Gate Threshold Voltage 3.0 ––– 5.0 V VDS = 10V, ID = 250µA
gfs Forward Transconductance 52 ––– ––– S VDS = 50V, ID = 100A
––– ––– 25 µA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -30V
QgTotal Gate Charge –– – 260 390 ID = 100A
Qgs Gate-to-Source Charge ––– 49 74 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– 16 0 250 VGS = 10V
td(on) Turn-On Delay Time ––– 24 ––– VDD = 50V
trRise Time ––– 270 –– – ID = 100A
td(off) Turn-Off Delay Time –– – 45 ––– RG = 1.03Ω
tfFall Time ––– 140 ––– VGS = 10V
Between lead,
––– ––– 6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 6790 ––– VGS = 0V
Coss Output Capacitance ––– 2470 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 99 0 ––– ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 10740 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 1180 ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 2210 ––– VGS = 0V, VDS = 0V to 80V
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance ––– –––
S
D
G
IGSS
ns
5.0
13
IDSS Drain-to-Source Leakage Current
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
ISD ≤ 100A, di/dt ≤ 350A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Notes:
Starting TJ = 25°C, L = 0.27mH
RG = 25Ω, IAS = 100A. (See Figure 12)
Pulse width ≤ 400µs; duty cycle ≤ 2%.
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) ––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V T J = 25°C, IS = 100A, VGS = 0V
trr Reverse Recovery Time ––– 220 330 ns TJ = 25°C, IF = 100A
Qrr Reverse RecoveryCharge ––– 1640 2460 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
170
670 A
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 105A.
IRFPS3810
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Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.01
0.1
1
10
100
1000
0.1 1 10 100
50
µ
s PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
5.0V
1
10
100
1000
0.1 1 10 100
50
µ
s PULSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
V , Drain-to-Source Volta
g
e (V)
I , Drain-to-Source Current (A)
DS
D
5.0V
1
10
100
1000
5 6 7 8 9 10 11 12 13
V = 50V
50
µ
s PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
170A
IRFPS3810
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0100 200 300 400
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
100A
V = 20V
DS
V = 50V
DS
V = 80V
DS
110 100
VDS, Drain-to-Source Voltage (V)
0
5000
10000
15000
C, Capacitance(pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = C
gs + Cgd, C
ds SHORTED
Crss
= C
gd
Coss
= C
ds + Cgd
10
100
1000
0.2 0.8 1.4 2.0 2.6
V ,Source-to-Drain Volta
g
e (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 175 C
J°
1 10 100 1000
VDS , Drain-toSource Voltage (V)
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
IRFPS3810
www.irf.com 5
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
VGS
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.001
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150 175
0
40
80
120
160
200
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
IRFPS3810
6www.irf.com
QG
QGS QGD
VG
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 13b. Gate Charge Test CircuitFig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
25 50 75 100 125 150 175
0
500
1000
1500
2000
2500
3000
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
41A
71A
100A
IRFPS3810
www.irf.com 7
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFET® Power MOSFETs
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRFPS3810
8www.irf.com
Super-247™ Package Outline
B
Ø 1.60 [.063]
12
0.25 [.010] B A
3
0.13 [.005]
2.35 [.092]
1.65 [.065]
2.15 [.084]
1.45 [.058]
5.50 [.216]
4.50 [.178]
EE
3X 1.60 [.062]
1.45 [.058]
16.10 [.632]
15.10 [.595]
20.80 [.818]
19.80 [.780]
14.80 [.582]
13.80 [.544] 4.25 [.167]
3.85 [.152]
5.45 [.215]
1.30 [.051]
0.70 [.028]
13.90 [.547]
13.30 [.524]
16.10 [.633]
15.50 [.611] 4
0.25 [.010] BA
4
3.00 [.118]
2.00 [.079] A
2X R
MAX.
SE CTION E -E
2X
1.30 [.051]
1.10 [.044]
3X
1. DIM ENSION ING AND TO LERA N CING PER A SM E Y14.5M -1994.
2. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]
3. CONTROLLING DIMENSION: MILLIMETER
NOTES:
4. OUTLINE CONFORMS TO JEDEC OUTLINE TO-274AA 3 - SOURCE
2 - DRAIN
1 - GATE
4 - DRAIN 3 - EMITTER
4 - COLLECTOR
1 - GATE
2 - COLLECTOR
LEAD AS S IGNMENT S
MOS FET IGBT
C
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.04/02
