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110 100 10k 100k

FREQUENCY (Hz)

100

VOLTAGE NOISE (nV/

Hz)

V+ = 5.5V

V+ = 2.5V

CCM

IIN

VOUT

IIN - RF

CIN = CD + CCM

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LMV79x 17-MHz, Low-Noise, CMOS Input, 1.8-V Operational Amplifiers With Shutdown

1 Features 3 Description

The LMV791 (single) and the LMV792 (dual) low-

1Typical 5-V Supply, Unless Otherwise Noted noise, CMOS input operational amplifiers offer a low

• Input Referred Voltage Noise 5.8 nV/√Hz input voltage noise density of 5.8 nV/√Hz while

• Input Bias Current 100 fA consuming only 1.15 mA (LMV791) of quiescent

current. The LMV791 and LMV792 are unity gain

• Unity Gain Bandwidth 17 MHz stable operational amplifiers and have gain bandwidth

• Supply Current per Channel Enable Mode of 17 MHz. The LMV79x have a supply voltage range

– LMV791 1.15 mA of 1.8 V to 5.5 V and can operate from a single

supply. The LMV79x each feature a rail-to-rail output

– LMV792 1.30 mA stage capable of driving a 600-Ωload and sourcing

• Supply Current per Channel in Shutdown Mode as much as 60 mA of current.

0.02 µA The LMV79x family provides optimal performance in

• Rail-to-Rail Output Swing low-voltage and low-noise systems. A CMOS input

– At 10-kΩLoad, 25 mV from Rail stage, with typical input bias currents in the range of

– At 2-kΩLoad, 45 mV from Rail a few femtoamperes, and an input common-mode

voltage range which includes ground, make the

• Ensured 2.5-V and 5-V Performance LMV791 and the LMV792 ideal for low-power sensor

• Total Harmonic Distortion 0.01% at1 kHz, 600 Ωapplications. The LMV79x family has a built-in enable

• Temperature Range −40°C to 125°C feature which can be used to optimize power

dissipation in low power applications.

2 Applications The LMV791x are manufactured using TI’s advanced

• Photodiode Amplifiers VIP50 process and are offered in a 6-pin SOT and a

10-pin VSSOP package respectively.

• Active Filters and Buffers

• Low-Noise Signal Processing Device Information(1)

• Medical Instrumentation PART NUMBER PACKAGE BODY SIZE (NOM)

• Sensor Interface Applications LMV791 SOT (6) 2.90 mm × 1.60 mm

LMV792 VSSOP (10) 3.00 mm × 3.00 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Photodiode Transimpedance Amplifier Low-Noise CMOS Input

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LMV791

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SNOSAG6G –SEPTEMBER 2005–REVISED OCTOBER 2015

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Table of Contents

7.4 Device Functional Modes........................................ 17

1 Features.................................................................. 18 Application and Implementation ........................ 19

2 Applications ........................................................... 18.1 Application Information............................................ 19

3 Description............................................................. 18.2 Typical Applications ............................................... 19

4 Revision History..................................................... 29 Power Supply Recommendations...................... 24

5 Pin Configuration and Functions......................... 310 Layout................................................................... 24

6 Specifications......................................................... 410.1 Layout Guidelines ................................................. 24

6.1 Absolute Maximum Ratings ...................................... 410.2 Layout Example .................................................... 24

6.2 ESD Ratings.............................................................. 411 Device and Documentation Support................. 25

6.3 Recommended Operating Conditions....................... 411.1 Device Support .................................................... 25

6.4 Thermal Information.................................................. 411.2 Documentation Support ....................................... 25

6.5 2.5-V Electrical Characteristics ................................ 511.3 Related Links ........................................................ 25

6.6 5-V Electrical Characteristics ................................... 611.4 Community Resources.......................................... 25

6.7 Typical Characteristics.............................................. 811.5 Trademarks........................................................... 25

7 Detailed Description............................................ 16 11.6 Electrostatic Discharge Caution............................ 25

7.1 Overview................................................................. 16 11.7 Glossary................................................................ 26

7.2 Functional Block Diagram....................................... 16 12 Mechanical, Packaging, and Orderable

7.3 Feature Description................................................. 16 Information ........................................................... 26

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision F (March 2013) to Revision G Page

• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional

Modes,Application and Implementation section, Power Supply Recommendations section, Layout section, Device

and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1

• Updated the format of the Enable and Shutdown Pin Voltage Range in the 2.5-V Electrical Characteristics table for

clarity ...................................................................................................................................................................................... 5

• Updated the format of the Enable and Shutdown Pin Voltage Range in the 5-V Electrical Characteristics table for clarity. 7

Changes from Revision E (March 2013) to Revision F Page

• Changed layout of National Data Sheet to TI format ........................................................................................................... 23

Product Folder Links: LMV791 LMV792

OUT A

IN A-

IN A+

V-

EN A

5EN B

IN B+

IN B-

OUT B

V+

OUTPUT

V-

+IN

V+

-IN

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5 Pin Configuration and Functions

LMV791 DDC Package

6-Pin SOT

Top View

Pin Functions—LMV791

PIN I/O DESCRIPTION

NAME NO.

EN 5 I Enable

+IN 3 I Noninverting Input

–IN 4 I Inverting Input

Out 1 O Output

V+ 6 P Positive (highest) Supply Voltage

V– 2 P Negative (lowest) Supply Voltage

LMV792 DGS Package

10-Pin VSSOP

Top View

Pin Functions—LMV792

PIN I/O DESCRIPTION

NAME NO.

EN A 5 I Enable A

EN B 6 I Enable B

IN A+ 3, 7 I Inverting Input

IN A– 2, 8 I Noninverting Input

Out 1 O Output B

Out B 9 O Output B

V+ 10 P Positive (highest) Supply Voltage

V– 4 P Negative (lowest) Supply Voltage

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6 Specifications

6.1 Absolute Maximum Ratings

See (1)(2)

MIN MAX UNIT

VIN differential ±0.3 V

Supply voltage (V+– V−) 6 V

Input/Output pin voltage V++ 0.3 V−−0.3 V

Junction temperature(3) 150 °C

Infrared or convection (20 sec) 235 °C

Soldering

information Wave soldering lead temperature (10 sec) 260 °C

Storage temperature, Tstg −65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(3) The maximum power dissipation is a function of TJ(MAX),θJA. The maximum allowable power dissipation at any ambient temperature is

PD= (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PCB.

6.2 ESD Ratings VALUE UNIT

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(2) ±2000

Electrostatic

V(ESD) Charged-device model (CDM), per JEDEC specification JESD22-C101(3) ±1000 V

discharge Machine model(4) ±200

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) Human Body Model is 1.5 kΩin series with 100 pF.

(3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

(4) Machine Model is 0 Ωin series with 200 pF

6.3 Recommended Operating Conditions MIN MAX UNIT

Temperature(1) −40 125 °C

−40°C ≤TJ≤125°C 2 5.5 V

Supply voltage

(V+– V−)0°C ≤TJ≤125°C 1.8 5.5 V

(1) The maximum power dissipation is a function of TJ(MAX),θJA. The maximum allowable power dissipation at any ambient temperature is

PD= (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PCB.

6.4 Thermal Information LMV791 LMV792

THERMAL METRIC(1) DDC (SOT-23) DGS (VSSOP) UNIT

6 PINS 10 PINS

RθJA Junction-to-ambient thermal resistance(2) 191.8 179.1 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 68.1 70.5 °C/W

RθJB Junction-to-board thermal resistance 36.9 99.7 °C/W

ψJT Junction-to-top characterization parameter 2.2 11.6 °C/W

ψJB Junction-to-board characterization parameter 36.5 98.2 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2) The maximum power dissipation is a function of TJ(MAX),θJA. The maximum allowable power dissipation at any ambient temperature is

PD= (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PCB.

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SNOSAG6G –SEPTEMBER 2005–REVISED OCTOBER 2015

6.5 2.5-V Electrical Characteristics

Unless otherwise specified, all limits are ensured for TJ= 25°C, V+= 2.5 V, V−= 0 V, VCM = V+/2 = VO, VEN = V+.

PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT

TJ= 25 °C 0.1 ±1.35

VOS Input offset voltage mV

−40°C ≤TJ≤125°C ±1.65

LMV791(3) −1

TC VOS Input offset voltage temperature drift μV/°C

LMV792(3) −1.8

TJ= 25 °C 0.05 1

IBInput bias current VCM = 1 V(4) (5) −40°C ≤TJ≤85 °C 25 pA

−40°C ≤TJ≤125 °C 100

IOS Input offset current VCM = 1 V(5) 10 fA

TJ= 25 °C 80 94

CMRR Common-mode rejection ratio 0 V ≤VCM ≤1.4 V dB

−40°C ≤TJ≤125°C 75

TJ= 25 °C 80 100

2.0V ≤V+≤5.5V, VCM = 0

V−40°C ≤TJ≤125°C 75

PSRR Power supply rejection ratio dB

80 98

1.8 V ≤V+≤5.5 V, VCM = 0 V

CMRR ≥60 dB TJ= 25 °C −0.3 1.5

CMVR Common-mode voltage range V

CMRR ≥55 dB −40°C ≤TJ≤125°C −0.3 1.5

TJ= 25 °C 85 98

LMV791 −40°C ≤TJ≤125°C 80

VOUT = 0.15 V to 2.2 V,

RLOAD = 2 kΩto V+/2 TJ= 25 °C 82 92

AVOL Open-loop voltage gain LMV792 dB

−40°C ≤TJ≤125°C 78

TJ= 25 °C 88 110

VOUT = 0.15 V to 2.2 V,

RLOAD = 10 kΩto V+/2 −40°C ≤TJ≤125°C 84

TJ= 25 °C 25 75

RLOAD = 2 kΩto V+/2 −40°C ≤TJ≤125°C 82

Output voltage swing high TJ= 25 °C 20 65

RLOAD = 10 kΩto V+/2 −40°C ≤TJ≤125°C 71 mV from

VOUT either rail

TJ= 25 °C 30 75

RLOAD = 2 kΩto V+/2 −40°C ≤TJ≤125°C 78

Output voltage swing low TJ= 25 °C 15 65

RLOAD = 10 kΩto V+/2 −40°C ≤TJ≤125°C 67

TJ= 25 °C 35 47

Sourcing to V−

VIN = 200 mV(6) −40°C ≤TJ≤125°C 28

IOUT Output current mA

TJ= 25 °C 7 15

Sinking to V+

VIN = –200 mV(6) −40°C ≤TJ≤125°C 5

TJ= 25 °C 0.95 1.3

LMV791 −40°C ≤TJ≤125°C 1.65

Enable mode mA

VEN ≥2.1 V TJ= 25 °C 1.1 1.50

LMV792

ISSupply current per amplifier per channel −40°C ≤TJ≤125°C 1.85

Shutdown mode, VEN < TJ= 25 °C 0.02 1

0.4 μA

−40°C ≤TJ≤125°C 5

per channel

AV= +1, Rising (10% to 90%) 8.5

SR Slew rate V/μs

AV= +1, Falling (90% to 10%) 10.5

GBW Gain bandwidth 14 MHz

enInput referred voltage noise density f = 1 kHz 6.2 nV/√Hz

inInput referred current noise density f = 1 kHz 0.01 pA/√Hz

ton Turnon time 140 ns

toff Turnoff time 1000 ns

Enable mode 2.1 2

VEN Enable pin voltage range V

Shutdown mode 0.5 0.4

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using the

statistical quality control (SQC) method.

(2) Typical values represent the parametric norm at the time of characterization.

(3) Offset voltage average drift is determined by dividing the change in VOS by temperature change.

(4) Positive current corresponds to current flowing into the device.

(5) This parameter is specified by design and/or characterization and is not tested in production.

(6) The short circuit test is a momentary test, the short circuit duration is 1.5 ms.

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2.5-V Electrical Characteristics (continued)

Unless otherwise specified, all limits are ensured for TJ= 25°C, V+= 2.5 V, V−= 0 V, VCM = V+/2 = VO, VEN = V+.

PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT

Enable mode VEN = 2.5 V(4) 1.5 3

IEN Enable pin input current μA

Shutdown mode VEN = 0 V(4) 0.003 0.1

THD+N Total harmonic distortion + noise f = 1 kHz, AV= 1, RLOAD = 600 Ω0.01%

6.6 5-V Electrical Characteristics

Unless otherwise specified, all limits are ensured for TJ= 25°C, V+= 5 V, V−= 0 V, VCM = V+/2 = VO, VEN = V+.

PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT

TJ= 25 °C 0.1 ±1.35

VOS Input offset voltage mV

−40°C ≤TJ≤125°C ±1.65

LMV791(3) −1

TC VOS Input offset voltage temperature drift μV/°C

LMV792(3) −1.8

TJ= 25 °C 0.1 1

IBInput bias current VCM = 2 V(4) (5) −40°C ≤TJ≤85°C 25 pA

−40°C ≤TJ≤125°C 100

IOS Input offset current VCM = 2 V(5) 10 fA

TJ= 25 °C 80 100

CMRR Common-mode rejection ratio 0 V ≤VCM ≤3.7 V dB

−40°C ≤TJ≤125°C 75

TJ= 25 °C 80 100

2.0V ≤V+≤5.5 V, VCM =

0 V −40°C ≤TJ≤125°C 75

PSRR Power supply rejection ratio dB

80 98

1.8V ≤V+≤5.5 V, VCM = 0 V

CMRR ≥60 dB TJ= 25 °C −0.3 4

CMVR Common-mode voltage range V

CMRR ≥55 dB −40°C ≤TJ≤125°C −0.3 4

TJ= 25 °C 85 97

LMV791 −40°C ≤TJ≤125°C 80

VOUT = 0.3V to 4.7V,

RLOAD = 2 kΩto V+/2 TJ= 25 °C 82 89

AVOL Open-loop voltage gain LMV792 dB

−40°C ≤TJ≤125°C 78

TJ= 25 °C 88 110

VOUT = 0.3V to 4.7V,

RLOAD = 10 kΩto V+/2 −40°C ≤TJ≤125°C 84

TJ= 25 °C 35 75

RLOAD = 2 kΩto V+/2 −40°C ≤TJ≤125°C 82

Output voltage swing high TJ= 25 °C 25 65

RLOAD = 10 kΩto V+/2 −40°C ≤TJ≤125°C 71

TJ= 25 °C 42 75 mV from

VOUT LMV791 either rail

−40°C ≤TJ≤125°C 78

RLOAD = 2 kΩto V+/2 TJ= 25 °C 45 80

Output voltage swing low LMV792 −40°C ≤TJ≤125°C 83

TJ= 25 °C 20 65

RLOAD = 10 kΩto V+/2 −40°C ≤TJ≤125°C 67

TJ= 25 °C 45 60

Sourcing to V−

VIN = 200 mV(6) −40°C ≤TJ≤125°C 37

IOUT Output current mA

TJ= 25 °C 10 21

Sinking to V+

VIN = –200 mV(6) −40°C ≤TJ≤125°C 6

TJ= 25 °C 1.15 1.4

LMV791 −40°C ≤TJ≤125°C 1.75

Enable mode mA

VEN ≥4.6 V TJ= 25 °C 1.3 1.7

LMV792

ISSupply current per amplifier per channel −40°C ≤TJ≤125°C 2.05

TJ= 25 °C 0.14 1

Shutdown mode (VEN ≤μA

0.4 V) −40°C ≤TJ≤125°C 5

(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using the

statistical quality control (SQC) method.

(2) Typical values represent the parametric norm at the time of characterization.

(3) Offset voltage average drift is determined by dividing the change in VOS by temperature change.

(4) Positive current corresponds to current flowing into the device.

(5) This parameter is specified by design and/or characterization and is not tested in production.

(6) The short circuit test is a momentary test, the short circuit duration is 1.5 ms.

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SNOSAG6G –SEPTEMBER 2005–REVISED OCTOBER 2015

5-V Electrical Characteristics (continued)

Unless otherwise specified, all limits are ensured for TJ= 25°C, V+= 5 V, V−= 0 V, VCM = V+/2 = VO, VEN = V+.

PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT

AV= +1, Rising (10% to 90%) 6 9.5

SR Slew rate V/μs

AV= +1, Falling (90% to 10%) 7.5 11.5

GBW Gain bandwidth 17 MHz

enInput referred voltage noise density f = 1 kHz 5.8 nV/√Hz

inInput referred current noise density f = 1 kHz 0.01 pA/√Hz

ton Turnon time 110 ns

toff Turnoff time 800 ns

Enable mode 4.6 4.5

VEN Enable pin voltage range V

Shutdown mode 0.5 0.4

Enable mode VEN = 5 V(4) 5.6 10

IEN Enable pin input current μA

Shutdown mode VEN = 0 V(4) 0.005 0.2

THD+N Total harmonic distortion + noise f = 1 kHz, AV= 1, RLOAD = 600 Ω0.01%

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-40°C

-0.3 0.4 1.1 1.8

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

0.55

0.6

VOS (mV)

VCM (V)

V+ = 2.5V

125°C

25°C

-0.3 0.6 1.5 2.4 3.3 4.2

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

VOS (mV)

VCM (V)

-40°C

25°C

125°C

V+ = 5V

1.5 2.5 3.5 4.5 5.5

1.2

1.4

1.6

1.8

SUPPLY CURRENT (PA)

V+ (V)

0.8

0.6

0.4

0.2

125°C

25°C

-40°C

6.0

-0.3 0 0.3 0.6 0.9 1.2

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

VOS (mV)

VCM (V)

125°C

25°C

-40°C

V+ = 1.8V

1.5 2.5 3.5 4.5 5.5 6

0.4

0.8

1.2

1.6

SUPPLY CURRENT (mA)

V+ (V)

25°C

-40°C

125°C

1.5 2.5 3.5 4.5 5.5 6.0

SUPPLY CURRENT (mA)

V+ (V)

0.4

0.8

1.2

1.6

25°C

-40°C

125°C

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6.7 Typical Characteristics

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2, VEN = V+.

Figure 1. Supply Current vs Supply Voltage (LMV791) Figure 2. Supply Current vs Supply Voltage (LMV792)

Figure 3. Supply Current vs Figure 4. VOS vs VCM

Supply Voltage in Shutdown Mode

Figure 5. VOS vs VCM Figure 6. VOS vs VCM

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0 0.5 1 1.5 2 2.5

-0.1

0.1

0.3

0.5

0.7

0.9

1.1

1.3

1.5

1.7

SUPPLY CURRENT (mA)

ENABLE PIN VOLTAGE (V)

125°C

-40°C

25°C

V+ = 2.5V

0 1 2 3 4 5

-0.1

0.4

0.9

1.4

1.9

2.4

SUPPLY CURRENT (mA)

ENABLE PIN VOLTAGE (V)

125°C

-40°C

25°C

V+ = 5V

-40°C

125°C

25°C

-40°C

25°C

125°C

0 0.5 1 1.5 2 2.5

-0.1

0.1

0.3

0.5

0.7

0.9

1.5

SUPPLY CURRENT (mA)

ENABLE PIN VOLTAGE (V)

1.1

1.3 V+ = 2.5V

0 1 2 3 4 5

-0.1

0.4

0.9

1.4

1.9

2.4

SUPPLY CURRENT (mA)

ENABLE PIN VOLTAGE (V)

125°C

25°C

-40°C

125°C

V+ = 5V

1.5 2.5 3.5 4.5 5.5 6.0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

VOS (mV)

V+ (V)

-40°C

125°C

25°C

SLEW RATE (V/Ps)

1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3

V+ (V)

RISING

FALLING

5.5

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Typical Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2, VEN = V+.

Figure 8. Slew Rate vs Supply Voltage

Figure 7. VOS vs Supply Voltage

Figure 10. Supply Current vs Enable Pin Voltage(LMV791)

Figure 9. Supply Current vs Enable Pin Voltage (LMV791)

Figure 11. Supply Current vs Enable Pin Voltage (LMV792) Figure 12. Supply Current vs Enable Pin Voltage (LMV792)

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0 1 2 3 4 5

ISINK (mA)

VOUT (V)

125°C

25°C

-40°C

0 1 2 3 4 5

ISOURCE (mA)

VOUT (V)

125°C

25°C

1 2 3 4 5 6

ISOURCE (mA)

V+ (V)

125°C

25°C

-40°C

1 2 3 4 5 6

ISINK (mA)

V+ (V)

25°C

125°C

-40°C

0 1 2 3 4

-3

-2.5

-2

-1.5

-1

-0.5

0.5

1.5

IBIAS (pA)

VCM (V)

-40°C

25°C

V+ = 5V

0 1 2 3 4

-50

IBIAS (pA)

VCM (V)

-40

-30

-20

-10

125°C

V+ = 5V

85°C

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Typical Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2, VEN = V+.

Figure 13. Input Bias Current vs VCM Figure 14. Input Bias Current vs VCM

Figure 15. Sourcing Current vs Supply Voltage Figure 16. Sinking Current vs Supply Voltage

Figure 17. Sourcing Current vs Output Voltage Figure 18. Sinking Current vs Output Voltage

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1.8 2.5 3.2 3.9 4.6 5.3 6

V+ (V)

100

120

VOUT FROM RAIL (mV)

RLOAD = 600:

-40°C

25°C 125°C

1.8 2.5 3.2 3.9 4.6 5.3 6

100

VOUT FROM RAIL (mV)

V+ (V)

125°C

25°C

-40°C

RLOAD = 600:

1.8 2.5 3.2 3.9 4.6 5.3 6

VOUT FROM RAIL (mV)

V+ (V)

125°C

25°C

-40°C

RLOAD = 2 k:

125°C

25°C

-40°C

VOUT FROM RAIL (mV)

1.8 2.5 3.2 3.9 4.6 5.3 6

V+ (V)

RLOAD = 2 k:

1.8 2.5 3.2 3.9 4.6 5.3 6

V+ (V)

VOUT FROM RAIL (mV)

-40°C

25°C

125°C

RLOAD = 10 k:

1.8 2.5 3.2 3.9 4.6 5.3 6

V+ (V)

VOUT FROM RAIL (mV)

125°C

25°C

-40°C

RLOAD = 10 k:

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SNOSAG6G –SEPTEMBER 2005–REVISED OCTOBER 2015

Typical Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2, VEN = V+.

Figure 19. Positive Output Swing vs Supply Voltage Figure 20. Negative Output Swing vs Supply Voltage

Figure 22. Negative Output Swing vs Supply Voltage

Figure 21. Positive Output Swing vs Supply Voltage

Figure 23. Positive Output Swing vs Supply Voltage Figure 24. Negative Output Swing vs Supply Voltage

Product Folder Links: LMV791 LMV792

0.02 0.2 2

OUTPUT AMPLITUDE (V)

-140

-120

-100

-80

-60

-40

-20

THD+N (dB)

V+ = 2.75V

V- = -2.75V

AV = +2

RLOAD = 100 k:

RLOAD = 600:

10 100 1k 10k 100k

FREQUENCY (Hz)

0.001

0.002

0.003

0.004

0.005

0.006

THD+N (%)

RL = 600:

RL = 100 k:

V+ = 1.2V

V- = 0.6V

VO = 0.9 VPP

AV = +2

OUTPUT AMPLITUDE (V)

0.02 0.2 2

-120

-100

-80

-60

-40

-20

THD+N (dB)

RLOAD = 600:

RLOAD = 100 k:

V+ = 1.2V

V- = -0.6V

AV = +2

020 40 60 80 100 120

CLOAD (pF)

OVERSHOOT AND UNDERSHOOT %

US%

OS%

400 nV/DIV

1S/DIV

VS = ±2.5V

VCM = 0.0V

110 100 10k 100k

FREQUENCY (Hz)

100

VOLTAGE NOISE (nV/

Hz)

V+ = 5.5V

V+ = 2.5V

LMV791

LMV792

SNOSAG6G –SEPTEMBER 2005–REVISED OCTOBER 2015

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Typical Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2, VEN = V+.

Figure 25. Input Referred Voltage Noise vs Frequency Figure 26. Time Domain Voltage Noise

Figure 27. Overshoot and Undershoot vs CLOAD Figure 28. THD+N vs Peak-to-Peak Output Voltage (VOUT)

Figure 30. THD+N vs Frequency

Figure 29. THD+N vs Peak-to-Peak Output Voltage (VOUT)

Product Folder Links: LMV791 LMV792

160

1k 100k 100M

FREQUENCY (Hz)

CROSSTALK REJECTION RATION (dB)

10M

10k

120

100

140

10 mV/DIV

200 ns/DIV

INPUT = 20 mVPP

f = 1 MHz

V+ = 2.5V

-40

-20

100

120

GAIN (dB)

-60

PHASE (°)

-40

-20

100

120

-60

FREQUENCY (Hz)

10k 100k 1M 10M 100M

PHASE

GAIN

RLOAD = 600:10k: 10 M:

10 1k 10k 100k 1M 10M 100M

FREQUENCY (Hz)

0.01

0.1

100

OUTPUT IMPEDANCE (:)

100

10 100 1k 10k 100k

FREQUENCY (Hz)

0.001

0.002

0.003

0.004

0.005

0.006

THD+N (%)

RL = 600:

RL = 100 k:

V+ = 2.5V

V- = 2.5V

VO = 4 VPP

AV = +2

1k 10k 100k 1M 10M 100M

-40

-20

100

120

GAIN (dB)

FREQUENCY (Hz)

-60

PHASE (°)

-40

-20

100

120

-60

CL = 20 pF

CL = 50 pF

CL = 100 pF

GAIN

CL = 100 pF

CL = 50 pF

CL = 20 pF

PHASE

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Typical Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2, VEN = V+.

Figure 32. Open-Loop Gain and Phase With Capacitive Load

Figure 31. THD+N vs Frequency

Figure 34. Closed-Loop Output Impedance vs Frequency

Figure 33. Open-Loop Gain and Phase With Resistive Load

AV= +1 Figure 36. Small Signal Transient Response

Figure 35. Crosstalk Rejection

Product Folder Links: LMV791 LMV792

-10

PHASE MARGIN (°)

10 100 1000

CLOAD (pF)

RLOAD = 10 M:

V+ = 5V

RLOAD = 10 k:

RLOAD = 600:

10 1k 100k 10M

FREQUENCY (Hz)

-100

-60

-40

POSITIVE PSRR (dB)

1M10k

100

-20

-80 1.8V

5.5V

-10

PHASE MARGIN (°)

10 100 1000

CLOAD (pF)

RLOAD = 10 M:

V+ = 2.5V

RLOAD = 10 k:

RLOAD = 600:

200 mV/DIV

800 ns/DIV

INPUT = 1 VPP

f = 200 kHz

V+ = 5V

800 ns/DIV

200 mV/DIV

INPUT = 1 VPP

f = 200 kHz

V+ = 2.5V

10 mV/DIV

200 ns/DIV

INPUT = 20 mVPP

f = 1 MHz

V+ = 5V

LMV791

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Typical Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2, VEN = V+.

AV= +1 AV= +1

Figure 37. Large Signal Transient Response Figure 38. Small Signal Transient Response

AV= +1 Figure 40. Phase Margin vs Capacitive Load (Stability)

Figure 39. Large Signal Transient Response

Figure 42. Positive PSRR vs Frequency

Figure 41. Phase Margin vs Capacitive Load (Stability)

Product Folder Links: LMV791 LMV792

0 1 2 3 4

CCM (pF)

VCM (V)

V+ = 5V

10 1k 1M

FREQUENCY (Hz)

120

CMRR (dB)

100k

10k

100

V+ = 2.5V

V+ = 5V

-120

-100

-80

-60

-40

-20

NEGATIVE PSRR (dB)

10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

V+ = 1.8V

V+ = 5.5V

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Typical Characteristics (continued)

Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2, VEN = V+.

Figure 43. Negative PSRR vs Frequency Figure 44. CMRR vs Frequency

Figure 45. Input Common-Mode Capacitance vs VCM

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7 Detailed Description

7.1 Overview

The LMV79x family provides optimal performance in low-voltage and low-noise systems. A low-noise CMOS

input stage, with typical input bias currents in the range of a few femtoamperes, and an input common-mode

voltage range which includes ground make the LMV791 and the LMV792 ideal for low-power sensor applications

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Wide Bandwidth at Low Supply Current

The LMV791 and LMV792 are high performance operational amplifiers that provide a unity gain bandwidth of 17

MHz while drawing a low supply current of 1.15 mA. This makes them ideal for providing wideband amplification

in portable applications. The shutdown feature can also be used to design more power efficient systems that

offer wide bandwidth and high performance while consuming less average power.

7.3.2 Low Input Referred Noise and Low Input Bias Current

The LMV79x have a very low input referred voltage noise density (5.8 nV/√Hz at 1 kHz). A CMOS input stage

ensures a small input bias current (100 fA) and low input referred current noise (0.01 pA/√Hz). This is very

helpful in maintaining signal fidelity, and makes the LMV791 and LMV792 ideal for audio and sensor-based

applications.

7.3.3 Low Supply Voltage

The LMV791 and the LMV792 have performance ensured at 2.5-V and 5-V supply. The LMV791 family is

ensured to be operational at all supply voltages between 2 V and 5.5 V, for ambient temperatures ranging from

−40°C to 125°C, thus using the entire battery lifetime. The LMV791 and LMV792 are also ensured to be

operational at 1.8-V supply voltage, for temperatures between 0°C and 125°C. This makes the LMV791 family

ideal for usage in low-voltage commercial applications.

7.3.4 Rail-to-Rail Output and Ground Sensing

Rail-to-rail output swing provides maximum possible dynamic range at the output. This is particularly important

when operating at low supply voltages. An innovative positive feedback scheme is used to boost the current drive

capability of the output stage. This allows the LMV791 and the LMV792 to source more than 40 mA of current at

1.8-V supply. This also limits the performance of the LMV791 family as comparators, and hence the usage of the

LMV791 and the LMV792 in an open-loop configuration is not recommended. The input common-mode range

includes the negative supply rail which allows direct sensing at ground in single supply operation.

7.3.5 Shutdown Feature

The LMV791 family is ideal for battery-powered systems. With a low supply current of 1.15 mA and a shutdown

current of 140 nA typically, the LMV791 and LMV792 allow the designer to maximize battery life. The enable pin

of the LMV791 and the LMV792 allows the operational amplifier to be turned off and reduce its supply current to

less than 1 μA. To power on the operational amplifier the enable pin should be higher than V+– 0.5 V, where V+

is the positive supply. To disable the operational amplifier, the enable pin voltage should be less than V−+ 0.5 V,

where V−is the negative supply.

Product Folder Links: LMV791 LMV792

CIN

VOUT

VIN

VOUT

VIN

AV = - = -

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Feature Description (continued)

7.3.6 Small Size

The small footprint of the LMV791 and the LMV792 package saves space on printed-circuit-boards, and enables

the design of smaller electronic products, such as mobile phones, tablets, or other portable systems. Long traces

between the signal source and the operational amplifier make the signal path susceptible to noise. By using a

physically smaller LMV791 and LMV792 package, the operational amplifier can be placed closer to the signal

source, reducing noise pick-up and increasing signal integrity.

7.4 Device Functional Modes

7.4.1 Capacitive Load Tolerance

The LMV791 and LMV792 can directly drive up to 120 pF in unity gain without oscillation. The unity gain follower

is the most sensitive configuration to capacitive loading. Direct capacitive loading reduces the phase margin of

amplifiers. The combination of the output impedance of the amplifier and the capacitive load induces phase lag.

This results in either an underdamped pulse response or oscillation. To drive a heavier capacitive load, the circuit

in Figure 46 can be used.

In Figure 46, the isolation resistor RISO and the load capacitor CLform a pole to increase stability by adding more

phase margin to the overall system. The desired performance depends on the value of RISO. The bigger the RISO

resistor value, the more stable VOUT will be. Increased RISO would, however, result in a reduced output swing and

short circuit current.

Figure 46. Isolation of CLto Improve Stability

7.4.2 Input Capacitance and Feedback Circuit Elements

The LMV791 family has a very low input bias current (100 fA) and a low 1/f noise corner frequency (400 Hz),

which makes it ideal for sensor applications. However, to obtain this performance a large CMOS input stage is

used, which adds to the input capacitance of the operational amplifier, CIN. Though this does not affect the DC

and low frequency performance, at higher frequencies the input capacitance interacts with the input and the

feedback impedances to create a pole, which results in lower phase margin and gain peaking. This can be

controlled by being selective in the use of feedback resistors, as well as by using a feedback capacitance, CF.

For example, in the inverting amplifier shown in Figure 47, if CIN and CFare ignored and the open-loop gain of

the operational amplifier is considered infinite then the gain of the circuit is −R2/R1. An operational amplifier,

however, usually has a dominant pole, which causes its gain to drop with frequency. Hence, this gain is only

valid for DC and low frequency. To understand the effect of the input capacitance coupled with the non-ideal gain

of the operational amplifier, the circuit needs to be analyzed in the frequency domain using a Laplace transform.

Figure 47. Inverting Amplifier

Product Folder Links: LMV791 LMV792

10k 100k 1M 10M 100M

FREQUENCY (Hz)

-25

-20

-15

-10

-5

GAIN (dB)

R1, R2 = 30 k:

AV = -1

R1, R2 = 10 k:

R1, R2 = 1 k:

10k 100k 1M 10M

FREQUENCY (Hz)

-40

-30

-20

-10

GAIN (dB)

CF = 0 pF

CF = 5 pF

CF = 2 pF

R1, R2 = 30 k:

AV = -1

+¨

-1

2CIN

P1,2 = 1

R2r1

-4 A0CIN

-R2/R1

1 + s

+s2

CIN R2

VOUT

VIN (s) =

A0 R1

R1 + R2

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LMV792

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Device Functional Modes (continued)

For simplicity, the operational amplifier is modeled as an ideal integrator with a unity gain frequency of A0.

Hence, its transfer function (or gain) in the frequency domain is A0/s. Solving the circuit equations in the

frequency domain, ignoring CFfor the moment, results in an expression for the gain shown in Equation 1.

(1)

It can be inferred from the denominator of the transfer function that it has two poles, whose expressions can be

obtained by solving for the roots of the denominator and are shown in Equation 2.

(2)

Equation 2 shows that as the values of R1and R2are increased, the magnitude of the poles, and hence the

bandwidth of the amplifier, is reduced. This theory is verified by using different values of R1and R2in the circuit

shown in Figure 46 and by comparing their frequency responses. In Figure 48 the frequency responses for three

different values of R1and R2are shown. When both R1and R2are 1 kΩ, the response is flattest and widest;

whereas, it narrows and peaks significantly when both their values are changed to 10 kΩor 30 kΩ. So it is

advisable to use lower values of R1and R2to obtain a wider and flatter response. Lower resistances also help in

high-sensitivity circuits because they add less noise.

A way of reducing the gain peaking is by adding a feedback capacitance CFin parallel with R2. This introduces

another pole in the system and prevents the formation of pairs of complex conjugate poles which cause the gain

to peak. Figure 49 shows the effect of CFon the frequency response of the circuit. Adding a capacitance of 2 pF

removes the peak, while a capacitance of 5 pF creates a much lower pole and reduces the bandwidth

excessively.

Figure 48. Gain Peaking Caused by Large R1, R2Figure 49. Gain Peaking Eliminated by CF

Product Folder Links: LMV791 LMV792

CCM

IIN

VOUT

IIN - RF

CIN = CD + CCM

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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LMV791 and LMV792 family of amplifiers is specified for operation from 1.8 V to 5.5 V. Parameters that can

exhibit significant variance with regard to operating voltage or temperature are presented in the Typical

Characteristics section.

8.2 Typical Applications

These application examples highlight a few of the circuits where the LMV791 and LMV792 may be used.

8.2.1 Transimpedance Amplifier

CMOS input operational amplifiers are often used in transimpedance applications as they have an extremely high

input impedance. A transimpedance amplifier converts a small input current into a voltage. This current is usually

generated by a photodiode. The transimpedance gain, measured as the ratio of the output voltage to the input

current, is expected to be large and wide-band. Because the circuit deals with currents in the range of a few nA,

low-noise performance is essential. The LMV79x are CMOS input operational amplifiers providing wide

bandwidth and low noise performance, and are hence ideal for transimpedance applications.

Figure 50. Photodiode Transimpedance Amplifier

8.2.1.1 Design Requirements

Usually, a transimpedance amplifier is designed on the basis of the current source driving the input. A

photodiode is a very common capacitive current source, which requires transimpedance gain for transforming its

miniscule current into easily-detectable voltages. The photodiode and gain of the amplifier are selected with

respect to the speed and accuracy required of the circuit. A faster circuit would require a photodiode with lesser

capacitance and a faster amplifier. A more sensitive circuit would require a sensitive photodiode and a high gain.

A typical transimpedance amplifier is shown in Figure 50. The output voltage of the amplifier is given by the

equation VOUT =−IINRF. Because the output swing of the amplifier is limited, RFshould be selected such that all

possible values of IIN can be detected.

Product Folder Links: LMV791 LMV792

OP AMP

OPEN LOOP

GAIN

NOISE GAIN WITH NO CF

NOISE GAIN WITH CF

fZfPA0

fZ = 1

2SRFCIN

fP = A0

2SRF(CIN+CF)

GAIN

FREQUENCY

RFCINA0

CF = 2SRFA0

1 + 1 + 4S

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Typical Applications (continued)

8.2.1.2 Detailed Design Procedure

The LMV79x have a large gain-bandwidth product (17 MHz), which enables high gains at wide bandwidths. A

rail-to-rail output swing at 5.5-V supply allows detection and amplification of a wide range of input currents. A

CMOS input stage with negligible input current noise and low input voltage noise allows the LMV79x to provide

high-fidelity amplification for wide bandwidths. These properties make the LMV79x ideal for systems requiring

wide-band transimpedance amplification.

As mentioned earlier, the following parameters are used to design a transimpedance amplifier: the amplifier gain-

bandwidth product, A0; the amplifier input capacitance, CCM; the photodiode capacitance, CD; the

transimpedance gain required, RF; and the amplifier output swing. Once a feasible RFis selected using the

amplifier output swing, these numbers can be used to design an amplifier with the desired transimpedance gain

and a maximally flat frequency response.

An essential component for obtaining a maximally flat response is the feedback capacitor, CF. The capacitance

seen at the input of the amplifier, CIN, combined with the feedback capacitor, RF, generate a phase lag which

causes gain-peaking and can destabilize the circuit. CIN is usually just the sum of CDand CCM. The feedback

capacitor CFcreates a pole, fPin the noise gain of the circuit, which neutralizes the zero in the noise gain, fZ,

created by the combination of RFand CIN. If properly positioned, the noise gain pole created by CFcan ensure

that the slope of the gain remains at 20 dB/decade till the unity gain frequency of the amplifier is reached, thus

ensuring stability. As shown in Figure 51, fPis positioned such that it coincides with the point where the noise

gain intersects the open-loop gain of the operational amplifier. In this case, fPis also the overall 3-dB frequency

of the transimpedance amplifier. The value of CFneeded to make it so is given by Equation 3. A larger value of

CFcauses excessive reduction of bandwidth, while a smaller value fails to prevent gain peaking and instability.

(3)

Figure 51. CFSelection for Stability

Calculating CFfrom Equation 3 can sometimes return unreasonably small values (<1 pF), especially for high-

speed applications. In these cases, its often more practical to use the circuit shown in Figure 52 in order to allow

more reasonable values. In this circuit, the capacitance CF′is (1+ RB/RA) time the effective feedback capacitance,

CF. A larger capacitor can now be used in this circuit to obtain a smaller effective capacitance.

For example, if a CFof 0.5 pF is needed, while only a 5-pF capacitor is available, RBand RAcan be selected

such that RB/RA= 9. This would convert a CF′of 5 pF into a CFof 0.5 pF. This relationship holds as long as RA<

RF.

Product Folder Links: LMV791 LMV792

10k 100k 1M 10M

FREQUENCY (Hz)

100

110

120

130

GAIN (dB)

CIN = 50 pF, CF = 1.5 pF

CIN = 100 pF, CF = 2 pF

CIN = 200 pF, CF = 3 pF

10k 100k 1M 10M

FREQUENCY (Hz)

100

GAIN (dB)

CIN = 50 pF, CF = 4.5 pF

CIN = 100 pF, CF = 6 pF

CIN = 200 pF, CF = 9 pF

IF RA < < RF

CFc = ¨

§1 + RB

CFc

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Typical Applications (continued)

Figure 52. Obtaining Small CFfrom large CF′

8.2.2 Application Curves

The LMV791 was used to design a number of amplifiers with varying transimpedance gains and source

capacitances. The gains, bandwidths and feedback capacitances of the circuits created are summarized in

Table 1. The frequency responses are presented in Figure 53 and Figure 54. The feedback capacitances are

slightly different from the formula in Equation 3, because the parasitic capacitance of the board and the feedback

resistor RFhad to be accounted for.

Table 1. Frequency Response Results

Transimpedance, ATI CIN CF3-dB Frequency

470000 50 pF 1.5 pF 350 kHz

470000 100 pF 2.0 pF 250 kHz

470000 200 pF 3.0 pF 150 kHz

47000 50 pF 4.5 pF 1.5 MHz

47000 100 pF 6.0 pF 1 MHz

47000 200 pF 9.0 pF 700 kHz

Figure 54. Frequency Response for ATI = 47000

Figure 53. Frequency Response for ATI = 470000

Product Folder Links: LMV791 LMV792

10k 100k 1M 10M

FREQUENCY (Hz)

100

110

120

GAIN (dB)

CIN = 50 pF

CF = 4.5 pF

792B

792A

CIN = 50 pF

47 k:

4.5 pF

1 k:

0.1 PF

10 k:

VOUT

IIN

VOUT

IIN = 470,000

ATI =

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8.2.3 High-Gain, Wideband Transimpedance Amplifier Using the LMV792

The LMV792, dual, low-noise, wide-bandwidth, CMOS input operational amplifier IC can be used for compact,

robust and integrated solutions for sensing and amplifying wide-band signals obtained from sensitive

photodiodes. One of the two operational amplifiers available can be used to obtain transimpedance gain while

the other can be used for amplifying the output voltage to further enhance the transimpedance gain. The wide

bandwidth of the operational amplifiers (17 MHz) ensures that they are capable of providing high gain for a wide

range of frequencies. The low input referred noise (5.8 nV/√Hz) allows the amplifier to deliver an output with a

high SNR (signal to noise ratio). The small VSSOP-10 footprint saves space on printed-circuit-boards and allows

ease of design in portable products.

The circuit shown in Figure 55, has the first operational amplifier acting as a transimpedance amplifier with a gain

of 47000, while the second stage provides a voltage gain of 10. This provides a total transimpedance gain of

470000 with a −3-dB bandwidth of about 1.5 MHz, for a total input capacitance of 50 pF. The frequency

response for the circuit is shown in Figure 56

Figure 55. 1.5-MHz Transimpedance Amplifier, With ATI = 470000

Figure 56. 1.5-MHz Transimpedance Amplifier Frequency Response

8.2.4 Audio Preamplifier With Bandpass Filtering

With low input referred voltage noise, low supply voltage and low supply current, and a low harmonic distortion,

the LMV791 family is ideal for audio applications. Its wide unity gain bandwidth allows it to provide large gain for

a wide range of frequencies and it can be used to design a preamplifier to drive a load of as low as 600 Ωwith

less than 0.01% distortion. Two amplifier circuits are shown in Figure 57 and Figure 58.Figure 57 is an inverting

amplifier, with a 10-kΩfeedback resistor, R2, and a 1-kΩinput resistor, R1, and hence provides a gain of −10.

Figure 58 is a noninverting amplifier, using the same values of R1and R2, and provides a gain of 11. In either of

these circuits, the coupling capacitor CC1 decides the lower frequency at which the circuit starts providing gain,

while the feedback capacitor CFdecides the frequency at which the gain starts dropping off. Figure 59 shows the

frequency response of the inverting amplifier with different values of CF.

Product Folder Links: LMV791 LMV792

VOUT

RACF

VIN = KI

IR RADIATION

INTENSITY, I

VOUT RA

K(RA + RB)

I =

IR SENSOR

1100 10k 1M

FREQUENCY (Hz)

-20

-5

GAIN (dB)

100k1k

-10

-15

CF = 10 pF

CF = 100 pF

CF = 1 nF

CC2 RB1

RB2

CC1

V+

AV = 1 + R2

VIN

1 k:

10 k:

VOUT

= 11

CC1

+VOUT

VIN

RB1

V+

RB2

CC2

AV = - = -10

10 k:

1 k:

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Figure 57. Inverting Audio Preamplifier Figure 58. Noninverting Audio Preamplifier

Figure 59. Frequency Response of the Inverting Audio Preamplifier

8.2.5 Sensor Interfaces

The low input bias current and low input referred noise of the LMV791 and LMV792 make them ideal for sensor

interfaces. These circuits are required to sense voltages of the order of a few μV, and currents amounting to less

than a nA, and hence the operational amplifier needs to have low voltage noise and low input bias current.

Typical applications include infrared (IR) thermometry, thermocouple amplifiers and pH electrode buffers.

Figure 60 is an example of a typical circuit used for measuring IR radiation intensity, often used for estimating the

temperature of an object from a distance. The IR sensor generates a voltage proportional to I, which is the

intensity of the IR radiation falling on it. As shown in Figure 60, K is the constant of proportionality relating the

voltage across the IR sensor (VIN) to the radiation intensity, I. The resistances RAand RBare selected to provide

a high gain to amplify this voltage, while CFis added to filter out the high-frequency noise.

Figure 60. IR Radiation Sensor

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9 Power Supply Recommendations

For proper operation, the power supplies must be properly decoupled. For decoupling the supply lines, TI

recommends that 10-nF capacitors be placed as close as possible to the operational amplifier power supply pins.

For single-supply, place a capacitor between V+and V–supply leads. For dual supplies, place one capacitor

between V+and ground, and one capacitor between V–and ground.

10 Layout

10.1 Layout Guidelines

Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to

the device as possible. A single bypass capacitor from V+ to ground is applicable for single-supply applications.

Noise can propagate into analog circuitry through the power pins of the circuit as a whole and operational

amplifier itself. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power

sources local to the analog circuitry.

Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods

of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground

plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog

grounds, paying attention to the flow of the ground current.

The ground pin should be connected to the PCB ground plane at the pin of the device.

The feedback components should be placed as close to the device as possible minimizing strays.

10.2 Layout Example

Figure 61. Typical SOT Layout

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11 Device and Documentation Support

11.1 Device Support

11.1.1 Development Support

For developmental support, see the following:

• LMV791 PSPICE Model, SNOM056

• LMV792 PSPICE Model, SNOM057

• TINA-TI SPICE-Based Analog Simulation Program, http://www.ti.com/tool/tina-ti

• DIP Adapter Evaluation Module, http://www.ti.com/tool/dip-adapter-evm

• TI Universal Operational Amplifier Evaluation Module, http://www.ti.com/tool/opampevm

• TI Filterpro Software, http://www.ti.com/tool/filterpro

11.2 Documentation Support

11.2.1 Related Documentation

For related documentation, see the following:

•AN-31 Op Amp Circuit Collection,SNLA140

•Feedback Plots Define Op Amp AC Performance, SBOA015 (AB-028)

•Circuit Board Layout Techniques, SLOA089

•Op Amps for Everyone, SLOD006

•Capacitive Load Drive Solution using an Isolation Resistor, TIPD128

•Handbook of Operational Amplifier Applications, SBOA092

11.3 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 2. Related Links

TECHNICAL TOOLS & SUPPORT &

PARTS PRODUCT FOLDER SAMPLE & BUY DOCUMENTS SOFTWARE COMMUNITY

LMV791 Click here Click here Click here Click here Click here

LMV792 Click here Click here Click here Click here Click here

11.4 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

11.5 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.6 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Product Folder Links: LMV791 LMV792

LMV791

LMV792

SNOSAG6G –SEPTEMBER 2005–REVISED OCTOBER 2015

www.ti.com

11.7 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Product Folder Links: LMV791 LMV792

PACKAGE OPTION ADDENDUM

www.ti.com 28-Feb-2017

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LMV791MK/NOPB ACTIVE SOT-23-THIN DDC 6 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AS1A

LMV791MKX/NOPB ACTIVE SOT-23-THIN DDC 6 3000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AS1A

LMV792MM/NOPB ACTIVE VSSOP DGS 10 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AX2A

LMV792MMX/NOPB ACTIVE VSSOP DGS 10 3500 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM AX2A

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

PACKAGE OPTION ADDENDUM

www.ti.com 28-Feb-2017

Addendum-Page 2

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LMV791MK/NOPB SOT-

23-THIN DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMV791MKX/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMV792MM/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LMV792MMX/NOPB VSSOP DGS 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Mar-2017

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LMV791MK/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

LMV791MKX/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

LMV792MM/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0

LMV792MMX/NOPB VSSOP DGS 10 3500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Mar-2017

Pack Materials-Page 2

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