AC89
2.5 Gb/s Transimpedance
Amplifier, 5.0 Volt supply
Preliminary Data Sheet
Preliminary
Information
Features
Single +5 V power supply
operation
Input noise current = 270 nA rms
in 2 GHz band width with a 0.5 pF
detector
Transimpedance gain = 4.0 k
(differential)
On-chip automatic gain control
gives input current overload of
2.6 mA pk and max output
voltage swing of 300 mV pk-pk
differential
50 single-ended or 100
differential wire bond selectable
outputs
On-chip power supply rejection
achie ves 40 dB rejection up to1
MHz
Bandwidth (- 3 dB): DC to 2.2 GHz
Constant photodiode reverse
bias = 3 V, (anode to input,
cathode to VCC)
Photodiode may be anode or
cathode connected
-40°C to + 100°C junction
temperature operation
Available as bare die
Manufactured using a high yield,
silicon bipolar process
Applications
SONET OC-48
Fibre optic data modules
The Nortel Networks AC89 is a
monolithic, silicon bipolar
transimpedance amplifier, providing
wideband, low noise preamplification
of signal current from a photodetector.
It features differential outputs with a
single-ended bond option and
optimized noise performance, and
incorporates an Automatic Gain
Control (AGC) mechanism to increase
dynamic range. When u sing differen tial
outputs, a supply decoupling capacitor
is the only external circuitry required.
Noise performance is optimized for 2.5
Gb/s operation, with a sensitivity of -27
dBm for 10-10 bit error rate, using a
detector with 0.5 pF capacitance and a
responsivity of 0.85 A/W.
Nortel Networks offers a portfolio of
optical networking ICs for use in high-
performance optical receiver and
transmitter applicatio ns. The AC89
provides for power and chip-count
savings to the designer of fiber-based
Datacom or Telecom solutions.
System block dia gram
Preliminary
Information
Page 2 of 6 AC89 - 2.5 Gb/s Transimpedance Amplifier, 5.0 Volt supply
Functional descrip tion
Amplifier front-end
The transimpedance front-end amp lifies an input current from
a photodetector, at pin TZ_IN, to produce an output with the
feedback resistor Rf determining the level of amplification
(see “Functional block diagram” below). An automatic gain
control loop varies this resistor, to ensure that the output from
the front-end does not saturate th e outpu t driver stage that
follows. This gain control allows input signals of up to 2.6 mA
peak. The input transistor and feedback are optimized for
noise performance at 2.5 Gb/s.
The input pin TZ_ IN is biased at 3 V below th e supply volt age
VCC, allo wing a photodetector to ha v e a constant re v erse bias
by connecting the cathode to VCC. This enables full single
rail operation. Alternatively the photodetector may be
connected between TZ_IN and GND which provides 2 V
nominal reverse bias.
The front-end stage has its own supply ground connection
(VEE2) to achieve optimum noise performance and maintain
integrity of the high-speed signal path. The front-end shares
the VCC (+5 V) connection with the remainder of the
circuitry, which has a separate ground (VEE1).
Output driver stage
The output driver acts as a buffer stage, capable of swinging
up to 300 mVpk-pk differential into a 100 load. The small
output swings allow ease of use with low voltage post
amplifiers (e.g. 3.3 V parts).
Automatic Gain Control (AGC)
The AGC circuit monitors the voltages from the output d river
and compares them to an internal r eference le v el produ ced via
the on-chip bandgap reference circuit . When this level is
exceeded, the gain of the front-end is reduced by controlling
the feedback resistor Rf.
A long time-constant integrator is used within the control loop
of the AGC with a low frequency cut-off of 5 kHz.
Functional block diagram
Preliminary
Information
AC89 - 2.5 Gb/s Transimpedance Amplifier, 5.0 Volt supply Page 3 of 6
Absolu te maximum ratings
These are stress ratings only. Exposure to stresses beyond
these maximum ratings may cause permanent damage to, or
affect the reliability of the device. Avoid operating the device
outside the r ecommended operating conditions defined below.
Recommended operating conditions
DC electrical characteristics
Symbol Parameter Minimum Maximum Units
VCC Supply voltage -0.7 6.0 V
Tstg Storage Temperature -65 150 °C
Tj Junction temperature -40 120 °C
Symbol Parameter Minimum Typical Maximum Units
VCC Supply voltage 4.7 5.0 5.3 V
Tj Operating junction temperature -40 100 °C
Symbol Parameter Minimum Typical Maximum Units
ICC Supply Current 65 95 mA
Vin Input Bias Voltage VCC -3.5 VCC -3.0 VCC -2.5 V
Vout Output Bias Voltage 2.8 3.1 3.4 V
Tr Transresistance 6.0 8.0 10.0 k
Rout Output res ist anc e 50
Preliminary
Information
Page 4 of 6 AC89 - 2.5 Gb/s Transimpedance Amplifier, 5.0 Volt supply
AC cha racteristics
The above parameters are specified differentially under the
following conditions:
Supply Voltage (VCC) = 4.7 V to 5.3 V
Junction Te mperature (T j) = -40°C to 100°C
Load Resistor (RL) = 2 x 50 AC-coupled via 100 nF
capacitors
Photodetector Ca pacitance (Cd) = 0.5 pF
Photodetector Responsivity = 0.85 A /W
Transimpedance ( Tz) me asured wi th <36 µA peak
photocurrent
Applications information
For maximum performance it is recommended that the device
be used in differential mode with the circuit shown in the
“Connections for differential operation” diagram.
Symbol Parameter Minimum Typical Maximum Units
BW (3dB) Small Signal Bandwidth at -3dB point 1.7 2.2 3.3 GHz
Flfc Low frequency cut-off 5kHz
DRi Input data rate 50 2500 Mb/s
Iagc AGC Threshold 36 µA peak
Tz Differential transimpedance (f = 100 mHz) 3.0 4.0 5.0 k
Iol Input current before overload (2.5 Gb/s NRZ data) 2600 3000 µA peak
Pol Optical overload +1.8 +2.5 dBm
Nrms Input noise current (in 2 Ghz) 270 365 nA rms
Sens Optical Sensitivity (10-10 B.E.R.) -27 -25.6 dBm
PSR Power supply rejection (up to 1 MHz) 30 40 dB
Connections for differ ential operation
Preliminary
Information
AC89 - 2.5 Gb/s Transimpedance Amplifier, 5.0 Volt supply Page 5 of 6
In situations where it is necessary to use the device in a single-
ended mode, this can be achieved using the circuit shown in
the “Connections for single-ended operation” diagram.
Connections for single-ended operation
Bond pad assignment
Pad No. Pad Name Type Description Function
1, 8, 11 VCC PSupply Positive Supply (+5 V)
2BIAS-MON ITest Test Pad (leave unconnected)
3TZ_IN IAnalog Input Pad (connect to photodetector)
4 VEE2 P Supply Negative Supply (0V) - Note this is a separate ground for the
input stage, which is AC coupled on chip. There is no DC
current through this pad.
5, 7 VEE1 PSupply Negative Supply (0V)
6-ACGND PSupply Single-ended bond option. Connect to GND (0V) through
minimum 1 nF for single-ended output on S_OUTP. Leave
open-circuit for differential outputs. See “Connections for single-
ended operation” diagram on page 5.
9 S_OUTN O Analog Negative differential voltage output. Leave open-circuit for
single -end ed operatio n.
10 S_OUTP OAnalog Positive differential voltage output. Also positive single-ended
output if -AC GND is connected to GND (0V) via 1 nF capacitor.
Preliminary
Information
Fo r addi tional info rmation on Norte l Netw orks pro ducts an d service s
offered, please contact your local representative.
Nortel Networks
High Performance Optical Component Solutions
attn: Mark etin g Depa rtm ent
2745 Iris Street
6th Flo or
Ottawa, Ontario
Canada K2C 3V5
Tel: 1-800-4 NORTEL
Fax: 1-613-763-8416
Email: opt icalcompo nents@nortelnetworks.co m
www.nortelnetworks.com/hpocs
Copyright 2000 Nortel Net wo rks Corporation. All right s reserved.
Nortel, Nortel Networks, the Nortel Net wo rks corporat e logo, an d the
globemark design are tradema rks of Nort el Networks Corporation. Any third-
party tradema rks are the property of thei r respe ctive owners.
Prelimi na ry informa ti on docum ent s contain information on produc ts in thei r
formative or design phase of dev e lopment. Features, characteristic data and
other specifications are subject to change with out notice. Contact Nortel
Networks for current informatio n on this produc t.
The information contained in this document is considered to be accurate as of
the date of publication. No liability is assumed by Nortel Networks for use of
any information contained in this document, or for infringement of any patent
rights or any other propriet ary rights of third parties which may result from
suc h us e. No license is grant e d by impl ication or ot herwi s e un der any patent
right or any other propriet ary right of Norte l Ne tworks.
Publication # 84018.37/03-01 Issue 3 Issued: 7 March 2001 Pag e 6 of 6
Pad layout diagram
Note: This diagram is not to scale. Bondpad openings are
82 µm x 82 µm. There are three VCC pads for ease of wire bonding - these pads are connected on-chip and only one pad is
required to be bonded out.