MC33493MOD868EV - Freescale Semiconductor

Freescale Semiconductor

Data Sheet: Product Preview Document Number: MC33493

Rev. 1.7, 03/2007

This document contains information on a product under development. Freescale reserves the

right to change or discontinue this product without notice.

MC33493

DATA

GND

XTAL0

REXT CFSK

VCC

RFOUT

GNDRF

VCC

ENABLE

XTAL1

DATACLK MODE

BAND

PIN CONNECTIONS

• Selectable frequency bands:

315—434 MHz and 868—928 MHz

• OOK and FSK modulation

• Adjustable output power rang e

• Fully integrated voltage control oscillator (VCO)

• Supply voltage range: 1.9 —3.6 V

• Very low standby current: 0.1 nA @ TA=25°C

• Low-supply voltage shutdown

• Data clock output for microcontroller

• Extended temperature ran ge: –40 to 125 °C

• Low external component count

• Typical appl ication compliant with European

Telecomm uni cations Standards Institute (ETSI)

standard

PLL Tuned UHF Transmitter

for Data Transfer

Applications

Ordering Information

Device Ambient

Temperature

Range Package

MC33493DTB –40°C to 1 25 °C TSSOP14

MC3493DTBE –40°C to 125°C TSSOP14

(ROHS)

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor2

1 Transmitter Functional Description . . . . . . . . . . . . . . . . . . . . . .4

2 Phase Locked Loop and Local Oscillator . . . . . . . . . . . . . . . . .4

3 Radio Frequency (RF) Output Stage . . . . . . . . . . . . . . . . . . . .4

4 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

5 Microcontroller Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

6 State Machine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

7 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

8 Data Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

9 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

10 RF Output Spectrum. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

11 Output Power Measurement. . . . . . . . . . . . . . . . . . . . . . . . . .14

12 Complete Application Schematic and

PCB for OOK Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

13 Complete Application Schematic and

PCB for FSK Modulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

14 Recommendations for FSK Modulation . . . . . . . . . . . . . . . . .19

15 Case Outline Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . .21

List of Figures

Figure 1.Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . 3

Figure 2.Crystal Pulling Configurations. . . . . . . . . . . . . . . . . . . . 5

Figure 3.State machine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 4.Signals Waveform and Timing Definition . . . . . . . . . . . 7

Figure 5.RF Spectrum at 434 MHz Frequency Band

Displayed with a 5 MHz Span. . . . . . . . . . . . . . . . . . . 11

Figure 6.RF Spectrum at 434 MHz Frequency Band

Displayed with a 50 MHz Span. . . . . . . . . . . . . . . . . . 11

Figure 7.RF Spectrum at 434 MHz Frequency Band

Displayed with a 1.5 GHz Span . . . . . . . . . . . . . . . . . 12

Figure 8.RF Spectrum at 434 MHz Band

for a 70 kHz FSK Deviation at 4.8 kbit/s . . . . . . . . . . . 12

Figure 9.Output Power Measurement Configurations . . . . . . . . 13

Figure 10.Output Model and Matching Network

for 434 MHz Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 11.Output Power at 434 MHz Band vs Rext Value . . . . . 14

Figure 12.Application Schematic for OOK Modulation,

434 MHz Frequency Band. . . . . . . . . . . . . . . . . . . . . . 15

Figure 13.Two-Button Keyfob Board Layout. . . . . . . . . . . . . . . . 16

Figure 14.Application Schematic for FSK Modulation,

Serial Configuration, 434 MHz Frequency Band . . . . . 17

Figure 15.Application PCB Layout for FSK Modulation,

Serial Configuration, 434 MHz Frequency Band . . . . . 18

Figure 16.Crystal Load Capacitance Contributors Schematic . . 19

Figure 17.Case Outline Dimensions . . . . . . . . . . . . . . . . . . . . . 20

List of Tables

Table 1. Pin Function Description . . . . . . . . . . . . . . . . . . . . . . . . 3

Table 2. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . 3

Table 3. Band Selection and Associated Divider Ratios . . . . . . . 4

Table 4. DATACLK Frequency vs Crystal Oscillator Frequency. . 5

Table 5. Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. External Components Description for OOK. . . . . . . . . 15

Table 7. Typical Crystal Characteristics (SMD Package) . . . . . 16

Table 8. External Components Description for FSK . . . . . . . . . 17

Table 9. Crystal Pulling Capacitor Values vs

Carrier Frequency Total Deviation -1- . . . . . . . . . . . . . 18

Table 10.Crystal Pulling Capacitor Values vs

Carrier Frequency Total Deviation -2- . . . . . . . . . . . . . 18

Table 11.Pads and Tracks Parasitic Values . . . . . . . . . . . . . . . . 19

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 3

Figure 1. Simplified Block Diagram

Table 1. Pin Function Description

Pin Name Description

1 DATACLK Clock output to the microcontroller

2 DATA Data input

3 BAND Frequency band selectio n

4 GND Ground

5 XTAL1 Reference oscillator input

6 XTAL0 Reference oscillator output

7 REXT Power amplifier output current setting input

8 CFSK FSK switch output

9 VCC Power supply

10 RFOUT Pow er amplifier output

11 GNDRF Power amplifier ground

12 VCC Power supply

13 ENABLE Enable input

14 MODE Modulation type selection input

Table 2. Absolute Maximum Ratings

Parameter Symbol Value Unit

Supply voltage VCC VGND – 0.3 to 3.7 V

Voltage allowed on each pin VGND – 0.3

to VCC + 0.3 V

ESD HBM voltage capability on each pin 1(note 1)

1Human Body model, AEC-Q100-002 Rev. C.

±2000 V

ESD MM voltage capability on each pin2 (note 2)

2 Machine Model, AEC-Q100-003 Rev. E.

±150 V

Storage temperature Ts –65 to +150 °C

Junction temperature Tj +150 °C

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Transmitter Functional Description

Freescale Semiconductor4

1 Transmitter Functional Description

MC33493 is a PLL-tuned low-power UHF transmitter. The different modes of operation are controlled by the microcontroller

through several digital input pins. The power supply voltage ranges from 1.9 V to 3.6 V, allowing operation with a single lithium

cell.

2 Phase Locked Loop and Local Oscillator

The VCO is a completely integrated relaxation oscillator. The phase frequency detector (PFD) and the loop filter are fully

integrated. The exact output frequency is equal to: fRFOUT = fXTAL × [PLL divider ratio]. The frequency band of operation is

selected through the BAND pin.

Table 3 shows details for each frequency band sel ection.

Table 3. Band Selection and Associated Divider Ratios

An out-of-lock function is performed by monitoring the PFD output voltage. When it exceeds defined limits, the RF output stage

is disabled.

3 Radio Frequency (RF) Output Stage

The radio frequentcy (RF) output stage source is a single-ended square-wave switched current. Harmonics are present in the

output current drive. Their radiated absolute level depends on the antenna characteristics and output power . Typical application

demonstrates compliance to ETSI standard.

A resistor , Rext, connected to the REXT pin controls the output power allowing a trade-of f between radiated power and current

consumption.

The output voltage is internally clamped to Vcc ±2V

be (typ. Vcc ±1.5 V @ TA=25 °C).

4 Modulation

To select the On Off Keying (OOK) modulation, a low-logic level must be applied on the MODE pin. This modulation is

performed by switching the RF output stage on or off. The logic level applied on the DATA pin controls the output stage state:

DATA = 0 → output stage off,

DATA = 1 → output stage on.

Applying a high-logic level on the MODE pin selects Frequency Shift Keying (FSK) modulation. This modulation is achieved

by crystal pulling. An internal switch connected to the CFSK pin enables switching the external crystal load capacitors. Figure 2

shows the possible configurations: serial and paral lel.

The logic level applied on pin DATA contro ls the st ate of this internal switch:

DATA=0 → switch off,

DATA=1 → switch on.

DATA input is internally re-synchronized by the crystal reference signal. The corresponding jitter on the data duty cycle cannot

exceed ±1 reference period (±75 ns for a 13.56 MHz crystal).

This crystal pulling solution implies that the RF output frequency deviation equals the crystal frequency deviation mult ipl ied

by the PLL Divider ratio (see Table 3).

BAND Input Level Frequency Band

(MHz) PLL Divider Ratio Crystal Oscillator

Frequency (MHz)

High 315 32 9.84

434 13.56

Low 868 64

Microcontroller Interface

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 5

Figure 2. Crystal Pulling Configurations

5 Microcontroller Interface

Four digital input pins (ENABLE, DATA , BAND, and MODE) enable the circuit to be controlled by a microco ntroll e r. The

band frequency and the modulation type should be configured before enabling the circuit.

One digital output pin, DATACLK, provides the microcontroller with a reference frequency for data clocking. This frequency

is equal to the crystal oscillator frequency divided by 64 (see Table 4).

Table 4. DATACLK Frequency vs Crystal Oscillator Frequency

Crystal Oscillator Frequency (MHz) DATACLK Frequency (kHz)

9.84 154

13.56 212

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

State Machine

Freescale Semiconductor6

6 State Machine

Figure 3 details the state m achine.

Figure 3. State machine

State 1: The circuit is in standby mode and draws only a leakage current from the power supply.

State 2: In this state, the PLL is out of the lock-in range; therefore, the RF output stage is switched off, preventing RF

transmission. Data clock is available on the DATACLK pin. Each time the device is enabled, the state machine passes through

this state.

State 3: In this state, the PLL is within the lock-in range. If t < tPLL_lock_in, the PLL may be in acquisition mode. If t≥tPLL_lock_in,

then the PLL is locked. Data entered on the DATA pin are output on the RFOUT pin accordin g to the modulatio n selected by

the level applied on the MODE pin.

State 4: When the supply voltage falls below the shutdown voltage threshold (VSDWN,) the entire circuit switches off. After this

shutdown, applying a low level on the EN ABLE pin unl atches the circuit.

Figure 4 shows the waveforms of the main signals for a typical application cycle.

State 2

PLL out of lock-in range

No RF output

State 1

Standby mode

ENABLE=1

PLL in

lock-in range Vbattery < Vshutdown

ENABLE=0

Power ON

AND ENABLE=0

State 3

Transmission mode

ENABLE=0

State 4

Shutdown mode

PLL out of

lock-in range

Power Manag ement

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 7

Figure 4. Signals Waveform and Timing Definition

7 Power Management

When the battery voltage falls below the shutdown voltage threshold (VSDWN) the entire circu it swit ches off. After this

shutdown, the circuit is latc hed unt il a low level is applied on pin ENABLE (see State 4 of the state machine).

8 Data Clock

At start-up, data clock timing is valid after the data clock settling time. Because the clock is switched off asynchronously, the

last period duration cannot be guaranteed.

9 Electrical Characteristics

Unless otherwise specified, voltage range Vcc=[Vshutdown;3.6 V], temperature range T A=[–40 °C;+ 125 °C], Rext=12 kΩ±5%,

RF output frequency fcarrier = 433.92 MHz, referen ce freque ncy freference = 13.560 MHz, output load RL = 50 Ω±1%

(Figure 9). Values refer to the circuit shown in the recommended application schematics: Figure 12 shows OOK modulation

and Figure 14 shows FSK modulation. Typical values reflect average measurement at VCC = 3 V, TA = 25 °C.

ENABLE

DATACLK

DATA

State 1 S tate 2 State 3

tDATACLK_settling > tPLL_lock_in

tPLL_lock_in

MODE=0 (OOK)

MODE=1 (FSK)

State 1

fcarrier

fhigh

flow fhigh

flow

c : PLL locked

fhigh

RFOUT

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Electrical Characteristics

Freescale Semiconductor8

Table 5. Electrical Characteristics

Parameter Test Conditions, Comments Limits Unit

Min. Typ. Max.

1General Parameter s

1.1 Supply current in

standby mode TA≤25 °C — 0.1 5 nA

1.2 TA=60°C — 7 30 nA

1.3 TA= 85 °C — 40 100 nA

1.4 TA= 125 °C — 800 1700 nA

1.5 Supply current in

transmission mode 315 and 434 bands,

OOK and FSK modulation,

continuous wave, TA=25°C

— 11.6 13.5 mA

1.6 315 and 434 ban ds,

DATA=0, –40 °C ≤TA≤125 °C —4.46.0 mA

1.7 868 MHz band,

DATA=0, –40 °C ≤TA≤125 °C —4.66.2 mA

1.8 315 and 434 ban ds,

OOK and FSK modulation,

continuous wave, –40 °C ≤TA≤125 °C

— 11.6 14.9 mA

1.9 868 MHz band,

OOK and FSK modulation,

continuous wave, –40 °C ≤TA≤125 °C

— 11.8 15.1 mA

1.10 Supply voltage — 3 3.6 V

1.11 Shutdown voltage threshold TA= –40 °C — 2.04 2.11 V

1.12 TA= –20 °C — 1.99 2.06 V

1.13 TA= 25 °C — 1.86 1.95 V

1.14 TA= 60 °C — 1.76 1.84 V

1.15 TA= 85 °C — 1.68 1.78 V

1.16 TA= 125 °C — 1.56 1.67 V

2RF Parameters

2.1 Rext value 12 — 21 kΩ

2.2 Output power 315 and 434 MHz bands,

with 50 Ω matching network —5—dBm

2.3 868 MHz band,

with 50 Ω matching network —1—dBm

2.4 315 and 434 MHz bands,

–40 °C ≤TA≤125 °C –3 0 3 dBm

2.8 868 MHz band,

–40 °C ≤TA≤125 °C –7 –3 0 dBm

2.12 Current and output power

va riation vs. Rext valu e 315 and 434 MHz bands,

with 50 Ω matching network — –0.35

–0.25 —dB/kΩ

mA/kΩ

Electrical Characteristics

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 9

2.13 Harmonic 2 level 315 and 434 MHz bands,

with 50 Ω matching network — –34 — dBc

2.14 868 MHz band,

with 50 Ω matching network — –49 — dBc

2.15 315 and 434 MHz bands — –23 -17 dBc

2.16 868 MHz band — –38 -27 dBc

2.17 Harmonic 3 level 315 and 434 MHz bands,

with 50 Ω matching network — –32 — dBc

2.18 868 MHz band,

with 50 Ω matching network — –57 — dBc

2.19 315 and 434 MHz bands — –21 –15 dBc

2.20 868 MHz band — –48 –39 dBc

2.21 Spurious level

@ fcarrier ±fDATACLK

315 and 434 MHz bands — –36 –24 dBc

2.22 868 MHz band — –29 –17 dBc

2.23 Spurious level

@ fcarrier ±freference

315 MHz band — –37 –30 dBc

2.24 434 MHz band — –44 –34 dBc

2.25 868 MHz band — –37 –27 dBc

2.41 Spurious level

@ fcarrier/2 315 MHz band — –62 –53 dBc

2.26 434 MHz band — –80 –60 dBc

2.27 868 MHz band — –45 –39 dBc

2.30 Phase noise 315 and 434 MHz bands,

±175 kHz from fcarrier

— –75 –68 dBc/Hz

2.31 868 MHz band,

±175 kHz from fcarrier

— –73 –66 dBc/Hz

2.32 PLL lock-in time,

tPLL_lock_in

fcarrier within 30 kHz from the final value,

crystal series resistor = 150 Ω

— 400 1600 µs

2.33 XTAL1 input capacitance — 1 — pF

2.34 Crystal resistance OOK modulation — 20 200 W

2.44 FSK modulation 20 50

2.35 OOK modulat i on de pt h 75 90 — dB c

2.36 FSK modulation

carrier frequency

total deviation

315 and 434 MHz bands, see note Note: — — 100 kHz

2.37 868 MHz band, see note Note: — — 200 kHz

2.38 CFSK output resistance MODE = 0, DATA = x

MODE=1, DATA=0 50 70 — kΩ

2.39 MODE=1, DATA=1 — 90 300 W

2.43 CFSK output capacitance — 1 — pF

2.40 Data rate Manchester coding — — 10 kbit/s

Table 5. Electrical Characteristics (continued)

Parameter Test Conditions, Comments Limits Unit

Min. Typ. Max.

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

RF Output Spectrum

Freescale Semiconductor10

10 RF Output Spectrum

The following figures represent spectrums of the transmitter carrier, measured in conduction mode. Three different spans have

been used. The 5 MHz span spectrum (Figure 5) shows phase noise response close to the RF carrier and the noise suppression

within the PLL-loop bandwidth. The 50 MHz span spectrum (Figure 6) shows phase noise and reference spurious. Finally, the

1.5 GHz span spectrum (Figure 7) shows the second and third harm onics of carrier. All spectrums are measured in OOK

modulation at DATA=1.

Figure 8 shows the spectrum in case of FSK modulation with 45 kHz deviation at 4 kbit/s data rate.

2.41 Data to RF delay difference between

falling and rising edges,

tdelay_difference

MODE = 0, see note 3.5 5.25 7.5 µs

2.42 MODE = 1, see note –200 — 200 ns

Note: This parameter is depending on crystal characteristics, load capacitor values (see Table 4) and PCB tr ack capacitance.

Note: Delay difference definition

3Microcontroller Interfaces

3.1 Input low voltage Pins: BAND, MODE, ENABLE, and DATA 0 — 0.3 x

VCC

3.2 Input high voltage 0.7 x

VCC

—V

CC V

3.3 Input hysteresis voltage — — 120 mV

3.4 Input current Pins: BAND, MODE,DATA = 1 — — 100 nA

3.5 ENABLE pulldown resistor — 180 — kΩ

3.6 DATACLK output low voltage Cload = 2 pF 0 — 0.25 x

VCC

3.7 DATACLK output high voltage 0.75 x

VCC

—V

CC V

3.8 DATACLK rising time Cload = 2 pF, measured from 20% to 80% of the

voltage swing — 250 500 ns

3.9 DATACLK falling time — 150 400 ns

3.10 DATACLK settling time,

tDATACLK_settling

45% < duty cycle fDATACLK < 55% — 800 2000 µs

Table 5. Electrical Characteristics (continued)

Parameter Test Conditions, Comments Limits Unit

Min. Typ. Max.

Input data

Demodula te d da ta

tdelay_rise tdelay_fall

From 50% of data edge to corresponding

tdelay_difference =t

delay_fall –t

delay_rise

demodulated signal envelope edge:

RF Output Spectrum

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 11

Figure 5. RF Spectrum at 434 MHz Frequency Band Displayed with a 5 MHz Span

Figure 6. RF Spectrum at 434 MHz Frequency Band Displayed with a 50 MHz Span

Resolution

bandwidth:

100kHz

Resolution

bandwidth:

30kHz

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

RF Output Spectrum

Freescale Semiconductor12

Figure 7. RF Spectrum at 434 MHz Frequency Band Displayed with a 1.5 GHz Span

Figure 8. RF Spectrum at 434 MHz Band for a 70 kHz FSK Deviation at 4.8 kbit/s

Output Power Measurement

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 13

11 Output Power Measurement

The RF output levels given in Section 9, “Electrical Characteristics,” are measured with a 50 Ω load directly connected to the

RFOUT pin, as shown below in Figure 9. This wideband coupling method gives results independent of the application.

Figure 9. Output Power Measurement Configurations

The configuration shown in Figure 10(a) provides better efficiency in terms of output power and harmonics rejection. The

schematic on Figure 10(b) gives the equivalent circuit of the RFOUT pin and the DC bias impeder as well as matching network

components for 434 MHz frequency band.

Figure 10. Output Model and Matching Network for 434 MHz Band

RFOUT

RF output

=50W

100 pF

Impeder: TDK MMZ1608Y102CTA00

VCC

RFOUT

RF output

=50

Impeder: TDK MMZ1608Y102CTA00

VCC

Matching

Network

1.5 pF 250

Matching

330pF

39 nH

RFOUT pin Load

Impeder

(a)

(b)

Network

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Complete Application Schematic and PCB for OOK Modulation

Freescale Semiconductor14

Figure 11 sh ows the out put power versus the Rext resistor value with 50

load and with matching network.

Figure 11. Output Power at 434 MHz Band vs Rext Value

The 50 Ω matching network used for the 868 MHz band is similar to the 434 MHz, excepting components values: L1 is changed

to 8.2 nH and C3 to 470 pF in Figure 11. The typical gain of this 868 MHz matching network is 4 dB compared to unmatched

configuration.

12 Complete Application Schematic and PCB for OOK

Modulation

Figure 12 shows a complete application schematic using a MC68HC908RK2 microcontroller. OOK mo dulation is selected,

fcarrier = 433.92 MHz. The C2 to C5 capacito rs can be removed if switch debounce is done by software.

Output power measurement in typical conditions (434MHz - Vcc=3V - 25°C)

Output power when matched (dBm)

-0.35dB/kΩ

ΩΩ

Ω # -0.35mA/kΩ

ΩΩ

Output power on 50Ω

ΩΩ

Ω load (dBm)

-6

-4

-2

6 9 12 15 18 21 24

Rext (kΩ

ΩΩ

Ω)

RFOUT

Level (dBm)

REXT SPECIFIED RANGE

Complete Applicat ion Schematic and PCB for OOK Modulation

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 15

Figure 12. Application Schematic for OOK Modulation, 434 MHz Frequency Band

For 868 MHz band applicatio n, the inpu t pin BAND must be wired to ground. See component description on Table 6 and

Table 7.Table 6. External Components Description for OOK

Examples of crystal reference are given below (see characteristics in Table 7) for different application bands:

• at 315 MHz band (freference = 9.84375 MHz, –40 °C < TA < 85 °C): NDK LN-G102-950,

• at 434/868 MHz bands (freference = 13.56 MH z, –40 °C < TA< 125 °C): NDK NX804 5GB/CSJ S1-40125-8050-12

and NDK NX1255GA.

Component Function Value Unit

Y1 Crystal,

see Table 7 315 MHz band: 9.84 MHz

434 MHz band: 13.56 MHz

868 MHz band: 13.56 MHz

R2 RF output level setting

resistor (Rext)12 kΩ

C6 Cr ystal load capacitor 8.21

1C6 value equals recommended crystal load capacitance reduced by the PCB stray capacitances.

C7 Power supply decoupling

capacitors 22 nF

C8 100 pF

Vbat

SW1 SW2 SW2a

SW1a

C6 8.2pF

2.2nF

C7 22nF

750

13.56MHz

LED1

2.2pF

100pF

12K

1 2

MC68HC908RK2

PTA0

PTB0/MCLK

PTB1

PTB2/TCH0

PTB4/TCH1

PTB5

PTB3/TCLK

OSC1

OSC2

VSS

10 VDD 11

IRQ1 12

RST 13

PTA7 14

PTA6/KBD6 15

PTA5/KBD5 16

PTA4/KBD4 17

PTA3/KBD3 18

PTA2/KBD2 19

PTA1/KBD1 20

C10

100nF

MC33493

DATACLK

DATA

BAND

GND

XTAL1

XTAL0

REXT

7CFSK 8

VCC 9

RFOUT 10

GNDRF 11

VCC 12

ENABLE 13

MODE 14

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Complete Application Schematic and PCB for FSK Modulation

Freescale Semiconductor16

)

Figure 13 shows a two-button key fob board. Size is 30 × 45 millimeters.

Figure 13. Two-Button Keyfob Board Layout

13 Complete Application Schematic and PCB for FSK

Modulation

Figure 14 shows a complete appl ication schematic using a MC68HC908RK2 microcontrol ler. FSK modulation is selected,

fcarrier= 433.92 MHz. C1 capacitor can be remov ed if switch debounce is done by software.

Table 7. Typical Crystal Characteristics (SMD Package)

Parameter NDK LN-G102-950

(for 315 MHz)

NDK NX8045GB/CSJ

S1-40125-8050-12

(for 434 MHz and 868 MHz)

NDK NX1255GA

(for 434 MHz and 868 MHz) Unit

Load capacitance 12 12 12 pF

Motional capacitance 3.33 4.4 10.5 fF

Static capacitance 1.05 1.5 2.46 pF

Loss resistance 28 18.5 10 Ω

Complete Application Schematic and PCB for FSK Modulation

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 17

Figure 14. Application Schematic for FSK Modulation, Serial Configuration, 434 MHz Frequency Band

For 868 MHz band applicatio n, the inpu t pin BAND must be wired to ground. See component description in Table 8.

Figure 15 shows the corresponding PCB layout.

Table 8. External Components Descrip tion for FSK

Component Function Value Unit

Y1 Cr ystal 315 MHz band: 9.84,

See Table 7 MHz

434 MHz band: 13.56,

see Table 7 MHz

868 MHz band: 13.56,

see Table 7 MHz

R1 RF output level setting

resistor (Rext)12 kΩ

C3 Cr ystal load capacitor See Table 9 pF

C4 pF

C2 P o w er supply decoupling capacitor 22 nF

C6 100 pF

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Recommendations for FSK Modulation

Freescale Semiconductor18

Figure 15. Application PCB Layout for FSK Modulat ion, Serial Configuration, 434 MHz Frequency Band

Table 9 gives the measured FSK deviations respective to C3 and C4 capacitor values for three deviations. Crystal reference is

NDK NX8045GB/CSJ S1-40125-8050-12.

Another crystal reference, NDK NX1255GA (see Table 7), is enabled to reach higher deviation as mentioned on Table 10.

These results are due to the higher crystal motional capacitor.

14 Recommendations for FSK Modulation

FSK deviation is function of total load capacitance presented to the crystal. This load capacitance is constituted by various

contributors:

• the crystal characteristic, especially its static capacitance

• the external load capacitors (C3, C4 as defined in Figure 14 and Table 9)

• the device internal capacitance of pins XTAL0, XTAL1 , CFSK

• the PCB track capacitance

The schematic given in Figure 16 shows a typical FSK application using serial capacitor configuration, where device pads and

PCB track capacitances are mentioned.

Table 9. Crystal Pulling Capacitor Values vs Carrier Frequency Total Deviation -1-

Carrier frequency

(MHz) Carrier frequency total

deviation (kHz) C3 capacitor (pF) C4 capacitor (pF) Recommended

R_off value (kΩ)

434 45 4.7 6.8 10

70 2.2 10 —

100 1 15 22

868 90 4.7 6.8 10

140 2.2 10 —

200 1 15 22

Table 10. Crystal Pulling Capacitor Values vs Carrier Frequency Total Deviation -2-

Carrier frequency

(MHz) Carrier frequency total

deviation (kHz) C3 capacitor value

(pF) C4 capacitor value

(pF) Recommended

R_off value (kΩ)

434 150 1 27 —

868 300 1 27 —

Recommendations for FSK Modulation

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 19

Device pad capacitance is defined by the package capacitance and by the internal circuitry . Typical capacitance values for these

pads are given in Table 11.

Some realistic assumptions and measurements have been made concerning track parasitic capacitances for a 0.8 mm FR4

double side application PCB. They are gi ven in Table 11 and the correspon ding PCB layout is shown in figure Figure 17.

To achieve large deviations, this total load capacitance must be lowered. For a given crystal, the PCB must be carefully laid out

to reduce the capacitance of the tracks wired to XTA L0 , XTAL1, and CFSK pins.

Recommendation: a R_off resistor can be added in parallel with the FSK switch to optimize the transient response of

demodulated signal. Table 11 gives the optimized R_o ff values for two deviations. There is no footprint for R_off resistor on

the layout in Figure 16. When used, this component can be soldered on top of C3.

Figure 16. Crystal Load Capacitance Contributors Schematic

Table 11. Pads and Tracks Parasitic Values

Capacitance Value Unit

C_pad_XTAL0 1 pF

C_pad_XTAL1 1 pF

C_pad_CFSK 1 pF

C_track_XTAL0 1.5 pF

C_track_XTAL1 1.5 pF

C_track_CFSK 1.5 pF

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Case Outline Dimensions

Freescale Semiconductor20

15 Case Outline Dimensions

Figure 17. Case Outline Dimensions

CASE 948G-01

ISSUE O

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A4.90 5.10 0.193 0.200

B4.30 4.50 0.169 0.177

C--- 1.20 --- 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.50 0.60 0.020 0.024

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH OR GATE BURRS SHALL NOT

EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION SHALL

NOT EXCEED

0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABL E DAMBAR

PROTRUSION SHA LL BE 0.08 (0.003) TOTAL

IN EXCESS OF THE K DIMENSION AT

MAXIMUM MATERIAL CONDITION.

6. TER MINAL NUMBERS ARE SH OWN FOR

REFERENCE ONLY.

7. D IMENSION A A ND B ARE TO BE

°°°°

U0.15 (0.006)T

2X L/2

0.10 (0.004) V S

L-U-

SEATING

PLANE

0.10 (0.004)

-T-

SECTION N-N

DETAIL E

JJ1

DETAIL E

-W-

0.25 (0.010)

PIN 1

IDENT.

U0.15 (0.006)T

-V-

14X REFK

PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7

Freescale Semiconductor 21

THIS PAGE INTENTIONALLY BLANK

Document Number : MC33493

Rev. 1.7

03/2007

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