Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 LM5009 Wide Input, 100-V,150-mA, Step-Down Switching Regulator 1 Features 3 Description * * * * * The LM5009 step-down switching regulator features all of the functions needed to implement a low-cost, efficient, buck bias regulator. This device is capable of driving a 150-mA load current from a 9.5-V to 95-V input source. The switching frequency can exceed 600 kHz, depending on the input and output voltages. The output voltage can be set from 2.5 V to 85 V. This high-voltage regulator contains an N-channel buck switch and an internal startup regulator. The device is easy to implement and is provided in 8-pin VSSOP and thermally-enhanced, 8-pin WSON packages. The LM5009 is a well-suited alternative to a high-voltage monolithic or discrete linear solution where the power loss becomes unacceptable. The regulator operation is based on a control scheme using an on-time inversely proportional to VIN. This feature allows the operating frequency to remain relatively constant over load and input voltage variations. The control scheme requires no loop compensation, resulting in an ultrafast transient response. An intelligent current limit is implemented with forced off-time that is inversely proportional to VOUT. This scheme ensures short-circuit protection and provides minimum foldback. Other features include thermal shutdown, VCC undervoltage lockout, gate drive undervoltage lockout, and maximum duty cycle limiter. 1 * * * * * * * * Integrated N-Channel MOSFET 150-mA Output Current Capability Ultra-Fast Transient Response No Loop Compensation Required VIN Feed-Forward Provides Constant Operating Frequency Switching Frequency Can Exceed 600 kHz Highly Efficient Operation 2% Accurate 2.5-V Feedback From -40C to +125C Internal Startup Regulator Intelligent Current Limit Protection External Shutdown Control Thermal Shutdown 8-Pin VSSOP and Thermally-Enhanced 8-Pin WSON Packages 2 Applications * * * * * Heat Sink Eliminator for Classic Linear Regulator Applications 12-V, 24-V, 36-V, and 48-V Rectified AC Systems 42-V Automotive Non-Isolated AC Mains Charge-Coupled Supplies LED Current Source Device Information(1) PART NUMBER LM5009 PACKAGE BODY SIZE (NOM) VSSOP (8) 3.00 mm x 3.00 mm WSON (8) 4.00 mm x 4.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application Circuit 9. 5 - 95V Input VIN VCC C3 LM5009 C1 BST R ON C4 RON/SD L1 SW VOUT SHUTDOWN D1 RCL R CL C2 R1 FB RTN R2 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 6 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 7 7.1 Overview ................................................................... 7 7.2 Functional Block Diagram ......................................... 7 7.3 Feature Description................................................... 7 7.4 Device Functional Modes........................................ 10 8 Application and Implementation ........................ 11 8.1 Application Information............................................ 11 8.2 Typical Application .................................................. 11 8.3 Do's and Don'ts ....................................................... 16 9 Power Supply Recommendations...................... 16 10 Layout................................................................... 17 10.1 Layout Guidelines ................................................. 17 10.2 Layout Example .................................................... 17 11 Device and Documentation Support ................. 18 11.1 11.2 11.3 11.4 11.5 Documentation Support ........................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 18 18 18 18 18 12 Mechanical, Packaging, and Orderable Information ........................................................... 18 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision G (February 2013) to Revision H * Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1 Changes from Revision F (February 2013) to Revision G * 2 Page Page Changed layout of National Data Sheet to TI format ........................................................................................................... 16 Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 LM5009 www.ti.com SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 5 Pin Configuration and Functions DGK, NGU Packages 8-Pin VSSOP, WSON Top View 1 8 SW VIN BST VCC RCL RON/SD RTN FB 2 3 7 6 4 5 Pin Functions PIN NAME NO. I/O DESCRIPTION Boost pin. An external capacitor is required between the BST and SW pins. A 0.022-F ceramic capacitor is recommended. An internal diode charges the capacitor from VCC. BST 2 I EP -- -- Exposed pad (WSON package only). Exposed metal pad on the underside of the device. Connecting this pad to the PC board ground plane is recommended to aid in heat dissipation. FB 5 I Feedback input from regulated output. This pin is connected to the inverting input of the internal regulation comparator. The regulation threshold is 2.5 V. RCL 3 I Current limit off-time set pin. A resistor between this pin and RTN sets the off-time when current limit is detected. The off-time is preset to 35 s if FB = 0 V. RON/SD 6 I On-time set pin. A resistor between this pin and VIN sets the switch on-time as a function of VIN. The minimum recommended on-time is 250 ns at the maximum input voltage. This pin can be used for remote shutdown. RTN 4 -- Ground pin. Ground for the entire circuit. SW 1 O Switching output. Power switching output. Connect to the inductor, recirculating diode, and bootstrap capacitor. VCC 7 O Output from the internal high-voltage startup regulator. Regulated at 7.0 V. If an auxiliary voltage is available to raise the voltage on this pin above the regulation set point (7 V), the internal series pass regulator shuts down, reducing the device power dissipation. Do not exceed 14 V. This voltage provides gate drive power for the internal buck switch. An internal diode is provided between this pin and the BST pin. A local 0.1-F decoupling capacitor is required. VIN 8 I Input voltage. Recommended operating range: 9.5 V to 95 V. Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 3 LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VIN to RTN -0.3 100 V BST to RTN -0.3 114 V SW to RTN (steady-state) -1 V BST to VCC 100 V BST to SW 14 V VCC to RTN 14 V All other inputs to RTN -0.3 7 V Storage temperature, Tstg -65 150 C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings VALUE V(ESD) (1) (2) (3) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) (2) UNIT 2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (3) V 750 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. The human body model is a 100-pF capacitor discharged through a 1.5-k resistor into each pin. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) VIN (1) MIN MAX Line voltage 9.5 95 UNIT V Operating junction temperature -40 125 C Operating ratings are conditions under which operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics. 6.4 Thermal Information LM5009 THERMAL METRIC (1) DGK (VSSOP) NGU (WSON) 8 PINS 8 PINS UNIT RJA Junction-to-ambient thermal resistance 157.7 42.8 C/W RJC(top) Junction-to-case (top) thermal resistance 50.2 41.5 C/W RJB Junction-to-board thermal resistance 77.9 20.1 C/W JT Junction-to-top characterization parameter 4.5 0.4 C/W JB Junction-to-board characterization parameter 76.5 20.2 C/W RJC(bot) Junction-to-case (bottom) thermal resistance n/a 4.5 C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 LM5009 www.ti.com SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 6.5 Electrical Characteristics Typical limits are for TJ = 25C only, and all maximum and minimum limits apply over the junction temperature (TJ) range of -40C to +125C. Minimum and maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 48 V and RON = 200 k. (1). PARAMETER TEST CONDITIONS MIN TYP MAX 7 7.4 UNIT VCC SUPPLY VCC reg VCC regulator output 6.6 V VCC current limit (2) 9.5 mA VCC undervoltage lockout voltage (VCC increasing) 6.3 V VCC undervoltage hysteresis 200 mV VCC UVLO delay (filter) 100-mV overdrive IIN operating current Non-switching, FB = 3 V IIN shutdown current RON/SD = 0 V 10 s 485 675 A 76 150 A 2.0 4.4 4.5 5.5 SWITCH CHARACTERISTICS Buck switch Rds(on) ITEST = 200 mA (3) Gate drive UVLO VBST - VSW rising 3.4 Gate drive UVLO hysteresis 430 V mV CURRENT LIMIT Current limit threshold 0.25 Current limit response time Iswitch overdrive = 0.1-A time to switch off OFF time generator (test 1) FB = 0 V, RCL = 100 k OFF time generator (test 2) FB = 2.3 V, RCL = 100 k 0.31 0.37 A 400 ns 35 s 2.56 s ON TIME GENERATOR TON - 1 VIN = 10 V, RON = 200 k 2.15 2.77 TON - 2 VIN = 95 V, RON = 200 k 200 Remote shutdown threshold Rising 0.4 Remote shutdown hysteresis 3.5 s 300 420 ns 0.7 1.05 V 35 mV 300 ns MINIMUM OFF TIME Minimum off timer FB = 0 V REGULATION AND OV COMPARATORS FB reference threshold Internal reference, trip point for switch on FB overvoltage threshold Trip point for switch off FB bias current 2.445 2.5 2.550 V 2.875 V 1 nA 165 C 25 C THERMAL SHUTDOWN Tsd Thermal shutdown temperature Thermal shutdown hysteresis (1) (2) (3) All electrical characteristics having room temperature limits are tested during production with TA = TJ = 25C. All hot and cold limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control. The VCC output is intended as a self bias for the internal gate drive power and control circuits. Device thermal limitations limit external loading. For devices procured in the WSON-8 package, the Rds(on) limits are specified by design characterization data only. Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 5 LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 www.ti.com 6.6 Typical Characteristics 10 7.1 FS = 180 kHz 6.9 Ron = 500k VCC (V) ON-TIME (Ps) 7.0 1.0 400 kHz 6.8 725 kHz 300k 1.2 MHz 6.7 100k 6.6 0.1 20 0 40 60 80 6.5 9.0 100 9.5 10.0 Figure 2. VCC vs VIN and FS Figure 1. On-Time vs VIN and RON 35 8 30 7 VIN t 15V VIN = 9.5V 6 25 RCL = 500k 10V 5 20 VCC (V) CURRENT LIMIT OFF TIME (Ps) 11.0 10.5 VIN (V) VIN (V) 15 4 3 300k 10 2 100k 5 1 50k 0 0 0 0.5 1.0 1.5 2.0 0 2.5 2 VFB (V) 4 6 8 10 ICC (mA, External Load) Figure 3. Current Limit Off-Time vs VFB and RCL Figure 4. VCC vs ICC and VIN 4.0 ICC INPUT CURRENT (mA) 3.5 FS = 1.2 MHz 3.0 FS = 725 kHz 2.5 FS = 400 kHz 2.0 1.5 1.0 FS = 180 kHz 0.5 0 8 9 10 11 12 13 14 EXTERNALLY APPLIED VCC (V) Figure 5. ICC Current vs Applied VCC Voltage 6 Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 LM5009 www.ti.com SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 7 Detailed Description 7.1 Overview The LM5009 step-down switching regulator features all the functions needed to implement a low-cost, efficient, buck bias power converter. This high-voltage regulator contains a 100-V N-channel buck switch, is easy to implement, and is provided in VSSOP-8 and thermally-enhanced, WSON-8 packages. The regulator is based on a control scheme using an on-time inversely proportional to VIN. The control scheme requires no loop compensation. Current limit is implemented with forced off-time that is inversely proportional to VOUT. This scheme ensures short-circuit protection and provides minimum foldback. The functional block diagram of the LM5009 is shown in the Functional Block Diagram section. The LM5009 can be applied in numerous applications to efficiently regulate down higher voltages. This regulator is well-suited for 48-V telecom and 42-V automotive power bus ranges. Additional features include: thermal shutdown, VCC undervoltage lockout, gate drive undervoltage lockout, maximum duty cycle limit timer, and the intelligent current limit off timer. 7.2 Functional Block Diagram 7V SERIES REGULATOR 9.5V - 95V Input LM5009 VCC 8 VIN C1 SD C5 ON TIMER START COMPLETE 6 SD/ RON BST Ron OVER-VOLTAGE COMPARATOR SHUTDOWN + - 2.875V START UVLO MINIMUM OFF-TIMER 5 FB FB 3 RCL S REGULATION COMPARATOR R SET CLR L1 SW 1 VOUT1 Q Q R1 COMPLETE RCL START CURRENT LIMIT OFF TIMER RCL C4 DRIVER LEVEL SHIFT + - 2 VIN SD COMPLETE 2.5V 4 C3 THERMAL SHUTDOWN UVLO RON 7 + 0.31A BUCK SWITCH CURRENT SENSE R3 VOUT2 D1 RTN R2 C2 7.3 Feature Description 7.3.1 Control Circuit Overview The LM5009 is a buck dc-dc regulator that uses a control scheme where the on-time varies inversely with line voltage (VIN). Control is based on a comparator and the on-time one-shot, with the output voltage feedback (FB) compared to an internal reference (2.5 V). If the FB level is below the reference, then the buck switch is turned on for a fixed time determined by the line voltage and a programming resistor (RON). Following the on period, the switch remains off for at least the minimum off-timer period of 300 ns. If FB is still below the reference at that time, then the switch turns on again for another on-time period. This cycle continues until regulation is achieved, at which time the off-time increases based on the required duty cycle. Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 7 LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 www.ti.com Feature Description (continued) The LM5009 operates in discontinuous conduction mode at light load currents, and continuous conduction mode at heavy load current. In discontinuous conduction mode, current through the output inductor starts at zero and ramps up to a peak during the on-time, then ramps back to zero before the end of the off-time. The next on-time period starts when the voltage at FB falls below the internal reference--until then, the inductor current remains zero. In this mode the operating frequency is lower than in continuous conduction mode, and varies with load current. Therefore, at light loads the conversion efficiency is maintained because the switching losses reduce with the reduction in load and frequency. The discontinuous operating frequency can be calculated as by Equation 1: VOUT2 x L x 1.28 x 1020 F= RL x (RON)2 where * RL = the load resistance (1) In continuous conduction mode, current flows continuously through the inductor and never ramps down to zero. In this mode, the operating frequency is greater than the discontinuous mode frequency and remains relatively constant with load and line variations. The approximate continuous mode operating frequency can be calculated by Equation 2: VOUT F= 1.25 x 10-10 x RON (2) The output voltage (VOUT) is programmed by two external resistors; see the Functional Block Diagram section. The regulation point is calculated by Equation 3: VOUT = 2.5 x (R1 + R2) / R2 (3) This regulator regulates the output voltage based on ripple voltage at the feedback input, requiring a minimum amount of equivalent series resistance (ESR) for the output capacitor C2. A minimum of 25 mV of ripple voltage at the feedback pin (FB) is required for the LM5009. In cases where the capacitor ESR is too small, additional series resistance may be required (see R3 in the Functional Block Diagram section). For applications where lower output voltage ripple is required, the output can be taken directly from a low-ESR output capacitor, as shown in Figure 6. However, R3 slightly degrades the load regulation. L1 SW LM5009 R1 R3 FB VOUT2 R2 C2 Figure 6. Low Ripple Output Configuration 7.3.2 High Voltage Startup Regulator The LM5009 contains an internal high voltage startup regulator. The input pin (VIN) can be connected directly to line voltages up to 95 V, with transient capability to 100 V. The regulator is internally current limited at 9.5 mA. Upon power-up, the regulator sources current into the external capacitor at VCC (C3). When the voltage on the VCC pin reaches the undervoltage lockout threshold of 6.3 V, the buck switch is enabled. 8 Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 LM5009 www.ti.com SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 Feature Description (continued) In applications involving a high value for VIN, where power dissipation in the VCC regulator is a concern, an auxiliary voltage can be diode connected to the VCC pin. Setting the voltage between 8 V and 14 V shuts off the internal regulator, reducing internal power dissipation, as shown in Figure 7. The current required into the VCC pin is illustrated in the Typical Characteristics section. VCC C3 BST C4 LM5009 L1 D2 SW VOUT1 D1 R1 R3 R2 C2 FB Figure 7. Self-Biased Configuration 7.3.3 Regulation Comparator The feedback voltage at FB is compared to an internal 2.5-V reference. In normal operation (the output voltage is regulated), an on-time period is initiated when the voltage at FB falls below 2.5 V. The buck switch stays on for the programmed on-time, causing the FB voltage to rise above 2.5 V. After the on-time period, the buck switch stays off until the FB voltage again falls below 2.5 V. During start-up, the FB voltage is below 2.5 V at the end of each on-time, resulting in the minimum off-time. Bias current at the FB pin is less than 5 nA over temperature. 7.3.4 Overvoltage Comparator The feedback voltage at FB is compared to an internal 2.875-V reference. If the voltage at FB rises above 2.875 V, then the on-time pulse is immediately terminated. This condition can occur if the input voltage, or the output load, changes suddenly. The buck switch does not turn on again until the voltage at FB falls below 2.5 V. 7.3.5 On-Time Generator The on-time for the LM5009 is determined by the RON resistor, and is inversely proportional to the input voltage (VIN), resulting in a nearly constant frequency because VIN is varied over its range. The on-time equation is shown in Equation 4: TON = 1.25 x 10-10 x RON / VIN (4) Select RON for a minimum on-time (at maximum VIN) greater than 250 ns, for proper current limit operation. This requirement limits the maximum frequency for each application, depending on VIN and VOUT. Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 9 LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 www.ti.com Feature Description (continued) 7.3.6 Current Limit The LM5009 contains an intelligent current limit off timer. If the current in the buck switch exceeds 0.31 A, then the present cycle is immediately terminated and a non-resettable off timer is initiated. The length of off-time is controlled by an external resistor (RCL) and the FB voltage. When FB = 0 V, a maximum off-time is required and the time is preset to 35 s. This condition occurs when the output is shorted and during the initial part of start-up. This amount of time ensures safe short-circuit operation up to the maximum input voltage of 95 V. In cases of overload where the FB voltage is above 0 V (not a short-circuit) the current limit off-time is less than 35 s. Reducing the off-time during less severe overloads reduces the amount of foldback, recovery time, and start-up time. The off-time is calculated from Equation 5: 10 TOFF = -5 VFB 0.285 + -6 (6.35 x 10 x RCL) (5) The current limit sensing circuit is blanked for the first 50 ns to 70 ns of each on-time so it is not falsely tripped by the current surge that occurs at turn-on. The current surge is required by the recirculating diode (D1) for its turnoff recovery. 7.3.7 N-Channel Buck Switch and Driver The LM5009 integrates an N-channel buck switch and associated floating high-voltage gate driver. The gate driver circuit works in conjunction with an external bootstrap capacitor and an internal high-voltage diode. A 0.022F ceramic capacitor (C4) connected between the BST pin and SW pin provides the voltage to the driver during the on-time. During each off-time, the SW pin is at approximately -1 V, and the bootstrap capacitor charges from VCC through the internal diode. The minimum off timer ensures a minimum time for each cycle to recharge the bootstrap capacitor. An external re-circulating diode (D1) carries the inductor current after the internal buck switch turns off. This diode must be of the ultra-fast or Schottky type to minimize turn-on losses and current overshoot. 7.3.8 Thermal Protection Operate the LM5009 so that the junction temperature does not exceed 125C during normal operation. An internal thermal shutdown circuit is provided to protect the LM5009 in the event of a higher than normal junction temperature. When activated, typically at 165C, the controller is forced into a low-power reset state, disabling the buck switch. This feature prevents catastrophic failures from accidental device overheating. When the junction temperature reduces below 140C (typical hysteresis = 25C), the buck switch is enabled and normal operation is resumed. 7.4 Device Functional Modes The LM5009 can be remotely disabled by taking the RON/SD pin to ground, as shown in Figure 8. The voltage at the RON/SD pin is between 1.7 V and 5 V, depending on VIN and the value of the RON resistor. Input Voltage VIN RON LM5009 RON/SD STOP RUN Figure 8. Shutdown Implementation 10 Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 LM5009 www.ti.com SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LM5009 is a non-synchronous buck regulator designed to operate over a wide input voltage range and output current. Spreadsheet-based quick-start calculation tools and the on-line WEBENCH(R) software can be used to create a buck design along with the bill of materials, estimated efficiency, and the complete solution cost. 8.2 Typical Application A typical buck application circuit with the LM5009 is shown in Figure 9. The circuit can operate over a wide input voltage range of 9.5 V to 95 V and provides a stable output of 10 V over the load current being varied from 50 mA to 200 mA. The resulting curves are shown in Figure 10 through Figure 13. 9. 5 - 95V Input VIN VCC C3 LM5009 C1 BST R ON C4 RON/SD L1 SW VOUT SHUTDOWN D1 RCL R CL C2 R1 FB RTN R2 Figure 9. Typical Buck Application Circuit 8.2.1 Design Requirements A typical buck application circuit with the LM5009 can be summarized by the operating conditions listed in Table 1. Table 1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Input voltage range 9.5 V to 95 V Output voltage 10 V Load current range 50 mA to 200 mA Nominal switching frequency 330 kHz Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 11 LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 www.ti.com 8.2.2 Detailed Design Procedure 8.2.2.1 Output Resistor Divider Selection R1 and R2: From the Functional Block Diagram section, VOUT1 can be determined to be equal to VFB x (R1 + R2) / R2, and because VFB = 2.5 V, the ratio of R1 to R2 calculates as 3:1. Standard values of 3.01 k (R1) and 1.00 k (R2) are chosen. Other values can be used as long as the 3:1 ratio is maintained. The selected values, however, provide a small amount of output loading (2.5 mA) in the event that the main load is disconnected and allows the circuit to maintain regulation until the main load is reconnected. 8.2.2.2 Frequency Selection Fs and RON: Unless the application requires a specific frequency, the choice of frequency is generally a compromise because the size of L1 and C2, and the switching losses are affected. The maximum-allowed frequency, based on a minimum on-time of 250 ns, is calculated by Equation 6: FMAX = VOUT / (VINMAX x 250 ns) (6) For this exercise, FMAX = 444 kHz. From Equation 2, RON calculates to 180 k. A standard-value, 237-k resistor is used to allow for tolerances in Equation 2, resulting in a nominal frequency of 337 kHz. 8.2.2.3 Inductor Selection L1: The main parameter affected by the inductor is the output current ripple amplitude. The choice of inductor value therefore depends on both the minimum and maximum load currents, keeping in mind that the maximum ripple current occurs at maximum VIN. a. Minimum load current: To maintain continuous conduction at minimum IO (100 mA), the ripple amplitude (IOR) must be less than 200 mA peak-to-peak so the lower peak of the waveform does not reach zero. L1 is calculated using Equation 7: VOUT1 x (VIN - VOUT1) L1 = IOR x Fs x VIN (7) At VIN = 90 V, L1 (min) calculates to 132 H. The next larger standard value (150 H) is chosen and, with this value, IOR calculates to 176 mA peak-to-peak at VIN = 90 V and 33 mA peak-to-peak at VIN = 12 V. b. Maximum load current: At a load current of 150 mA, the peak of the ripple waveform must not reach the minimum value of the LM5009 current limit threshold (250 mA). Therefore, the ripple amplitude must be less than 200 mA peak-to-peak, which is already satisfied in Equation 7. With L1 = 150 H, at maximum VIN and IO, the peak of the ripple is 238 mA. Although L1 must carry this peak current without saturating or exceeding its temperature rating, L1 must also be capable of carrying the maximum value of the LM5009 current limit threshold (370 mA) without saturating because the current limit is reached during startup. 8.2.2.4 VCC and Bootstrap Capacitor C3: The capacitor on the VCC output provides not only noise filtering and stability, but also prevents false triggering of the VCC UVLO at the buck switch on and off transitions. For this reason, C3 must be no smaller than 0.1 F. C4: The recommended value is 0.022 F for C4 because this value is appropriate in the majority of applications. A high-quality ceramic capacitor, with low ESR is recommended because C4 supplies the surge current to charge the buck switch gate at turn-on. A low ESR also ensures a quick recharge during each off-time. At minimum VIN when the on-time is at maximum, C4 can possibly not fully recharge at start-up during each 300-ns off-time. This failure to recharge results from the circuit being unable to complete the start-up and achieve output regulation. This condition can occur when the frequency is intended to be low (for example, RON = 500 k). In this case, increase C4 to maintain sufficient voltage across the buck switch driver during each on-time. 12 Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 LM5009 www.ti.com SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 8.2.2.5 Output Capacitor Selection C2 and R3: When selecting the output filter capacitor C2, the items to consider are ripple voltage resulting from the C2 ESR, ripple voltage resulting from the C2 capacitance, and the nature of the load. a. ESR and R3: A low ESR for C2 is generally desirable to minimize power losses and heating within the capacitor. However, this regulator requires a minimum amount of ripple voltage at the feedback input for proper loop operation. For the LM5009, the minimum ripple required at pin 5 is 25 mV peak-to-peak, requiring a minimum ripple at VOUT1 of 100 mV. The minimum ESR required at VOUT1 is 3 because the minimum ripple current (at minimum VIN) is 33 mA peak-to-peak. R3 is inserted as illustrated in the Functional Block Diagram section because quality capacitors for SMPS applications have considerably less ESR. The value of R3, along with the ESR of C2, must result in at least a 25-mV peak-to-peak ripple at pin 5. Generally, R3 is 0.5 to 5.0 . b. Nature of the load: The load can be connected to VOUT1 or VOUT2. VOUT1 provides good regulation, but with a ripple voltage that ranges from 100 mV (at VIN = 12 V) to 580 mV (at VIN = 90 V). Alternatively, VOUT2 provides low ripple (3 mV to 13 mV) but lower regulation resulting from R3. C2 generally must be no smaller than 3.3 F. Typically, the value of C2 is 10 F to 20 F, with the optimum value determined by the load. If the load current is fairly constant, a small value suffices for C2. If the load current includes significant transients, a larger value is necessary. For each application, experimentation is needed to determine the optimum values for R3 and C2. c. Ripple reduction: The ripple amplitude at VOUT1 can be reduced by reducing R3 and by adding a capacitor across R1 to transfer the ripple at VOUT1 directly to the FB pin without attenuation. The new value of R3 is calculated by Equation 8: R3 = 25 mV / IOR(min) where * IOR(min) is the minimum ripple current amplitude--33 mAp-p in this example (8) The added capacitor value is calculated by Equation 9: C = TON(max) / (R1 // R2) where * TON(max) is the maximum on-time (at minimum VIN) (9) The selected capacitor must be larger than the value calculated in Equation 9. 8.2.2.6 Current Limit Off-Timer Setting RCL: When a current limit condition is detected, the minimum off-time set by this resistor must be greater than the maximum normal off-time that occurs at maximum VIN. Using Equation 4, the minimum on-time is 0.329 s, yielding a maximum off-time of 2.63 s. This value is further increased by 82 ns (to 2.72 s), resulting from a 25% tolerance of the on-time. This value is then increased to allow for the response time of the current limit detection loop (400 ns). The off-time determined by Equation 5 has a 25% tolerance, as given by Equation 10: tOFFCL(MIN) = (2.72 s x 1.25) + 0.4 s = 3.8 s (10) Using Equation 5, RCL calculates to 167 k (at VFB = 2.5 V). The closest standard value is 169 k. Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 13 LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 www.ti.com 8.2.2.7 Rectifier Diode Selection D1: The important parameters are reverse recovery time and forward voltage. Reverse recovery time determines how long the reverse current surge lasts each time that the buck switch is turned on. The forward voltage drop is significant in the event that the output is short-circuited because only this diode voltage forces the inductor current to reduce during the forced off-time. For this reason, a higher voltage is better, although higher voltages affect efficiency. A good choice is an ultrafast or Schottky diode with a reverse recovery time of approximately 30 ns and a forward voltage drop of approximately 0.7 V. Other types of diodes can have a lower forward voltage drop, but can also have longer recovery times or greater reverse leakage. The D1 reverse voltage rating must be at least as great as the maximum VIN, and the D1 current rating must be greater than the maximum current limit threshold (370 mA). 8.2.2.8 Input Capacitor Selection C1: The purpose of this capacitor is to supply most of the switch current during the on-time and to limit the voltage ripple at VIN, on the assumption that the voltage source feeding VIN has an output impedance greater than zero. At maximum load current, when the buck switch turns on, the current into pin 8 suddenly increases to the lower peak of the output current waveform, ramps up to the peak value, and then drops to zero at turn-off. The average input current during this on-time is the load current (150 mA). For a worst-case calculation, C1 must supply this average load current during the maximum on-time. To keep the input voltage ripple to less than 2 V (for this exercise), C1 calculates to Equation 11: C1 = I x tON 'V = 0.15A x 2.47 Ps 2.0V = 0.185 PF (11) Quality ceramic capacitors in this value have a low ESR that adds only a few millivolts to the ripple. The capacitance is dominant in this case. To allow for the capacitor tolerance, temperature effects, and voltage effects, a 1.0-F, 100-V, X7R capacitor is used. C5: This capacitor helps avoid supply voltage transients and ringing resulting from long lead inductance at VIN. A low-ESR, 0.1-F ceramic chip capacitor is recommended, located close to the LM5009. 14 Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 LM5009 www.ti.com SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 8.2.2.9 Ripple Configuration The LM5009 uses a constant-on-time (COT) control scheme where the on-time is terminated by a one-shot and the off-time is terminated by the feedback voltage (VFB) falling below the reference voltage. Therefore, for stable operation, the feedback voltage must decrease monotonically in phase with the inductor current during the offtime. Furthermore, this change in feedback voltage (VFB) during off-time must be large enough to dominate any noise present at the feedback node. Table 2 presents three different methods for generating appropriate voltage ripple at the feedback node. Type 1 and type 2 ripple circuits couple the ripple from the output of the converter to the feedback node (FB). The output voltage ripple has two components: 1. Capacitive ripple caused by the inductor current ripple charging or discharging the output capacitor. 2. Resistive ripple caused by the inductor current ripple flowing through the ESR of the output capacitor and R3. Table 2. Ripple Configuration TYPE 1 TYPE 2 TYPE 3 Lowest cost Reduced ripple Minimum ripple VOUT VOUT L1 VOUT L1 L1 R FB2 Cff R FB2 R3 To FB C OUT COUT R FB2 GND R FB1 GND 25 mV u VO VREF u 'IL1, min CA CB To FB R FB1 R3 t RA R3 C OUT To FB R FB1 GND Cff t 5 FSW u (RFB2 IIRFB1 ) R A CA t (12) R t 25 mV 3 'IL1, min (VIN, min VO ) u TON(@ VIN, min ) 25mV (14) (13) The capacitive ripple is out of phase with the inductor current. As a result, the capacitive ripple does not decrease monotonically during the off-time. The resistive ripple is in phase with the inductor current and decreases monotonically during the off-time. The resistive ripple must exceed the capacitive ripple at output (VOUT) for stable operation. If this condition is not satisfied, then unstable switching behavior is observed in COT converters with multiple on-time bursts in close succession followed by a long off-time. The type 3 ripple method uses a ripple injection circuit with RA, CA, and the switch node (SW) voltage to generate a triangular ramp. This triangular ramp is then ac-coupled into the feedback node (FB) using the capacitor CB. This circuit is suited for applications where low output voltage ripple is imperative because this circuit does not use the output voltage ripple. See application note AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator Designs, SNVA166 for more details on each ripple generation method. Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 15 LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 www.ti.com 8.2.3 Application Curves 100 100 Vin = 12V EFFICIENCY (%) EFFICIENCY (%) 80 Vin = 48V 70 IOUT = 200 mA 90 90 Vin = 30V Vin = 90V 80 IOUT = 100 mA 70 60 60 50 50 50 100 150 200 0 20 LOAD CURRENT (mA) 60 80 100 VIN (V) Figure 10. Efficiency vs Load Current and VIN Figure 11. Efficiency vs VIN and Load Current 330 LOAD CURRENT @ CURRENT LIMIT ONSET (mA) 10.4 10.2 VOUT (V) 40 10.0 9.8 9.6 Vin = 48V 9.4 310 290 270 250 230 50 100 150 200 LOAD CURRENT (mA) 0 20 40 60 80 100 VIN (V) Figure 12. VOUT vs Load Current Figure 13. Current Limit vs VIN 8.3 Do's and Don'ts A minimum load current of 1 mA is required to maintain proper operation. If the load current falls below that level, the bootstrap capacitor can discharge during the long off-time and the circuit either shuts down or cycles on and off at a low frequency. If the load current is expected to drop below 1 mA in the application, choose the feedback resistors to be low enough in value to provide the minimum required current at nominal VOUT. 9 Power Supply Recommendations The LM5009 is designed to operate with an input power supply capable of supplying a voltage range between 9 V and 95 V. The input power supply must be well-regulated and capable of supplying sufficient current to the regulator during peak load operation. Also, like in all applications, the power-supply source impedance must be small compared to the module input impedance to maintain the stability of the converter. 16 Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 LM5009 www.ti.com SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 10 Layout 10.1 Layout Guidelines The LM5009 regulation and overvoltage comparators are very fast, and as such respond to short-duration noise pulses. Layout considerations are therefore critical for optimum performance. The components at pins 1, 2, 3, 5, and 6 must be as physically close as possible to the device, thereby minimizing noise pickup in the PC tracks. The two major current loops conduct currents that switch very fast and, therefore, those loops must be as small as possible to minimize conducted and radiated electromagnetic interference (EMI). The first loop is formed by CIN, through the VIN to SW pins, LIND, COUT, and back to CIN. The second current loop is formed by D1, LIND, and COUT. If the internal dissipation of the LM5009 produces excessive junction temperatures during normal operation, good use of the PC board ground plane can help considerably to dissipate heat. The exposed pad on the bottom of the WSON-8 package can be soldered to a ground plane on the PC board, and that plane must extend out from beneath the device to help dissipate heat. Additionally, the use of wide PC board traces, where possible, can also help conduct heat away from the device. Judicious positioning of the PC board within the end product, along with the use of any available air flow (forced or natural convection) can help reduce the junction temperatures. 10.2 Layout Example VOUT CA COUT LIND D1 GND Cbyp RA CIN SW SW LM5009 VIN VLINE CBST VCC BST Exp Thermal Pad RON RCL RON RTN FB CVCC RFB2 GND CB RFB1 Via to Ground Plane Figure 14. LM5009 Buck Layout Example with the WSON Package Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 17 LM5009 SNVS402H - FEBRUARY 2006 - REVISED OCTOBER 2015 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation Application note AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator Designs, SNVA166 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2ETM Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.3 Trademarks E2E is a trademark of Texas Instruments. WEBENCH is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 18 Submit Documentation Feedback Copyright (c) 2006-2015, Texas Instruments Incorporated Product Folder Links: LM5009 PACKAGE OPTION ADDENDUM www.ti.com 24-Sep-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM5009MM NRND VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 125 SLLB LM5009MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SLLB LM5009MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SLLB LM5009SDC/NOPB ACTIVE WSON NGU 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 5009SD LM5009SDCX/NOPB ACTIVE WSON NGU 8 4500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 5009SD (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 24-Sep-2015 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 24-Sep-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM5009MM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM5009MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM5009MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM5009SDC/NOPB WSON NGU 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM5009SDCX/NOPB WSON NGU 8 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Sep-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5009MM VSSOP DGK 8 1000 210.0 185.0 35.0 LM5009MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM5009MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM5009SDC/NOPB WSON NGU 8 1000 210.0 185.0 35.0 LM5009SDCX/NOPB WSON NGU 8 4500 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA NGU0008B SDC08B (Rev A) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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