FXLN8371QR1 - FREESCALE SEMICONDUCTOR

Xtrinsic FXLN83xxQ 3-Axis Low-

Power Analog-Output Accelerometer

FXLN83xxQ is a family of 3-axis, low-power, low-g, analog-

output accelerometers that consist of an acceleration sensor

along with a CMOS signal conditioning and control ASIC in a

3x3x1mm QFN package. The analog outputs for the X, Y, and Z

axes are internally compensated for zero-g offset and sensitivity,

and then buffered to the output pads. The outputs have a fixed

zero-g offset of 0.75V, irrespective of the VDD supply voltage.

The bandwidth of the output signal for each axis may be

independently adjusted using external capacitors. The host can

place the FXLN83xxQ into a low-current shutdown mode to

conserve power.

Features

• Supply voltage (VDD) from 1.71 V to 3.6 V

• Accelerometer operating ranges selectable

• ±2 g or ±8 g (FXLN83x1Q)

• ±4 g or ±16 g (FXLN83x2Q)

• Low current consumption of 180 μA (typical)

• Output Bandwidth Options

• High bandwidth, 2.7 kHz (XY axes), 600 Hz (Z axis),

(FXLN837XQ)

• Low bandwidth, 1.1 kHz (XY axes), 600 Hz (Z axis),

(FXLN836XQ)

• 3 x 3 x 1 mm, 12-pin QFN package (0.65 mm lead pitch)

• Robust design with high shock survivability (10,000 g)

• Operating temperature from –40 °C to +105 °C

• MSL 1 compliant

Typical Applications

• Tamper detection

• White goods: tilt, vibration, and shake detection

• Motion sensing in robotics applications

• Inclinometer, vibrometer

• Activity monitoring in sports and medical devices

FXLN83xxQ

12-pin QFN

3 mm x 3 mm x 1 mm

Case 2300-01

Top View

VDD

BYP

YOUT

XOUT

GND

g-Select GND

NC NC

ZOUT

Pin Connections

Freescale Semiconductor, Inc. FXLN83xxQ

Data Sheet: Technical Data Rev 2.0, 7/2014

Freescale reserves the right to change the detail specifications as may be required to permit

reserved.

Ordering Information

Part Number Operating Range Bandwidth Temperature

Range

Package

Description

Shipping

FXLN8361QR1 ±2/8 gLow –40 °C to +105 °C QFN-12 Tape and reel (1 k)

FXLN8362QR1 ±4/16 gLow –40 °C to +105 °C QFN-12 Tape and reel (1 k)

FXLN8371QR1 ±2/8 gHigh –40 °C to +105 °C QFN-12 Tape and reel (1 k)

FXLN8372QR1 ±4/16 gHigh –40 °C to +105 °C QFN-12 Tape and reel (1 k)

Related Documentation

The FXLN83xxQ device features and operations are described in a variety of reference manuals, user guides,

and application notes. To find the most-current versions of these documents:

1. Go to the Freescale homepage at freescale.com.

2. In the Keyword search box at the top of the page, enter the device number FXLN83xxQ.

3. In the Refine Your Result pane on the left, click on the Documentation link.

2Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

Table of Contents

1 General Description......................................................................... 4

1.1 Block Diagram.........................................................................4

1.2 Pin Descriptions.......................................................................4

1.3 Typical Application Circuit..................................................... 6

1.4 Sensing Direction and Output Response................................. 6

2 Device Characteristics..................................................................... 8

2.1 Absolute Maximum Ratings.................................................... 8

2.2 Mechanical Specifications ...................................................... 9

2.3 Electrical Specifications ......................................................... 10

3 Printed Circuit Board Layout and Device Mounting.......................11

3.1 Printed Circuit Board Layout...................................................11

3.2 Overview of Soldering Considerations....................................12

3.3 Halogen Content...................................................................... 13

4 Package Information........................................................................ 13

4.1 Device Marking....................................................................... 13

4.2 Tape and Reel Information...................................................... 13

4.3 Package Description................................................................ 14

5 Revision History.............................................................................. 17

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

1 General Description

1.1 Block Diagram

G-cell

Gain

Z+

Z-

Digital Logic

and

Control

MUX

X+ Y+

X- Y-

C2V

XOUT

YOUT

ZOUT

g-Select

VDD

BYP

ClockSelf TestReferences

10 KΩ

MUX

D2SAAF

aX,aY,aZ

Figure 1. FXLN83xxQ block diagram

General Description

4Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

1.2 Pin Descriptions

VDD

BYP

YOUT

XOUT

GND

g-Select GND

NC NC

ZOUT

Figure 2. Pin locations

Table 1. Pin descriptions

Pin Name Description I/O

1 BYP Internal voltage regulator output capacitor connection Output

2 VDD Supply voltage Power

3 ST1Self-Test

• When ST pin is logic high, the accelerometer is put into self-test mode.

• When ST pin is logic low, the accelerometer is put into normal operating mode.

Input

4 EN Power enable pin

• When the EN pin is logic low, the accelerometer is shut down, minimizing current

consumption.

• When the EN pin is logic high, the accelerometer is fully functional.

Input

5 g-Select Full Scale Range selection:

For part numbers FXLN8361QR1 & FXLN8371QR1:

• When the g-select pin is logic low, the accelerometer is in ±8 g mode

• When the g-select pin is logic high, the accelerometer is in ±2 g mode

For part numbers FXLN8362QR1 & FXLN8372QR1:

• When the g-select pin is logic low, the accelerometer is in ±16 g mode

• When the g-select pin is logic high, the accelerometer is in ±4 g mode

Input

6 GND Ground Ground

7 GND Ground Ground

8 ZOUT Z-axis analog output Output

9 YOUT Y-axis analog output Output

10 XOUT X-axis analog output Output

11 NC No internal connection, may be left floating or connected to GND —

12 NC No internal connection, may be left floating or connected to GND —

EP DNC Center pads should not be soldered, refer to Printed Circuit Board Layout and Device Mounting —

General Description

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

1. The Self-Test function verifies the correct functioning of the sensor and signal path without the need to apply a

mechanical stimulus. When Self-Test is activated, an electrostatic actuation force is applied to the sensor, simulating a

small acceleration.

1.3 Typical Application Circuit

SELF-TEST

ENABLE

RANGE SELECT

XOUT

YOUT

ZOUT

VDD

BYP

GND

VDD

XOUT 10

ZOUT 8

NC 12

YOUT 9

g-Select

GND 7

0.1μF

4.7μF

Notes:

. Position the decoupling capacitors (C2, C3) as near as

possible to the VDD pin (common practice to filter out

undesired noise from the power supply).

2. C1 is required to stabilize the output of the internal

voltage regulator.

3. Connecting the EN pin to the VDD pin is not a supported

configuration and may prevent the part from starting up.

Do not set the EN pin high until VDD > 1.71 V.

FXLN83xxQ

Part Number Bandwidth C4 (pF) C5 (pF) C6 (pF)

FXLN8361Q Low 9100 9100 9100

FXLN8362Q Low 9100 9100 9100

FXLN8371Q High 8200 3300 3300

FXLN8372Q High 8200 3300 3300

Recommended Minimum Capacitance Specifications

Figure 3. Electrical Connections

General Description

6Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

1.4 Sensing Direction and Output Response

263

P3XX

ALYM

263

P3XX

ALYM

Top View

Pin 1

Earth Gravity

Xout @ 0 g

Yout @ 0 g

Zout @ –1 g

BACK

FRONT

Side View

Xout @ 0 g

Yout @ 0 g

Zout @ 1 g

Top View

Xout @ 0 g

Yout @ –1 g

Zout @ 0 g

Xout @ 1 g

Yout @ 0 g

Zout @ 0 g

Xout @ 0 g

Yout @ 1 g

Zout @ 0 g

Xout @ –1 g

Yout @ 0 g

Zout @ 0 g

–1 g 0 g +1 g

XYZ Output Voltage

ModePart Number

FXLN8361Q, FXLN8371Q ±2 g 0.521 0.750 0.979

±8 g 0.693 0.750 0.807

±4 g 0.636 0.750 0.865

±16 g 0.722 0.750 0.779

FXLN8362Q, FXLN8372Q

Figure 4. Sensitive Axes Orientation and Response to Gravity Stimulus

General Description

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

2 Device Characteristics

2.1 Absolute Maximum Ratings

Absolute maximum ratings are the limits the device can be exposed to without

permanently damaging it. Absolute maximum ratings are stress ratings only; functional

operation at these ratings is not guaranteed. Exposure to absolute maximum ratings

conditions for extended periods may affect reliability.

This device contains circuitry to protect against damage due to high static voltage or

electrical fields. It is advised, however, that normal precautions be taken to avoid

application of any voltages higher than maximum-rated voltages to this high-impedance

circuit.

Table 2. Absolute maximum ratings

Rating Symbol Value Unit

Supply voltage VDD –0.3 to +3.6 V

Drop-test height, component Ddrop 1.8 m

Operating temperature range TOP –40 to +105 °C

Storage temperature range TSTG –40 to +125 °C

Table 3. ESD and latch-up protection characteristics

Rating Symbol Value Unit

Human body model (HBM) VHBM ±2000 V

Machine model (MM) VMM ±200 V

Charge device model (CDM) VCDM ±500 V

Latch-up current at T = 85 °C ILU ±100 mA

Caution

This device is sensitive to mechanical shock, improper handling can cause permanent damage to the part.

Caution

This is an ESD sensitive device, improper handling can cause permanent damage to the part.

Device Characteristics

8Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

2.2 Mechanical Specifications

Table 4. Mechanical characteristics

Parameter Symbol Test Conditions Min Typ Max Unit

Full scale range (FXLN83X1)

FSR

±2 g mode — ±2 —

±8 g mode — ±8 —

Full scale range (FXLN83X2) ±4 g mode — ±4 —

±16 g mode — ±16 —

Nominal sensitivity SEN

±2 g range — 229.0 —

mV/g

±4g range — 114.5 —

±8 g range — 57.25 —

±16 g range — 28.62 —

Calibrated sensitivity SENCAL

±2 g

VBYP/(3.276*gRange) V/g

±4 g

±8 g

±16 g

Calibrated sensitivity error SENERR

±2 g range –5 — +5 %

±4 g range –6 — +6

Sensitivity change vs.

temperature1TCS — –0.07 — +0.07 %/°C

Cross-axis sensitivity1CAS — –4.2 — +4.2 %

Self-test output change1STOC — 35(XY)

300(Z) — — mg

Zero-g level offset VOFF

±2 g range 0.705 0.75 0.795

±4 g range

0.7125 0.75 0.7875±8 g range

±16 g range

Zero-g level change vs.

temperature1TCO ±2 g range –1.2 — +1.2 mg/°C

±4 g range –2.0 — +2.0

Zero-g level offset, post board

mount1OFFPBM 1 mm (overall thickness),

2-layer, FR4-based PCB –200 — +200 mg

Noise Density1, 2ND

FXLN8371QR1,

FXLN8372QR1 —200(XY)

280(Z) — µg/√Hz

FXLN8361QR1,

FXLN8362QR1 —130(XY)

200(Z) — µg/√Hz

Operating temperature range1TOP — –40 — +105 °C

Notes:

Test conditions (unless otherwise noted):

• VDD = 2.8 V, unless otherwise noted

• T = 25 °C, ±2 g range (for ±2/8 g product), ±4 g range (for ±4/16 g product)

Device Characteristics

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

Table 4. Mechanical characteristics

• Analog acceleration output pin loading = 3.3 nF capacitors on X and Y axes, with 8.2 nF capacitor on Z axis (HBW

configuration)

• Analog acceleration output pin loading = 9.1 nF capacitors on X, Y and Z axes (LBW configuration)

• No analog acceleration output pin loading other than external BW setting capacitor

• No BYP pin loading other than bypass capacitor and 150 μA DC current draw through resistive divider.

1. Limits verified by characterization only.

2. High and Low Bandwidth modes are configured in non-volatile Memory (NVM) at the factory

2.3 Electrical Specifications

Table 5. Electrical characteristics

Parameter Symbol Test Conditions Min Typ Max Unit

Supply voltage1VDD — 1.71 2.8 3.6 V

Active supply current IDD — — 180 — µA

Shutdown supply current IDD–SD — — 30 — nA

Voltage supplied at BYP pin1VBYP IBYP ≤ 150 µA 1.45 1.5 1.55 V

Output impedance (XYZ

outputs)1RO— 8 10 12 kΩ

Bandwidth1, 2, 3BW

High BW device — 2700(XY)

600(Z) —

Low BW device — 1100(XY)

600(Z) —

BYP output capacitor value CBYP External capacitor 70 100 500 nF

Logic high input level on EN, g-

Select, ST pins1VIH — 0.75 * VDD — VDD V

Logic low input level on EN, g-

Select, ST pins1VIL — 0 — 0.3 * VDD V

Turn-on time1, 2, 4TON — 660 — µs

g-Select transition delay3Tg-Select — 340 — µs

Operating temperature range1TOP — –40 — +105 °C

Notes:

Test conditions (unless otherwise noted):

• VDD = 2.8 V

• Output load = 3.3 nF capacitors on X and Y axes, with 8.2 nF capacitor on Z axis (HBW configuration)

• Output load = 9.1 nF capacitors on X, Y and Z axes (LBW configuration)

• Output loading other than external capacitor: high impedance

• No electrical loading on BYP pin other than output capacitor and 150 μA (max)

• DC output current for ADC reference input

• T = 25°C, ±2 g range (for ±2/8 g product), ±4 g range (for ±4/16 g product)

1. Limits verified by characterization only.

2. Apply VDD first. Then, Turn-on time is defined by the delay between when the EN pin is set to high and the time at

which a pin's output value reaches 90% of its final value.

3. g-Select pin transition from high to low. Time for output value to reach 90% of final value.

Device Characteristics

10 Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

4. BYP pin is not connected

3 Printed Circuit Board Layout and Device Mounting

Printed Circuit Board (PCB) layout and device mounting are critical to the overall

performance of the design. The footprint for the surface mount packages must be the

correct size as a base for a proper solder connection between the PCB and the

package. This, along with the recommended soldering materials and techniques, will

optimize assembly and minimize the stress on the package after board mounting.

Freescale application note AN1902, "Assembly Guidelines for QFN and DFN

Packages" discusses the QFN package used by the FXLN83xxQ.

3.1 Printed Circuit Board Layout

The following recommendations are a guide to an effective PCB layout. See Figure 5

for footprint dimensions.

• The PCB land should be designed with Non-Solder Mask Defined (NSMD) as

shown in Figure 5.

• No additional via pattern underneath package.

• No components or vias should be placed at a distance less than 2 mm from the

package land area. This may cause additional package stress if it is too close to

the package land area.

• Signal traces connected to pads should be as symmetric as possible. Put dummy

traces on the NC pads in order to have same length of exposed trace for all pads.

• No copper traces should be on the top layer of the PCB under the package. This

will cause planarity issues with board mount. Freescale QFN sensors are

compliant with Restrictions on Hazardous Substances (RoHS), having halide-free

molding compound (green) and lead-free terminations. These terminations are

compatible with tin-lead (Sn-Pb) as well as tin-silver-copper (Sn-Ag-Cu) solder

paste soldering processes. Reflow profiles applicable to those processes can be

used successfully for soldering the devices.

Printed Circuit Board Layout and Device Mounting

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

PCB land pad

Solder stencil opening

12X 0.686

12X 0.330

Solder mask opening

Package

Package footprint

12X 0.35

0.25

12X 0.5

0.3

2024

Package footprint

Red = Package footprint

Green = Solder paste stencil

Blue = PCB pad

Black = Solder mask opening

12X 0.889

12X 0.533

12X 0.635

12X 0.305

8X 0.325

4X 0.650

8X 0.325

4X 0.650

8X 0.325

4X 0.650

8X 0.325

4X 0.650

12X 0.3105

12X 0.4121

Figure 5. Footprint

3.2 Overview of Soldering Considerations

The information provided here is based on experiments executed on QFN devices.

These experiments cannot represent exact conditions present at a customer site.

Therefore, information herein should be used for guidance purposes only. Process and

design optimizations are recommended to develop an application-specific solution.

With the proper PCB footprint and solder stencil designs, the package will self-align

during the solder reflow process.

•Stencil thickness should be 100 or 125 µm.

• The PCB should be rated for the multiple lead-free reflow condition with a

maximum 260 °C temperature.

Printed Circuit Board Layout and Device Mounting

12 Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

• Use a standard pick-and-place process and equipment. Do not use a hand

soldering process.

• Do not use a screw-down or stacking to mount the PCB into an enclosure. These

methods could bend the PCB, which would put stress on the package.

3.3 Halogen Content

This package is designed to be Halogen Free, exceeding most industry and customer

standards. Halogen Free means that no homogeneous material within the assembly

package shall contain chlorine (Cl) in excess of 700 ppm or 0.07% weight/weight or

bromine (Br) in excess of 900 ppm or 0.09% weight/weight.

4 Package Information

The FXLN83xxQ device uses a 12-lead QFN package, case number 2300-01.

4.1 Device Marking

Top View

263

P3XX

ALYW

Traceability date code

Assembly site

Lot code

Work week

Part number

P3XX

Freescale code

P = Prototype, 8 = Production

71, 72, 61, or 62

Figure 6. Device Marking Description

Package Information

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

4.2 Tape and Reel Information

Figure 7. Tape dimensions

Barcode label

side of reel

Pin 1

Direction

to unreel

Figure 8. Tape and reel orientation

Package Information

14 Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

4.3 Package Description

Package Information

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

This drawing is located at freescale.com.

Package Information

16 Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

5 Revision History

Revision

number Revision date Description

1.0 11/2013 Initial release.

1.1 7/2014 Revised to match current Freescale standard

Figure 3, added note #3

2.0 7/2014 Changed document type from Advance Information to Technical Data

Revision History

Xtrinsic FXLN83xxQ 3-Axis Low-Power Analog-Output Accelerometer, Rev2.0,

7/2014.

Freescale Semiconductor, Inc.

How to Reach Us:

Home Page:

freescale.com

Web Support:

freescale.com/support

Information in this document is provided solely to enable system and

software implementers to use Freescale products. There are no express

or implied copyright licenses granted hereunder to design or fabricate

any integrated circuits based on the information in this document.

Freescale reserves the right to make changes without further notice to

any products herein.

Freescale makes no warranty, representation, or guarantee regarding

the suitability of its products for any particular purpose, nor does

Freescale assume any liability arising out of the application or use of

any product or circuit, and specifically disclaims any and all liability,

including without limitation consequential or incidental damages.

“Typical” parameters that may be provided in Freescale data sheets

and/or specifications can and do vary in different applications, and

actual performance may vary over time. All operating parameters,

including “typicals,” must be validated for each customer application by

customer's technical experts. Freescale does not convey any license

under its patent rights nor the rights of others. Freescale sells products

pursuant to standard terms and conditions of sale, which can be found

at the following address: freescale.com/SalesTermsandConditions.

Freescale, the Freescale logo, Xtrinsic, and the Energy Efficient

Solutions logo are trademarks of Freescale Semiconductor, Inc., Reg.

U.S. Pat. & Tm. Off. All other product or service names are the property

of their respective owners.

Document Number FXLN83xxQ

Revision 2.0, 7/2014