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ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. "Typical" parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FAN7382 High- and Low-Side Gate Driver Features Description Floating Channels Designed for Bootstrap Operation The FAN7382, a monolithic high and low side gate-drive IC, can drive MOSFETs and IGBTs that operate up to +600V. Fairchild's high-voltage process and commonmode noise canceling technique provides stable operation of the high-side driver under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS=-9.8V (typical) for VBS=15V. The input logic level is compatible with standard TTL-series logic gates. UVLO circuits for both channels prevent malfunction when VCC or VBS is lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for fluorescent lamp ballasts, PDP scan drivers, motor controls, etc. to +600V Typically 350mA/650mA Sourcing/Sinking Current Driving Capability for Both Channels Common-Mode dv/dt Noise Canceling Circuit Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VCC=VBS=15V VCC & VBS Supply Range from 10V to 20V UVLO Functions for Both Channels TTL Compatible Input Logic Threshold Levels Matched Propagation Delay Below 50nsec Output In-phase with Input Signal Applications PDP Scan Driver Fluorescent Lamp Ballast 8-SOP SMPS 8-DIP 14-SOP Motor Driver Ordering Information Part Number Package FAN7382N 8-DIP FAN7382M Pb-Free Operating Temperature Range Tube (1) FAN7382MX(1) FAN7382M1(1) (1) FAN7382M1X 8-SOP Packing Method Tube Yes 14-SOP -40C ~ 125C Tape & Reel Tube Tape & Reel Note: 1. These devices passed wave soldering test by JESD22A-111. (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 www.fairchildsemi.com FAN7382 High- and Low-Side Gate Driver February 2007 FAN7382 High- and Low-Side Gate Driver Typical Application Circuit 15V 600V RBOOT DBOOT 1 VCC VB 8 Q1 HIN 2 HIN HO 7 LIN 3 LIN VS 6 R1 CBOOT R2 Q2 C1 4 COM R3 LO 5 Load R4 FAN7382 Rev.05 Figure 1. Application Circuit for Half-Bridge Internal Block Diagram 8 VB 7 HO 6 VS 1 VCC 5 LO 4 COM UVLO HS(ON/OFF) 500K NOISE CANCELLER R DRIVER 2 PULSE GENERATOR HIN R S Q UVLO DELAY 3 DRIVER LS(ON/OFF) LIN 500K FAN7382 Rev.04 Figure 2. Functional Block Diagram (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 www.fairchildsemi.com 2 FAN7382N FAN7382M FAN7382M1 VCC 1 8 VB VCC 1 14 NC HIN 2 7 HO HIN 2 13 VB LIN 3 6 VS LIN 3 12 HO COM 4 5 LO NC 4 11 VS NC 5 10 NC COM 6 9 NC LO 7 8 NC FAN7382 Rev.05 FAN7382 Rev.01 Figure 3. Pin Configuration (Top View) Pin Definitions Name VCC Description Low-Side Supply Voltage HIN Logic Input for High-Side Gate Driver Output LIN Logic Input for Low-Side Gate Driver Output COM Logic Ground and Low-Side Driver Return LO Low-Side Driver Output VS High-Voltage Floating Supply Return HO High-Side Driver Output VB High-Side Floating Supply (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 www.fairchildsemi.com 3 FAN7382 High- and Low-Side Gate Driver Pin Assignments Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Characteristics VS High-side offset voltage VB High-side floating supply voltage Min. Max. VB-25 VB+0.3 -0.3 625 VS-0.3 VB+0.3 VHO High-side floating output voltage HO VCC Low-side and logic fixed supply voltage -0.3 25 VLO Low-side output voltage LO -0.3 VCC+0.3 VIN Logic input voltage (HIN, LIN) -0.3 VCC+0.3 VCC-25 VCC+0.3 8-SOP 0.625 14-SOP 1.0 8-DIP 1.2 COM Logic ground dVS/dt Allowable offset voltage slew rate PD(2)(3)(4) JA 50 Power dissipation Thermal resistance, junction-to-ambient 8-SOP 200 14-SOP 110 8-DIP 100 Unit V V/ns W C/W TJ Junction temperature 150 C TSTG Storage temperature 150 C Notes: 2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances. Recommended Operating Ratings The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. VB High-side floating supply voltage VS+10 VS+20 VS High-side floating supply offset voltage 6-VCC 600 VHO High-side (HO) output voltage VS VB VLO Low-side (LO) output voltage COM VCC VIN Logic input voltage (HIN, LIN) COM VCC VCC Low-side supply voltage 10 20 Ambient temperature -40 125 TA (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 Unit V C www.fairchildsemi.com 4 FAN7382 High- and Low-Side Gate Driver Absolute Maximum Ratings VBIAS (VCC, VBS)=15.0V, TA = 25C, unless otherwise specified. The VIN and IIN parameters are referenced to COM. The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO. Symbol Characteristics Test Condition Min. Typ. Max. VCCUV+ VBSUV+ VCC and VBS supply under-voltage positive going threshold 8.2 9.2 10.0 VCCUVVBSUV- VCC and VBS supply under-voltage negative going threshold 7.6 8.7 9.6 VCCUVH VCC supply under-voltage lockout VBSUVH hysteresis Unit V 0.6 ILK Offset supply leakage current VB=VS=600V IQBS 50 Quiescent VBS supply current VIN=0V or 5V 45 120 IQCC Quiescent VCC supply current VIN=0V or 5V 70 180 IPBS Operating VBS supply current fIN=20kHz,rms value 600 IPCC Operating VCC supply current fIN=20kHz,rms value 600 VIH Logic "1" input voltage A A 2.9 VIL Logic "0" input voltage VOH 0.8 High-level output voltage, VBIAS-VO VOL Low-level output voltage, VO IIN+ Logic "1" input bias current VIN=5V 10 20 IIN- Logic "0" input bias current VIN=0V 1.0 2.0 IO+ Output high short-circuit pulsed current VO=0V, VIN=5V with PW<10s 250 350 IO- Output low short-circuit pulsed current VO=15V, VIN=0V with PW<10s 500 650 VS Allowable negative VS pin voltage for HIN signal propagation to HO 1.0 IO=20mA V 0.6 A mA -9.8 -7.0 V Typ. Max. Unit Dynamic Electrical Characteristics VBIAS (VCC, VBS)=15.0V, VS=COM, CL=1000pF and, TA = 25C, unless otherwise specified. Symbol Characteristics Test Condition Min. ton Turn-on propagation delay VS=0V 100 170 300 toff Turn-off propagation delay VS=0V or 600V(5) 100 200 300 tr Turn-on rise time 20 60 140 tf Turn-off fall time 30 80 MT Delay matching, HS & LS turn-on/off ns 50 Note: 5. This parameter guaranteed by design. (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 www.fairchildsemi.com 5 FAN7382 High- and Low-Side Gate Driver Electrical Characteristics Turn-On Propagation Delay [nsec] Turn-On Propagation Delay [nsec] 300 VVCC=VBS =VBS CC COM=0V COM=0V CCL=1nF L=1nF =25C TTa=25C A 250 High-Side 200 150 Low-Side 100 300 VVCC=VBS=15V =VBS=15V CC COM=0V COM=0V =1nF CCL=1nF L 275 250 225 High-Side 200 175 Low-Side 150 125 100 75 50 10 12 14 16 18 -40 20 -20 0 Turn-Off Propagation Delay [nsec] Turn-Off Propagation Delay [nsec] VCC=VVCC=VBS BS COM=0V COM=0V CL=1nF CL=1nF C TA=25Ta=25C 240 High-Side 220 200 Low-Side 180 160 140 120 80 100 120 300 VCC=VBS=15V V =VBS=15V CC COM=0V COM=0V CL=1nF =1nF C L 275 250 High-Side 225 Low-Side 200 175 150 125 100 10 12 14 16 18 -40 20 -20 0 Figure 6. Turn-Off Propagation Delay vs. Supply Voltage 58 Turn-On Rising Time [nsec] VCC=V VCC=VBS BS COM=0V COM=0V CL=1nF CL=1nF Ta=25C C TA=25 60 56 54 52 Low-Side 50 High-Side 48 40 60 80 100 120 Figure 7. Turn-Off Propagation Delay vs. Temp. 64 62 20 Temperature [ C] Supply Voltage [V] Turn-On Rising Time [nsec] 60 Figure 5. Turn-On Propagation Delay vs. Temp. 300 260 40 Temperature[C] Supply Voltage [V] Figure 4. Turn-On Propagation Delay vs. Supply Voltage 280 20 46 44 80 75 70 65 60 VVCC=VBS=15V =VBS=15V CC COM =0V COM=0V =1nF CCL=1nF L 55 50 Low-Side 45 40 35 High-Side 30 25 20 15 10 5 0 42 10 11 12 13 14 15 16 17 18 19 -40 20 Supply Voltage [V] 0 20 40 60 80 100 120 Tem perature [C] Figure 8. Turn-On Rising Time vs. Supply Voltage Figure 9. Turn-On Rising Time vs. Temp. (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 -20 www.fairchildsemi.com 6 FAN7382 High- and Low-Side Gate Driver Typical Characteristics 50 VCC=V VCC=VBS BS COM=0V COM=0V CL=1nF CL=1nF Ta=25C TA=25C 32 30 28 Turn-Off Falling Time [nsec] Turn-Off Falling Time [nsec] 34 High-Side 26 24 22 Low-Side 20 18 VVCC=VBS=15V =VBS=15V CC CO M=0V COM=0V CL=1nF =1nF C L 45 40 High-Side 35 30 25 Low-Side 20 15 16 10 10 11 12 13 14 15 16 17 18 19 -40 20 -20 0 20 40 60 80 100 120 Tem perature [C] Supply Voltage [V] Figure 10. Turn-Off Falling Time vs. Supply Voltage Figure 11. Turn-Off Falling Time vs. Temp. Output Sourcing Current [mA] Output Sourcing Current [mA] 600 VVCC=VBS CC=VBS COM=0V COM=0V LO=HO=0V LO=HO=0V Ta=25C TA=25C 550 500 450 400 High-Side 350 300 Low-Side 250 200 150 440 VVCC=VBS=15V CC=VBS=15V COM=0V COM=0V LO=HO=0V LO=HO=0V 420 400 380 High-Side 360 340 Low-Side 320 300 280 100 10 12 14 16 18 -40 20 -20 0 Supply Voltage [V] Figure 12. Output Sourcing Current vs. Supply Voltage 40 60 80 100 120 Figure 13. Output Sourcing Current vs. Temp 850 900 VVCC=VBS CC=VBS COM=0V COM=0V LO=VCC, HO=VB LO=V , HO=V CC B Ta=25C TA=25C 800 700 Low-Side Output Sinking Current [mA] Output Sinking Current [mA] 20 Temperature [C] High-Side 600 500 400 VVCC=VBS=15V =VBS=15V CC COM=0V COM=0V LO=VCC, HO=VB LO=VCC, HO=VB 800 750 700 High-Side 650 Low-Side 600 550 500 300 10 12 14 16 18 -40 20 Figure 14. Output Sinking Current vs. Supply Voltage 0 20 40 60 80 100 120 Figure 15. Output Sinking Current vs. Temp. (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 -20 Temperature [ C] Supply Voltage [V] www.fairchildsemi.com 7 FAN7382 High- and Low-Side Gate Driver Typical Characteristics (Continued) Allowable NegativeVS VSVoltage Voltage Allowable Negative forfor Signal to High-Side High-Side[V] [V] SignalPropagation Propagation to Allowable AllowableNegative NegativeVS VSVoltage Voltage forSignal SignalPropagation Propagatio totoHigh-Side [V][V] for High-Side -4 VCC=VVCC=VBS BS COM=0V COM=0V Ta=25C TA=25C -6 -8 -10 -12 -14 -16 -18 10 12 14 16 18 20 -9.0 VCC=VBS=15V V CC=VBS=15V COM=0V COM=0V -9.2 -9.4 -9.6 -9.8 -10.0 -10.2 -10.4 -40 -20 0 Supply Voltage [V] 40 60 80 100 120 Temperature [C] Figure 16. Allowable Negative VS Voltage for Signal Propagation to High Side vs. Supply Voltage Figure 17. Allowable Negative VS Voltage for Signal Propagation to High Side vs. Temp. 95 100 VVBS=15V BS=15V COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V Ta=25C TA=25C VVCC=VBS=15V =VBS=15V CC CO M=0V COM=0V HIN=LIN=0V HIN=LIN=0V 90 85 80 IQCC [A] IQCC [uA] 80 IQCC [uA] IQCC [A] 20 60 40 75 70 65 60 55 20 50 45 0 0 5 10 15 -40 20 -20 0 20 40 60 80 100 120 Tem perature [ C] Supply Voltage [V] Figure 18. IQCC vs. Supply Voltage Figure 19. IQCC vs. Temp. 80 50 VCCVCC=15V =15V COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V 50 48 IQBS [A] IQBS [uA] 60 IQBS [A] IQBS [uA] 52 VVCC=15V =15V CC COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V Ta=25C TA=25C 70 40 30 46 44 42 40 20 38 10 36 0 0 5 10 15 -40 20 Supply Voltage [V] 0 20 40 60 80 100 120 Tem perature [C] Figure 20. IQBS vs. Supply Voltage Figure 21. IQBS vs. Temp. (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 -20 www.fairchildsemi.com 8 FAN7382 High- and Low-Side Gate Driver Typical Characteristics (Continued) 0.60 0.7 VCCVCC=VBS =VBS COM=0V COM=0V HIN=LIN=5V HIN=LIN=5V IL=20mA IL=20mA Ta=25C TA=25C 0.5 0.50 VVOH [V] OH [V] VOH [V] VOH [V] 0.6 VVCC=VBS=15V CC=VBS=15V COM=0V COM=0V HIN=LIN=5V HIN=LIN=5V IL=20mA IL=20mA 0.55 High-Side 0.4 Low-Side 0.45 Low-Side 0.40 High-Side 0.35 0.3 0.30 0.25 0.2 10 12 14 16 18 -40 20 -20 0 20 Figure 22. High-Level Output Voltage vs. Supply Voltage 0.18 80 100 120 VVCC=VBS=15V CC=VBS=15V COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V IL=20mA IL=20mA 0.22 0.20 0.18 VOL [V] VOL [V] VOL [V] VOL [V] 0.16 60 Figure 23. High-Level Output Voltage vs. Temp. VCCVCC=VBS =VBS COM=0V COM=0V HIN=LIN=0V HIN=LIN=0V IL=20mA IL=20mA Ta=25C TA=25C 0.17 40 Temperature [ C] Supply Voltage [V] 0.15 High-Side High-Side 0.16 Low-Side 0.14 0.14 0.12 Low-Side 0.13 0.10 0.12 10 12 14 16 18 -40 20 -20 0 20 Figure 24. Low-Level Output Voltage vs. Supply Voltage 60 80 100 120 Figure 25. Low-Level Output Voltage vs. Temp. 16 40 HIN=LIN=5V VVCC=VBS =VBS CC COM=0V COM=0V IN=VCC or IN=0V or IN=0V IN=V CC Ta=25C TA=25C 30 25 14 12 IN+ IN+[uA] [A] 35 IN+/IN-[[uA] IN+/INA] 40 Temperature [C] Supply Voltage [V] IN+ 20 15 LIN 10 HIN 8 10 6 5 IN- 0 0 5 10 4 15 -40 20 0 20 40 60 80 100 120 Tem perature [ C] Supply Voltage [V] Figure 26. Input Bias Current vs. Supply Voltage Figure 27. Input Bias Current vs. Temp. (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 -20 www.fairchildsemi.com 9 FAN7382 High- and Low-Side Gate Driver Typical Characteristics (Continued) 10.0 9.8 9.8 9.6 VBSUV+/VBSUVVSBUV+/VSBUV+ [V][V] VCCUV+/VCCUVVCCUV+/VCCUV+ [V][V] 10.0 VCCUV+ VCCUV+ 9.4 9.2 9.0 VCCUVVCCUV- 8.8 8.6 8.4 9.6 VSBUV+ VBSUV+ 9.4 9.2 9.0 VSBUVVBSUV- 8.8 8.6 8.4 8.2 8.2 8.0 8.0 -40 -20 0 20 40 60 80 100 120 -40 -20 0 Temperature [ C] Input Logic Threshold Voltage [V] -to-CO M =650V VVB B-to-COM=650V ILK [uA] ILK [A] 4 3 2 1 0 0 20 40 60 80 100 120 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 80 100 120 VVCC=VBS=15V CC=VBS=15V COM=0V COM=0V VIH (LIN) VIH(LIN) VIH (HIN) VIH(HIN) VIL (LIN) VIL(LIN) VIL(HIN) V (HIN) IL -40 Tem perature [ C ] -20 0 20 40 60 80 100 120 Temperature [ C] Figure 30. VB to COM Leakage Current vs. Temp. Figure 31. Input Logic Threshold Voltage vs. Temp. (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 60 Figure 29. VBS UVLO Threshold Voltage vs. Temp. 5 -20 40 Temperature [ C] Figure 28. VCC UVLO Threshold Voltage vs. Temp. -40 20 www.fairchildsemi.com 10 FAN7382 High- and Low-Side Gate Driver Typical Characteristics (Continued) FAN7382 High- and Low-Side Gate Driver Typical Characteristics (Continued) 15V 100nF 15V 1 VCC VB 8 4 COM VS 6 10uF 10uF 100nF HIN LIN 1nF HIN 2 HIN HO 7 LIN 3 LIN LO 5 HO LO 1nF FAN7382 Rev.05 FAN7382 Rev.03 Figure 32. Switching Time Test Circuit HIN t on : Turn-on Delay Time t off : Turn-off Delay Time t r : Turn-on Rise Time t f : Turn-off Fall Time 50% LIN t on 50% 50% HIN 50% LIN t off tr Figure 33. Input / Output Timing Diagram tf MT LO HO 10% 90% LO 90% LO 10% HO MT 10% FAN7382 Rev.03 FAN7382 Rev.03 Figure 34. Switching Time Waveform Definition Figure 35. Delay Matching Waveform Definition (c) 2005 Fairchild Semiconductor Corporation FAN7382 Rev. 1.0.8 t on-H t on-L 90% HO t off-H t off-L www.fairchildsemi.com 11 9.83 9.00 8 5 6.670 6.096 1 4 8.255 7.610 TOP VIEW 1.65 1.27 (0.56) 7.62 3.683 3.200 5.08 MAX 3.60 3.00 0.33 MIN 0.560 0.355 2.54 0.356 0.200 7.62 9.957 7.870 FRONT VIEW SIDE VIEW NOTES: A. CONFORMS TO JEDEC MS-001, VARIATION BA B. ALL DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONS AND TOLERANCES PER ASME Y14.5M-2009 E. DRAWING FILENAME: MKT-N08Frev3 15 0 C 0.35 5.12 4.72 8 A 5 B 6.30 5.70 1.75 0.65 4.15 3.75 5.60 1.27 1 4 1.27 PIN #1 ID 0.25 M C B A TOP VIEW 1.85 1.35 1.75 1.25 C B C 0.51 0.31 (8X) 0.10 C 0.25 0.10 OPTION A BEVEL EDGE BEVEL 8 4 SEATING PLANE DETAIL "B" SCALE 2:1 0.25 0.15 OPTION B NON-BEVEL EDGE NOTES: UNLESS OTHERWISED SPECIFIED R0.10 A. 0.25 B. C 1.04 C SIDE VIEW FRONT VIEW GAGE PLANE LAND PATTERN RECOMMENDATION 0.80 0.30 D. E. F. THIS PACKAGE CONFORMS TO JEDEC MS-012 VARIATION A EXCEPT WHERE NOTED. ALL DIMENSIONS ARE IN MILLIMETERS OUT OF JEDEC STANDARD VALUE DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR EXTRUSIONS. LAND PATTERN AS PER IPC SOIC127P600X175-8M DRAWING FILENAME: MKT-M08Brev2 8.76 8.36 A 0.65 7.62 B 14 8 1.70 1.27 6.00 4.20 3.75 5.60 1 7 PIN #1 ID 1.27 0.27 TOP VIEW 1.65 1.25 E 1.80 MAX CHAMFER OPTIONAL C A 0.25 E 0.05 0.51 0.36 0.10 C ALL LEAD TIPS 0.20 M 0.30 E 0.15 C A B END VIEW SIDE VIEW GAUGE PLANE NOTES: UNLESS OTHERWISE SPECIFIED A. THIS PACKAGE REFERENCE TO JEDEC MS-012 VARIATION AB. B. ALL DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR EXTRUSIONS. D. DIMENSIONS AND TOLERANCES AS PER ASME Y14.5-1994. E OUT OF JEDEC STANDARD VALUE. F. LAND PATTERN STANDARD: SOIC127P600X145-14M. G. FILE NAME: MKT-M14C REV2 0.36 SEATING PLANE ~5 00 ~5 0.90 0.45 1.04 DETAIL "A" SCALE 2:1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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