PRELIMINARY INFORMATION MK2745-20 MPEG Clock Source Description Features The MK2745-20 is a low cost, low jitter, high performance clock synthesizer for DVD and other MPEG 2 based applications. Using analog PhaseLocked Loop (PLL) techniques, the device accepts a 27.00 MHz fundamental mode crystal or clock input to produce multiple output clocks including a selectable processor clock, a selectable processor clock, a selectable audio clock, and fixed outputs of 27 MHz and 24.576 MHz. The audio clocks are frequency locked to the 27.00MHz input using our patented zero ppm error techniques, allowing audio and video to track exactly, thereby eliminating the need for large buffer memory. * Packaged in 16 pin narrow (150 mil) SOIC * Ideal for DVD and MPEG solutions * 3.0 V to 5.5 V operating voltage * Patented zero ppm audio clock error for 256X and 384X sampling rates * Selectable audio sampling frequencies support 32 kHz, 44.1 kHz, and 48 kHz in most DACs * 27.00 MHz fundamental crystal or clock input * Eight selectable processor frequencies * Fixed clocks of 27 and 24.576 MHz * Zero ppm error in all clocks * Full CMOS outputs with 25mA output drive capability at TTL levels * Advanced, low power, sub-micron CMOS process * 3.0V to 5.5V operating voltage * See also the MK2712 for NTSC/PAL clocks MicroClock manufactures the largest variety of DVD, Set-Top Box, and multimedia clock synthesizers for all applications. Consult us to eliminate crystals and oscillators from your board. Block Diagram AS2:0 PS2:0 27.00 MHz clock or crystal X1 X2 VDD GND 2 2 3 3 Clock Buffer/ Crystal Oscillator Clock Synthesis and Control Circuitry Output Buffer Audio Clock Output Buffer 24.576 MHz Output Buffer Processor Clock Output Buffer 27 MHz 1 Revision 052499 Printed 11/16/00 Integrated Circuit Systems * 525 Race Street * San Jose *CA *95126 * (408)295-9800tel * (408)295-9818fax MDS 2745-20 A PRELIMINARY INFORMATION MK2745-20 MPEG Clock Source Pin Assignment Audio Clock ( MHz) Decoding Table MK2745-20 PS2 1 16 PS1 X2 2 15 PS0 X1/ICLK 3 14 24.576M VDD 4 13 VDD GND 5 12 AS1 ACLK 6 11 GND PCLK 7 10 27M AS2 8 9 AS0 AS2 AS1 AS0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 ACLK 12.288 11.2896 8.192 24.576 8.192 16.9344 18.432 11.2896 Processor Clock (in MHz) PS2 PS1 PS0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 PCLK 108 55 66.66 80 54 81 50 60 16 pin (150 mil) SOIC Pin Descriptions Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name PS2 X2 X1/ICLK VDD GND ACLK PCLK AS2 AS0 27M GND AS1 VDD 24.576M PS0 PS1 Type I XO XI P P O O I I O P I P O I I Description Processor clock Select 2. Selects processor clock outputs per table above. Crystal connection. Connect to 27 MHz crystal. Leave unconnected for clock input. Crystal connection. Connect to 27 MHz crystal or connect to 27 MHz input clock. Connect to +3.3 V or +5 V. Must be same as other VDD. Connect to ground. Audio Clock output. Determined by status of AS2, AS1, AS0. See table above. Processor Clock output. Determined by status of PS2, PS1, PS0. See table above. Audio clock Select 2. Selects audio clock on pin 6 per table above. Audio clock Select 0. Selects audio clock on pin 6 per table above. 27.00 MHz clock output. Connect to ground. Audio clock Select 1. Selects audio clock on pin 6 per table above. Connect to +3.3 V or +5 V. Must be same as other VDD. 24.576 MHz clock output. Processor clock Select 0. Selects processor clock outputs per table above. Processor clock Select 1. Selects processor clock outputs per table above. Key: I = Input, O = output, P = power supply connection 2 Revision 052499 Printed 11/16/00 Integrated Circuit Systems * 525 Race Street * San Jose *CA *95126 * (408)295-9800tel * (408)295-9818fax MDS 2745-20 A PRELIMINARY INFORMATION MK2745-20 MPEG Clock Source Electrical Specifications Parameter Conditions Minimum Typical Maximum Units 7 VDD+0.5 70 260 150 V V C C C 5.5 V V V V V V V V mA mA pF ABSOLUTE MAXIMUM RATINGS (note 1) Supply voltage, VDD Inputs and Clock Outputs Ambient Operating Temperature Soldering Temperature Storage temperature Referenced to GND Referenced to GND -0.5 0 Max of 20 seconds -65 DC CHARACTERISTICS (VDD = 5.0V unless noted) Operating Voltage, VDD Input High Voltage, VIH, X1/ICLK pin only Input Low Voltage, VIL, X1/ICLK pin only Input High Voltage, VIH Input Low Voltage, VIL Output High Voltage, VOH Output Low Voltage, VOL Output High Voltage, VOH, CMOS level Operating Supply Current, IDD Short Circuit Current Input Capacitance 3 VDD/2 + 1 VDD/2 VDD/2 VDD/2 - 1 2 0.8 IOH=-25mA IOL=25mA IOH=-8mA No Load, note 2 Each output 2.4 0.4 VDD-0.4 37 100 7 AC CHARACTERISTICS (VDD = 5.0V unless noted) Input Frequency Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle Frequency error, all clocks Absolute Jitter, short term Notes: 27.000 0.8 to 2.0V 2.0 to 0.8V At VDD/2 Variation from mean 40 0 350 1.5 1.5 60 1 MHz ns ns % ppm ps 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability. 2. With Processor clock at 50MHz, and ACLK at 16.93MHz. External Components The MK2745-20 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.01F should be connected between VDD and GND, as close to the MK2745-20 as possible. A series termination resistor of 33 may be used for each clock output. If a clock input is not used, the 27.00 MHz crystal must be connected as close to the chip as possible. The crystal should be a fundamental mode (do not use third overtone), parallel resonant, 50ppm or better. Crystal capacitors should be connected from pins X1 to ground and X2 to ground. The value of these capacitors is given by the following equation, where CL is the crystal load capacitance: Crystal caps (pF) = (CL -6) x 2. So for a crystal with 16pF load capacitance, two 20pF caps should be used. 3 Revision 052499 Printed 11/16/00 Integrated Circuit Systems * 525 Race Street * San Jose *CA *95126 * (408)295-9800tel * (408)295-9818fax MDS 2745-20 A PRELIMINARY INFORMATION Package Outline and Package Dimensions E 16 pin SOIC narrow Symbol A b c D E H e h L Q H h x 45 D e Inches Min Max 0.055 0.070 0.013 0.019 0.007 0.010 0.385 0.400 0.150 0.160 0.225 0.245 .050 BSC 0.016 0.016 0.035 0.004 0.01 Millimeters Min Max 1.397 1.778 0.330 0.483 0.191 0.254 9.779 10.160 3.810 4.064 5.715 6.223 1.27 BSC 0.406 0.406 0.889 0.102 0.254 A c Q MK2745-20 MPEG Clock Source b L Ordering Information Part/Order Number MK2745-20S MK2745-20STR CHANGE HISTORY Version Date first published A 5/24/99 Marking MK2745-20S MK2745-20S Status Preliminary Shipping packaging tubes tape and reel Package Temperature 16 pin narrow SOIC 0-70C 16 pin narrow SOIC 0-70C Comments Original While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 4 Revision 052499 Printed 11/16/00 Integrated Circuit Systems * 525 Race Street * San Jose *CA *95126 * (408)295-9800tel * (408)295-9818fax MDS 2745-20 A