Product Data Sheet December 3, 2009 9.9-12.5Gb/s Optical Modulator Driver TGA8652-SL OC-192 Metro and Long Haul Applications Surface Mount Package Key Features and Performance * * * * * * * * DC - 12 GHz Linear BW DC - 16 GHz Saturated Power BW 16 dB small signal gain Wide Drive Range (4V to 8V) 25 ps Edge Rates (10/90) Low Power Dissipation (1.4W at Vo=8V) Package size: .350 x .350 x .084 inches. Evaluation Board Available. Primary Applications Description The TriQuint TGA8652-SL is a medium power wideband AGC amplifier combined with off chip circuitry assembled in a Surface Mount Package. The TGA8652-SL typically provides 16dB small signal gain with 6dB AGC range. Typical input and output return loss is <10dB. Typical Noise Figure is 2.5dB at 3GHz. Typical saturated output power is 25dBm. Small signal 3dB BW is 12GHz with saturated power performance to 16GHz. RF ports are DC coupled enabling the user to customize system corner frequencies. Applications include OC192 12.5GBit/s NRZ MZ Modulator Driver and receive AGC amplifier. * Mach-Zehnder Modulator Driver * Pre-Driver * Receiver AGC Measured Performance Cascaded 8652 Evaluation Boards 12.5 Gb/s Performance Output = 8 Vpp, Input = 500 mVpp Scale: 2 V/div, 20 ps/div Drain bias may be applied thru the on-chip drain termination resistor for low drive applications or thru the RF output port for high drive applications. A cascaded pair demonstrated 8Vpp output voltage swing with 500mVpp at the input when stimulated with 10GBit/s. 2^31-1prbs. NRZ data. The TGA8652-SL is available on an evaluation board. Note: Datasheet is subject to change without notice. 1 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL MAXIMUM RATINGS SYMBOL PARAMETER 1/ VALUE NOTES POSITIVE SUPPLY VOLTAGE + V Vd(RFout) Drain bias applied thru on-chip termination 12 V Drain bias applied at RF output using bias T 10 V POSITIVE SUPPLY CURRENT + V Drain bias applied thru on-chip termination 110 mA Id Drain bias applied at RF output using bias T 250 mA Pd POWER DISSIPATION 2/ 2.4 W 3/ NEGATIVE GATE Vg Voltage Ig Gate Current 0 V to -3 V 5 mA CONTROL GATE Vctrl Ictrl Voltage Gate Current Vd/2 to -3 V 4/ 5 mA RF INPUT PIN TCH TSTG Sinusoidal Continuous Wave Power OPERATING CHANNEL TEMPERATURE STORAGE TEMPERATURE 23 dBm 0 200 C 5/ 6/ 0 -40 to 125 C Notes: 1/ These ratings represent the maximum operable values for the device. 2/ Assure the combination of Vd and Id does not exceed maximum power dissipation rating. 3/ When operated at this bias condition with a base plate temperature of 80 0C, the Median Lifetime (Tm) is 1E+6 hours. 4/ Assure Vctrl never exceeds Vd during bias on and off sequences, and normal operation. 5/ These ratings apply to each individual FET. 6/ Junction operating temperature will directly affect the device lifetime. For maximum life, it is recommended that junction temperatures be maintained at the lowest possible levels. 2 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL THERMAL INFORMATION* Parameter Test Condition RJC Thermal Resistance (channel to backside of package) Vd(RF out) = 6.5 V, Vctrl = 1 V, Id = 170 mA 5%, T base = 80 C T CH (C) RJC (C/W) MTTF (HRS) 114.70 31.40 2.6E+7 NOTE: Thermal transfer is conducted thru the bottom of the TGA8652-SL package into the motherboard. Design the motherboard to assure adequate thermal transfer to the base plate. An array of filled thermal vias is recommended as shown in the example below. * This information is a result of a thermal model. Area of thermal transfer Thermal vias in motherboard Motherboard Bottom View TGA8652-SL 3 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL RF SPECIFICATIONS (TA = 25C Nominal) NOTE 1/, 2/ TEST 1/, 2/ MIN TYP UNITS MAX 12 GHz SATURATED POWER BW 16 GHz SMALL-SIGNAL GAIN MAGNITUDE 2 and 4 GHz 15 16 6 GHz 13 15 10 GHz 13 14 14 GHz 10 13 16 GHz 10 13 Midband dB dB 2, 4, 6, and 10 GHz 9 10 14 and 18 GHz 8 10 OUTPUT RETURN LOSS MAGNITUDE 2, 4, 6, and 10 GHz 10 10 14 and 18 GHz 8 10 2, 4, 6, 8, and 10 GHz 25 Vd (RFout) = 7 V 8.0 Vd (RFout) = 6 V 7.0 Vd (RFout) = 5 V 6.0 Vd (RFout) = 4.5 V 5.5 SATURATED OUTPUT POWER 3/, 4/ EYE AMPLITUDE 3/, 4/, 5/ ADDITIVE JITTER (p-p) RISE TIME (10/90) dB 15 INPUT RETURN LOSS MAGNITUDE 6/, 7/ 3/, 4/ VALUE SMALL SIGNAL BW SMALL SIGNAL AGC RANGE 1/, 2/ MEASUREMENT CONDITIONS dB dBm Vpp 5 ps 25 ps Notes: 1/ Verified at package level RF probe. 2/ Package Probe Bias: V+ = 8 V, adjust Vg1 to achieve Id = 87 mA, Vctrl = +1 V 3/ Verified by design, TGA8652-SL assembled onto a demonstration board shown on page 7 then tested using the application circuit and bias procedure detailed on pages 8 and 9. 4/ Vin = 2 V, Data Rate = 12.5 Gb/s, Vctrl and Vg are adjusted for maximum output. 5/ Computed using RSS Method where Jpp_additive = SQRT(Jpp_out2 - Jpp_in2) 6/ Verified at die level on-wafer probe. 7/ Power Bias Die Probe: VDT=8 V, adjust Vg to achieve Id = 175 mA+/-5%, Vctrl = 1.5 V Note: At the die level, drain bias is applied thru the RF output port using a bias tee, voltage is at the DC input to the bias tee. 4 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Typical Measured S-parameters GAIN IRL ORL 5 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Demonstration Board Vctrl V+ RF(out) RF(in) Vg 6 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Application Circuit for 4-8V Driver Application V+ (No Connection) C3 C4 VDT Vctrl 11 9 Vd(RFout) C5 TGA8652-SL 6 RF(in) Bias Tee (PSPL 5542) RF(out) 12 3 DC Block (PSPL 5509) Vg C2 C1 Recommended Components: DESIGNATOR DESCRIPTION MANUFACTURER PART NUMBER C1, C3 1uF Capacitor MLC Ceramic AVX 0603YC105KAT C2, C4 10 uF Capacitor MLC Ceramic AVX 0603YC106KAT C5 0.01 uF Capacitor MLC AVX 0603YC103KAT 7 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Bias Procedure for 4-8V Driver Application Bias ON Bias OFF 1. Disable the PPG source 2. Set Vdt = 0V Vctrl = 0V and Vg = 0V 3. Set Vg =-1.5 V 4. Increase Vdt to 8V observing Id. - Assure Id = 0mA 5. Set Vctrl = +1.0 V - Id should still be 0 mA 6. Make Vg more positive until Idd = 175mA. - Typical value for Vg is -0.3 V 7. Enable the PPG source - Vin = 2 Vpp 8. Adjust Vctrl for Vo = 8Vpp 9. Adjust Vg for 50% crossover 1. Disable the output of the PPG 2. Set Vctrl = 0V 3. Set Vdt = 0V 4. Set Vg = 0V Notes: 1. Assure Vctrl never exceeds Vd during Bias ON and Bias OFF sequences and during normal operation. 8 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Typical Measured Performance on Demonstration Board 12.5Gb/s 2^31-1, Vd(RFout) = 7 V CPC = 50% Vo=8 V Vo=7 V Vo=6 V Vo=5 V Vo = 4 V 9 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Typical Bias Conditions Vd(RFout) = 7 V Vo(V) Vg(V) Id(mA) Vctrl 8 -0.23 194 0.87 7 -0.31 173 0.63 6 -0.40 144 0.37 5 -0.48 117 0.16 4 -0.54 97 0.02 Notes: 1. Vd(RFout)=7 V 2. Vin =2 Vpp 3. 50% CPC 4. Actual bias points may be different. 10 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Application Circuit for Pre-Driver and Receive Application C3 Vctrl 11 V+ C4 9 Vd(RFout) C5 TGA8652-SL RF(in) RF(out) 6 12 DC Block 3 (PSPL 5509) DC Block (PSPL 5509) Vg C1 C2 Recommended Components: DESIGNATOR DESCRIPTION MANUFACTURER PART NUMBER C1, C3 1uF Capacitor MLC Ceramic AVX 0603YC105KAT C2, C4 10 uF Capacitor MLC Ceramic AVX 0603YC106KAT C5 0.01 uF Capacitor MLC AVX 0603YC103KAT 11 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Bias Procedure for Pre-Driver and Receive Application Bias ON 1. Disable the PPG source 2. Set V+ = 0 V, Vctrl = 0 V and Vg = 0 V 3. Set Vg = -1.5 V, Set Vctrl = -0.1V 4. Increase V+ to 8 V observing Id. - Assure Id = 0 mA 5. Make Vg more positive until Idd = 70 mA. - Typical value for Vg is -0.5 V 7. Enable the PPG source - Set Vin = 500 mV (amplitude) Bias OFF 1. Disable the output of the PPG 2. Set Vctrl = 0V 3. Set Vdt = 0V 4. Set Vg = 0V Notes: 1. Assure Vctrl never exceeds Vd during Bias ON and Bias OFF sequences and during normal operation. 12 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Mechanical Drawing Notes: 1. Dimensions: Inches. Tolerance: Length and Width: +/-.003 inches. Height +/-.006 inches. Adjacent pad to pad spacing: +/- .0002 inches. Pad Size: +/- .001 inches. 2. Surface Mount Interface: Material: RO4003 (thickness=.008 inches), 1/2oz copper (thickness=.0007 inches) Plating Finish: 100-350 microinches nickel underplate, with 5-10 microinches flash gold overplate. 13 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com Product Data Sheet December 3, 2009 TGA8652-SL Recommended Surface Mount Package Assembly Proper ESD precautions must be followed while handling packages. Clean the board with acetone. Rinse with alcohol. Allow the circuit to fully dry. TriQuint recommends using a conductive solder paste for attachment. Follow solder paste and reflow oven vendors' recommendations when developing a solder reflow profile. Typical solder reflow profiles are listed in the table below. Hand soldering is not recommended. Solder paste can be applied using a stencil printer or dot placement. The volume of solder paste depends on PCB and component layout and should be well controlled to ensure consistent mechanical and electrical performance. This package has little tendency to self-align during reflow. Typical Solder Reflow Profiles Reflow Profile SnPb Pb Free Ramp-up Rate 3 C/sec 3 C/sec Activation Time and Temperature 60 - 120 sec @ 140 - 160 C 60 - 180 sec @ 150 - 200 C Time above Melting Point 60 - 150 sec 60 - 150 sec Max Peak Temperature 240 C 260 C Time within 5 C of Peak Temperature 10 - 20 sec 10 - 20 sec Ramp-down Rate 4 - 6 C/sec 4 - 6 C/sec Ordering Information Part TGA8652-SL Package Style Land Grid Array Surface Mount GaAs MMIC devices are susceptible to damage from Electrostatic Discharge. Proper precautions should be observed during handling, assembly and test. 14 TriQuint Semiconductor Texas: (972)994 8465 Fax (972)994 8504 Email: info-mmw@tqs.com Web: www.triquint.com