Chip Card & Security ICs
SLE 5532
SLE 5542
Intelligent 256-Byte EEPROM
Preliminary
Short Product Information June 2005
SLE 5532/42 Preliminary Short Product Information Ref.: SPI_SLE5532_0605.doc
This document contains preliminary information on a new product under development.
Details are subject to change without notice.
Revision History: Current Version 2005-06-16
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Chip Card & Security ICs,
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Preliminary SLE 5532
SLE 5542
Short Product Information 3 / 6 2005-06-16
Intelligent 256-Byte EEPROM with Write Protect Function SLE 5532
Intelligent 256-Byte EEPROM with Write Protect Function SLE 5542
and Programmable Security Code (PSC)
Features
100% functional compatibility to SLE 4432/42
256 x 8-bit EEPROM organization
Irreversible byte-wise protection of lowest 32 addresses (Byte 0...31)
32 x 1 bit organization of protection memory
Two-wire link protocol
– Byte-wise addressing
End of processing indicated at data output
Contact configuration and Answer-to-Reset (synchronous transmission) in accordance
to standard ISO/IEC 7816
Sophisticated electrical characteristics
Ambient temperature TA –40 … +80°C for chip
Supply voltage 5 V ± 10 %
Supply current < 3 mA (typical 600 µA)
EEPROM erase / write time 5 ms
ESD protection typical 4,000 V
EEPROM Endurance minimum 100,000 erase / write cycles1)
Data retention for minimum of 10 years1)
Advanced 1.2 µm CMOS-technology optimised for security layout
EEPROM-cells protected by shield
Secure wiring for all security relevant signals
Shielding of deeper layers via metal
Sensory and logical security functions
No isolation on backside necessary
Additional Feature of SLE 5542
Data can only be changed after entry of the correct 3-byte programmable security code
1) Values are temperature dependent.
M3
Preliminary SLE 5532
SLE 5542
Short Product Information 4 / 6 2005-06-16
1 Ordering and Packaging information
Table 1 Ordering Information
Type Package1) Remark Ordering Code
SLE 5532 C Die (on Wafer) unsawn on request
SLE 5532 D Die (on Wafer) sawn on request
SLE 5532 M3 T-M3.2-6 on request
SLE 5532 MFC3 S-MFC3.1-6-1 FCoS™ on request
SLE 5542 C Die (on Wafer) unsawn on request
SLE 5542 D Die (on Wafer) sawn on request
SLE 5542 M3 T-M3.2-6 on request
SLE 5542 MFC3 S-MFC3.1-6-1 FCoS™ on request
Pin Description
Figure 1 Pin Configuration Wire-bonded Module M3.2 (top view)
Figure 2 Pin Configuration Module Flip Chip MFC3.1 (top view)
1) Available as a Module Flip Chip (MFC3), wire-bonded module (M3) for embedding in plastic cards or as a die on
unsawn (C) / sawn wafer (D) for customer packaging
Preliminary SLE 5532
SLE 5542
Short Product Information 5 / 6 2005-06-16
SLE 5532
SLE 5542
GND
I/O
VCC
RST
CLK
Figure 3 Pad Configuration Die
Table 2 Pin Definitions and Functions
Card Contact Symbol Function
C1 VCC Supply voltage
C2 RST Control input (Reset Signal)
C3 CLK Clock input
C5 GND Ground
C6 N.C. Not connected
C7 I/O Bi-directional data line (open drain)
Preliminary SLE 5532
SLE 5542
Short Product Information 6 / 6 2005-06-16
2 Circuit Description
The memory is organized in a Main Memory of 256 byte.
Each of the first 32 bytes of the Main Memory can be irreversibly protected against data change by
writing the corresponding bit in the Protection Memory (32 bit). Dependent on the state of the
protection bit the memory is read only (ROM) or may be erased and written again (EEPROM).
Change of the manufacturer code is only possible by the chip manufacturer.
SLE 5542
Change of data of the Main Memory and write a bit of the Protection Memory is only possible after
a correct verification of the Programmable Security Code (PSC).
32 byte
Protectable
Data memory
Chip Coding
224 byte
Unprotected
Data Memory
Application ID
Write Protection
Memory
Read Main MemoryI/O
Update Main
Memory
32 bit
Protection
Memory
(PROM)
Read Protection
Memory
Figure 4 Memory Overview SLE 5532
32 byte
Protectable
Data memory
Chip Coding
224 byte
Unprotected
Data Memory
Application ID
Write Protection
Memory
Read Main MemoryI/O
Update Main
Memory
Security Logic
Programmable
Security Code
Error Counter
32 bit
Protection
Memory
(PROM)
Read Protection
Memory
Figure 5 Memory Overview SLE 5542