CMOS, Low Voltage, 4 Ω Dual SPST
Switches in 3 mm × 2 mm LFCSP
Data Sheet ADG721/ADG722/ADG723
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2004-2011 Analog Devices, Inc. All rights reserved.
FEATURES
1.8 V to 5.5 V single supply
4 Ω (max) on resistance
Low on resistance flatness
−3 dB bandwidth >200 MHz
Tiny package options
8-lead MSOP
3 mm × 2 mm LFCSP (A grade)
Fast switching times
tON, 20 ns
tOFF, 10 ns
Low power consumption (<0.1 μW)
TTL/CMOS compatible
APPLICATIONS
USB 1.1 signal switching circuits
Cell phones
PDAs
Battery-powered systems
Communication systems
Sample hold systems
Audio signal routing
Video switching
Mechanical reed relay replacement
FUNCTIONAL BLOCK DIAGRAMS
ADG721
IN1
D2
S2
S1
D1
IN2
00045-001
ADG722
IN1
D2
S2
S1
D1
IN2
00045-002
Figure 1. Figure 2.
ADG723
SWITCHES SHOWN FOR
A LOGIC "0" INPUT
IN1
D2
S2
S1
D1
IN2
00045-003
Figure 3.
GENERAL DESCRIPTION
The ADG721, ADG722, and ADG723 are monolithic CMOS
SPST switches. These switches are designed on an advanced
submicron process that provides low power dissipation yet gives
high switching speed, low on resistance, and low leakage
currents. The devices are packaged in both a tiny 3 mm × 2 mm
LFCSP and an MSOP, making them ideal for space-constrained
applications.
The ADG721, ADG722, and ADG723 are designed to operate
from a single 1.8 V to 5.5 V supply, making them ideal for use
in battery-powered instruments and with the new generation of
DACs and ADCs from Analog Devices, Inc.
The ADG721, ADG722, and ADG723 contain two independent
single-pole/single-throw (SPST) switches. The ADG721 and
ADG722 differ only in that both switches are normally open
and normally closed, respectively. In the ADG723, Switch 1 is
normally open and Switch 2 is normally closed.
Each switch of the ADG721, ADG722, and ADG723 conducts
equally well in both directions when on. The ADG723 exhibits
break-before-make switching action.
PRODUCT HIGHLIGHTS
1. 1.8 V to 5.5 V single-supply operation.
2. Ver y low RON (4 Ω max at 5 V, 10 Ω max at 3 V).
3. Low on resistance flatness.
4. −3 dB bandwidth >200 MHz.
5. Low power dissipation. CMOS construction ensures low
power dissipation.
6. 8-lead MSOP and 3 mm × 2 mm LFCSP.
ADG721/ADG722/ADG723 Data Sheet
Rev. E | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Pin Descriptions ....................................... 6
Terminology .......................................................................................7
Typical Performance Characteristics ..............................................8
Test Circuits ..................................................................................... 10
Applications ..................................................................................... 12
ADG721/ADG722/ADG723 Supply Voltages ....................... 12
On Response vs. Frequency ...................................................... 12
Off Isolation ................................................................................ 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 14
REVISION HISTORY
10/11—Rev. D to Rev. E
Changes to Ordering Guide ...............................................................
4/11—Rev. C to Rev. D
Changes to Ordering Guide .......................................................... 14
1/11—Rev. B to Rev. C
Changes to Table 4 ............................................................................ 6
Changes to Ordering Guide .......................................................... 14
2/07—Rev. A to Rev. B
Updated Format .................................................................. Universal
Changes to Specifications ................................................................ 3
Changes to Absolute Maximum Ratings ....................................... 5
Change to Figure 4 ........................................................................... 6
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 13
3/04—Rev. 0 to Rev. A
Additions to Applications ................................................................ 1
Changes to Ordering Guide ............................................................ 4
Updated Outline Dimensions ....................................................... 10
Data Sheet ADG721/ADG722/ADG723
Rev. E | Page 3 of 16
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted.
Table 1.
A, B Grade1
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to VDD V
On Resistance, RON 2.5 Ω typ VS = 0 V to VDD, IS = −10 mA
4 5 Ω max See Figure 12
On Resistance Match Between Channels, ∆RON 0.3 Ω typ VS = 0 V to VDD, IS = −10 mA
1.0 Ω max
On Resistance Flatness, RFLAT(ON) 0.85 Ω typ VS = 0 V to VDD, IS = −10 mA
1.5 Ω max
LEAKAGE CURRENTS – A Grade VDD = 5.5 V
Source off Leakage, IS (OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V, see Figure 13
Drain off Leakage, ID (OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V, see Figure 13
Channel on Leakage, ID, IS (ON) ±0.01 nA typ VS = VD = 1 V or VS = VD = 4.5 V, see Figure 14
LEAKAGE CURRENTS – B Grade VDD = 5.5 V
Source off Leakage, IS (OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V
±0.25 ±0.35 nA max Test Circuit 2
Drain off Leakage, ID (OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V
±0.25 ±0.35 nA max See Figure 13
Channel on Leakage, ID, IS (ON) ±0.01 nA typ VS = VD = 1 V or VS = VD = 4.5 V
±0.25 ±0.35 nA max See Figure 14
DIGITAL INPUTS
Input High Voltage, VINH 2.4 V min
Input Low Voltage, VINL 0.8 V max
Input Current
I
INL
or I
INH
0.005
μA typ
V
IN
= V
INL
or V
INH
±0.1
μA max
DYNAMIC CHARACTERISTICS2
tON 14 ns typ RL = 300 Ω, CL = 35 pF
20 ns max VS = 3 V, see Figure 15
tOFF 6 ns typ RL = 300 Ω, CL = 35 pF
10 ns max VS = 3 V, see Figure 15
Break-Before-Make Time Delay, tD (ADG723 Only) 7 ns typ RL = 300 Ω, CL = 35 pF
1 ns min VS1 = VS2 = 3 V, see Figure 16
Charge Injection
2
pC typ
V
S
= 2 V, R
S
= 0 Ω, C
L
= 1 nF, see Figure 17
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz
−80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 18
Channel-to-Channel Crosstalk −77 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz
−97 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 19
Bandwidth −3 dB
200
MHz typ
R
L
= 50 Ω, C
L
= 5 pF, see Figure 20
C
S
(OFF)
7
pF typ
CD (OFF) 7 pF typ
CD, CS (ON) 18 pF typ
POWER REQUIREMENTS VDD = 5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or 5 V
1.0 μA max
1 Temperature range: A, B grades, −40°C to +85°C. All specifications apply to both grades unless otherwise stated.
2 Guaranteed by design; not subject to production test.
ADG721/ADG722/ADG723 Data Sheet
Rev. E | Page 4 of 16
VDD = 3 V ± 10%, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted.
Table 2.
A, B Grades1
Parameter
+25°C
−
40°C to +85°C
Unit
ANALOG SWITCH
Analog Signal Range
0 to V
DD
V
On Resistance, RON 6.5 Ω typ VS = 0 V to VDD, IS = −10 mA
10 Ω max See Figure 12
On Resistance Match Between Channels, ∆RON 0.3 Ω typ VS = 0 V to VDD, IS = −10 mA
1.0 Ω max
On Resistance Flatness, RFL AT(O N) 3.5 Ω typ VS = 0 V to VDD, IS = −10 mA
LEAKAGE CURRENTS – A Grade VDD = 3.3 V
Source off Leakage, IS (OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V, see Figure 13
Drain off Leakage, ID (OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V, see Figure 13
Channel on Leakage, ID, IS (ON) ±0.01 nA typ VS = VD = 1 V or 3 V, Figure 14
LEAKAGE CURRENTS – B Grade
DD
Source off Leakage, I
S
(OFF)
±0.01
nA typ
S
D
±0.25 ±0.35 nA max See Figure 13
Drain off Leakage, ID (OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V
±0.25 ±0.35 nA max See Figure 13
Channel on Leakage, ID, IS (ON) ±0.01 nA typ VS = VD = 1 V or 3 V
±0.25 ±0.35 nA max See Figure 14
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.4 V max
Input Current
IINL or IINH 0.005 μA typ VIN = VINL or VINH
±0.1 μA max
DYNAMIC CHARACTERISTICS2
tON 16 ns typ RL = 300 Ω, CL = 35 pF
24 ns max VS = 2 V, see Figure 15
tOFF 7 ns typ RL = 300 Ω, CL = 35 pF
11 ns max VS = 2 V, see Figure 15
Break-Before-Make Time Delay, tD (ADG723 Only) 7 ns typ RL = 300 Ω, CL = 35 pF
1 ns min VS1 = VS2 = 2 V, see Figure 16
Charge Injection 2 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 n F, see Figure 17
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz
−80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 18
Channel-to-Channel Crosstalk −77 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz
−97 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 19
Bandwidth −3 dB 200 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 20
CS (OFF) 7 pF typ
CD (OFF) 7 pF typ
C
D
, C
S
(ON)
18
pF typ
POWER REQUIREMENTS VDD = 3.3 V
IDD 0.001 μA typ Digital inputs = 0 V or 3 V
1.0 μA max
1 Temperature range: A, B Grades, −40°C to +85°C. All specifications apply to both grades unless otherwise stated.
2 Guaranteed by design; not subject to production test.
Data Sheet ADG721/ADG722/ADG723
Rev. E | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Table 3.
Parameter Rating
VDD to GND −0.3 V to +7 V
Analog, Digital Inputs1 −0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
Continuous Current, S or D 30 mA
Operating Temperature Range
Industrial (A, B Grade) −40°C to +85°C
Storage Temperature Range
−65°C to +150°C
Junction Temperature +150°C
8-Lead MSOP
θJA Thermal Impedance 206°C/W
θJC Thermal Impedance 44°C/W
8-Lead LFCSP (4-Layer Board)
θJA Thermal Impedance1 50.8°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Lead-Free Temperature,
Soldering
IR Reflow, Peak Temperature 260°C (+0/−5°C)
Time at Peak Temperature 10 sec to 40 sec
ESD 2 kV
1Assumes exposed paddle is tied to ground.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ADG721/ADG722/ADG723 Data Sheet
Rev. E | Page 6 of 16
PIN CONFIGURATION AND PIN DESCRIPTIONS
8
7
6
5
1
2
3
4
S1
D1
IN2
GND
IN1
D2
S2
VDD
ADG721/
ADG722/
ADG723
TOP VIEW
(Not t o Scale)
00045-004
NOTES
1. EXPOSED PADDLE OF LFCSP
SHOULD BE TI E D TO GRO UND.
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Descriptions
1 S1 Source Pin 1. May be an input or an output.
2
D1
Drain Pin 1. May be an input or an output.
3 IN2 Logic Control Input for Switch S2D2.
4 GND Ground (0 V) Reference.
5 S2 Source Pin 2. May be an input or an output.
6 D2 Drain Pin 2. May be an input or an output.
7 IN1 Logic Control Input for Switch S1
D1.
8 VDD Positive Power Supply Input.
Table 5. Truth Table (ADG721/ADG722)
ADG721 In
ADG722 In
Switch Condition
0 1 Off
1 0 On
Table 6. Truth Table (ADG723)
Logic
Switch 1
Switch 2
0 Off On
1 On Off
Data Sheet ADG721/ADG722/ADG723
Rev. E | Page 7 of 16
TERMINOLOGY
VDD
Most positive power supply potential.
GND
Ground (0 V) reference.
S
Source terminal. May be an input or output.
D
Drain terminal. May be an input or output.
IN
Logic control input.
RON
Ohmic resistance between D and S.
∆RON
On resistance match between any two channels, that is,
RON max − RON min.
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
IS (OFF)
Source leakage current with the switch off.
ID (OFF)
Drain leakage current with the switch off.
ID, IS (ON)
Channel leakage current with the switch on.
VD (VS)
Analog voltage on the D and S terminals.
CS (OFF)
Off switch source capacitance.
CD (OFF)
Off switch drain capacitance.
CD, CS (ON)
On switch capacitance.
tON
Delay between applying the digital control input and the output
switching on.
tOFF
Delay between applying the digital control input and the output
switching off.
tD
Off time or on time measured between the 90% points of both
switches, when switching from one address state to another
(ADG723 only).
Crosstalk
A measure of unwanted signal that is the result of parasitic
capacitance.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Charge Injection
A measure of the glitch impulse transferred during switching.
ADG721/ADG722/ADG723 Data Sheet
Rev. E | Page 8 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
5.5
6.0
R
ON
(Ω)
V
D
OR V
S
– DRAIN OR SO URCE V OL TAGE ( V )
00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
T
A
= 25° C
V
DD
= 2.7V
V
DD
= 4.5V
V
DD
= 3.0V
V
DD
= 5.0V
00045-005
Figure 5. On Resistance as a Function of VD (VS), Single Supplies
6
5
4
3
2
1
0
V
D
OR V
S
– DRAIN OR SO URCE V OL TAGE ( V )
00.5 1.0 1.5 2.0 2.5 3.0
V
DD
= 3V
RON (Ω)
+85°C
+25°C
–40°C
00045-006
Figure 6. On Resistance as a Function of a VD (VS) for Different Temperatures,
VDD = 3 V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
6.0
5.5
5.0
4.5
VD OR VS – DRAIN OR SOURCE V OLTAG E ( V )
00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V
DD
= 5V
RON (Ω)
+85°C+25°C
–40°C
00045-007
Figure 7. On Resistance as a Function of VD (VS) for Different Temperatures,
VDD = 5 V
FRE QUENCY ( Hz )
1m
100µ
10µ
1µ
100n
10n
1n
I
SUPPLY
(A)
10 100 1k 10k 100k 1M 10M
V
DD
= 5V
00045-008
Figure 8. Supply Current vs. Input Switching Frequency
FRE QUENCY ( Hz )
–30
OFF ISOLATION (dB)
–40
–50
–60
–70
–80
–90
–100
VDD = 3V , 5V
10k 100k 1M 10M 100M
00045-009
Figure 9. Off Isolation vs. Frequency
FRE QUENCY ( Hz )
–30
CROS S TALK ( dB)
–40
–50
–60
–70
–80
–90
–100
–110
10k 100k 1M 10M 100M
V
DD
= 3V, 5V
00045-010
Figure 10. Crosstalk vs. Frequency
Data Sheet ADG721/ADG722/ADG723
Rev. E | Page 9 of 16
–6
ON RESPONSE (dB)
–7
–8
–9
–10
–11
–12
FRE QUENCY ( Hz )
10k 100k 1M 10M 100M
V
DD
= 5V
1k100
00045-011
Figure 11. On Response vs. Frequency
ADG721/ADG722/ADG723 Data Sheet
Rev. E | Page 10 of 16
TEST CIRCUITS
V1
IDS
S D
RON = V1/IDS
VS
00045-012
Figure 12. On Resistance
AA
V
S
I
S
(OFF) I
D
(OFF)
V
D
00045-013
S D
Figure 13. Off Leakage
A
V
S
I
D
(ON)
V
D
00045-014
S D
Figure 14. On Leakage
IN
GND
ADG721
ADG722
50% 50%
50% 50%
90% 90%
t
OFF
t
ON
VOUT
VIN
VIN
VOUT
VDD
VDD
VS
0.1µF
RL
300Ω
CL
35pF
00045-015
S D
Figure 15. Switching Times
IN1, IN2
GND 90%
90%
0V
0V
0V
50% 50%
90% 90%
tD
tD
V
OUT1
V
IN
V
OUT2
V
DD
V
S1
0.1µF
R
L2
300Ω
C
L2
35pF
V
S2
V
DD
R
L1
300Ω
C
L1
35pF
V
OUT1
V
OUT2
V
IN
00045-016
S1
D1
S2 D2
Figure 16. Break-Before-Make Time Delay, tD (ADG723 Only)
SW ON SW OFF
V
OUT
V
IN
ΔV
OUT
V
DD
C
L
1nF
QINJ = CL × ΔVOUT
V
OUT
R
S
V
S
00045-017
IN
GND
V
DD
S D
Figure 17. Charge Injection
Data Sheet ADG721/ADG722/ADG723
Rev. E | Page 11 of 16
V
IN
V
DD
0.1µF
R
L
50Ω
V
OUT
V
S
00045-018
IN
GND
V
DD
S D
Figure 18. Off Isolation
V
IN
V
DD
0.1µF
R
L
50Ω
V
OUT
V
S
00045-019
IN
GND
V
DD
S D
Figure 19. Channel-to-Channel Crosstalk
NC
CHANNEL-TO-CHANNEL
CROSSTALK
= 20 × l og
|
V
S
/V
OUT
|
V
IN1
V
DD
0.1µF
R
L
50Ω
V
OUT
V
S
50Ω
V
IN2
00045-020
V
DD
GND
S D
S D
Figure 20. Bandwidth
ADG721/ADG722/ADG723 Data Sheet
Rev. E | Page 12 of 16
APPLICATIONS
The ADG721/ADG722/ADG723 belong to a new family of
Analog Devices CMOS switches. This series of general-purpose
switches has improved switching times, lower on resistance, higher
bandwidths, low power consumption, and low leakage currents.
ADG721/ADG722/ADG723 SUPPLY VOLTAGES
Functionality of the ADG721/ADG722/ADG723 extends from
a 1.8 V to a 5.5 V single supply, which makes it ideal for battery-
powered instruments, where important design parameters are
power efficiency and performance.
It is important to note that the supply voltage affects the input
signal range, the on resistance, and the switching times of the part.
The typical performance characteristics and the specifications
clearly show the effects of the power supplies.
For VDD = 1.8 V, on resistance is typically 40 Ω over the
temperature range.
ON RESPONSE VS. FREQUENCY
Figure 21 illustrates the parasitic components that affect the ac
performance of CMOS switches (the switch is shown surrounded
by a box). Additional external capacitances further degrade some
aspects of performance. These capacitances affect feedthrough,
crosstalk, and system bandwidth.
SD
CDRLOAD
VOUT
VIN
CDS
CLOAD
RON
00045-021
Figure 21. Switch Represented by Equivalent Parasitic Components
The transfer function that describes the equivalent diagram of
the switch (Figure 21) is of the form (A)s, as shown in the
following equation:
( )
( )
+
+
=1
1
)(
TT
ON
DSON
TRCRs
CRs
RsA
where:
CT = CLOAD + CD + CDS
RT = RLOAD/(RLOAD + RON)
The signal transfer characteristic is dependent on the switch
channel capacitance, CDS. This capacitance creates a frequency
zero in the numerator of the transfer function A(s). Because the
switch on resistance is small, this zero usually occurs at high
frequencies. The bandwidth is a function of the switch output
capacitance combined with CDS and the load capacitance. The
frequency pole corresponding to these capacitances appears in
the denominator of A(s).
The dominant effect of the output capacitance, CD, causes the
pole breakpoint frequency to occur first. Therefore, in order to
maximize bandwidth, a switch must have a low input and
output capacitance and low on resistance (see Figure 11).
OFF ISOLATION
Off isolation is a measure of the input signal coupled through
an off switch to the switch output. The capacitance, CDS, couples
the input signal to the output load, when the switch is off, as
shown in Figure 22.
SD
CDRLOAD
VOUT
VIN
CDS
CLOAD
00045-022
Figure 22. Off Isolation Is Affected by External Load
Resistance and Capacitance
The larger the value of CDS, the larger the value of feedthrough
produced. Figure 9 illustrates the drop in off isolation as a
function of frequency. From dc to roughly 1 MHz, the switch
shows better than −80 dB isolation. Up to frequencies of 10
MHz, the off isolation remains better than −60 dB. As the
frequency increases, more and more of the input signal is
coupled through to the output. Off isolation can be maximized
by choosing a switch with the smallest CDS possible. The values
of load resistance and capacitance also affect off isolation
because they contribute to the coefficients of the poles and
zeros in the transfer function of the switch when open.
( )
( )
( )
+++
=1
)(
DS
D
LOADLOAD
DSLOAD
CCCRs
CRs
sA
Data Sheet ADG721/ADG722/ADG723
Rev. E | Page 13 of 16
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 23. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
0
81806-
A
COPLANARITY
0.08
0.50
0.40
0.30
0.20 M IN
0.05 M AX
0.02 NOM
0.15 REF
0.50
PIN 1
INDICATOR
EXPOSED
PAD
BOT TOM VIEW
TOP VI EW
0.30
0.25
0.20
0.80
0.75
0.70
SEATING
PLANE
3.00 BS C
SIDE VIEW
14
85
2.00 BSC
INDEX
AREA
1.90
1.80
1.65
1.75
1.65
1.50
FOR PROP E R CONNECT ION OF
THE EXPOSED PAD, REFER TO
THE P IN CONFIGURATIO N AND
FUNCT I O N DES CRIP T I O NS
SECTION OF THIS DATA SHEET.
Figure 24. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm × 2 mm Body, Very Very Thin, Dual Lead
(CP-8-4)
Dimensions shown in millimeters
ADG721/ADG722/ADG723 Data Sheet
Rev. E | Page 14 of 16
ORDERING GUIDE
Model
1
Temperature Range
Package Description
Package Option
Branding
2
ADG721BRM −40°C to +85°C 8-Lead MSOP RM-8 S6B
ADG721BRM-REEL −40°C to +85°C 8-Lead MSOP RM-8 S6B
ADG721BRM-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 S6B
ADG721BRMZ −40°C to +85°C 8-Lead MSOP RM-8 #S6B
ADG721BRMZ-REEL −40°C to +85°C 8-Lead MSOP RM-8 #S6B
ADG721BRMZ-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 #S6B
ADG721ACPZ-REEL −40°C to +85°C 8-Lead LFCSP_WD CP-8-4 17
ADG721ACPZ-REEL7 −40°C to +85°C 8-Lead LFCSP_WD CP-8-4 17
ADG722BRM −40°C to +85°C 8-Lead MSOP RM-8 S7B
ADG722BRM-REEL7
−40°C to +85°C
8-Lead MSOP
RM-8
S7B
ADG722BRMZ −40°C to +85°C 8-Lead MSOP RM-8 #S7B
ADG722BRMZ-REEL −40°C to +85°C 8-Lead MSOP RM-8 #S7B
ADG722BRMZ-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 #S7B
ADG722ACPZ-REEL −40°C to +85°C 8-Lead LFCSP_WD CP-8-4 0U
ADG722ACPZ-REEL7 −40°C to +85°C 8-Lead LFCSP_WD CP-8-4 0U
ADG723BRM −40°C to +85°C 8-Lead MSOP RM-8 S8B
ADG723BRM-REEL −40°C to +85°C 8-Lead MSOP RM-8 S8B
ADG723BRM-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 S8B
ADG723BRMZ −40°C to +85°C 8-Lead MSOP RM-8 #S8B
ADG723BRMZ-REEL −40°C to +85°C 8-Lead MSOP RM-8 #S8B
ADG723BRMZ-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 #S8B
ADG723ACPZ-REEL −40°C to +85°C 8-Lead LFCSP_WD CP-8-4 S2N
ADG723ACPZ-REEL7 −40°C to +85°C 8-Lead LFCSP_WD CP-8-4 S2N
1 Z = RoHS Compliant Part; # denotes lead-free product may be top or bottom marked.
2 Branding = due to package size limitations, these three characters represent the part number.
Data Sheet ADG721/ADG722/ADG723
Rev. E | Page 15 of 16
NOTES
ADG721/ADG722/ADG723 Data Sheet
Rev. E | Page 16 of 16
NOTES
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registered trademarks are the property of their respective owners.
D00045-0-10/11(E)