CMOS SRAMKM616S2000 Family
Revision 1.0
August 1998
AC CHARACTERISTICS (Vcc=2.3~2.7V, KM616S2000 Family : TA=0 to 70°C, KM616S2000I Family : TA=-40 to 85°C)
1. The parameter is measured with 30pF test load.
Parameter List Symbol Speed Bins Units
1201)ns 150ns
Min Max Min Max
Read
Read cycle time tRC 120 -150 -ns
Address access time tAA -120 -150 ns
Chip select to output tCO -120 -150 ns
Output enable to valid output tOE -60 -75 ns
Byte enable to valid output tBA -60 -75 ns
Chip select to low-Z output tLZ 20 -20 -ns
Output enable to low-Z output tOLZ 10 -10 -ns
UB, LB enable to low-Z output tBLZ 10 -10 -ns
Output hold from address change tOH 15 -15 -ns
Chip disable to high-Z output tHZ -35 0 40 ns
Output disable to high-Z output tOHZ -35 0 40 ns
UB, LB disable to high-Z output tBHZ -35 0 40 ns
Write
Write cycle time tWC 120 -150 -ns
Chip select to end of write tCW 100 -120 -ns
Address set-up time tAS 0-0-ns
Address valid to end of write tAW 100 -120 -ns
UB, LB valid to end of write tBW 100 -120 -ns
Write pulse width tWP 80 -100 -ns
Write recovery time tWR 0-0-ns
Write to output high-Z tWHZ 0 30 0 40 ns
Data to write time overlap tDW 50 -60 -ns
Data hold from write time tDH 0-0-ns
End write to output low-Z tOW 5-5-ns
DATA RETENTION CHARACTERISTICS
Item Symbol Test Condition Min Typ Max Unit
Vcc for data retention VDR CS≥Vcc-0.2V 2.0 -2.7 V
Data retention current IDR Vcc=2.0V, CS≥Vcc-0.2V - - 10 µA
Data retention set-up time tSDR See data retention waveform 0- - ms
Recovery time tRDR 5- -
CL1)
1. Including scope and jig capacitance
AC OPERATING CONDITIONS
TEST CONDITIONS (Test Load and Test Input/Output Reference)
Input pulse level : 0.4 to 2.2V
Input rising and falling time : 5ns
Input and output reference voltage : 1.5V
Output load (See right) :CL=100pF+1TTL
CL1)=30pF+1TTL
1. Refer to AC CHARACTERISTICS