<0.5 CMOS 1.65 V to 3.6 V Quad SPST Switches ADG811/ADG812/ADG813 FUNCTIONAL BLOCK DIAGRAMS 0.5 typ on resistance 0.8 max on resistance at 125C 1.65 V to 3.6 V operation Automotive temperature range: -40C to +125C High current carrying capability: 300 mA continuous Rail-to-rail switching operation Fast switching times: <25 ns Typical power consumption < 0.1 W S1 IN1 S1 IN1 D1 D1 S2 IN2 D1 S2 IN2 S2 IN2 D2 D2 ADG811 D2 ADG812 S3 IN3 ADG813 S3 IN3 S3 IN3 D3 APPLICATIONS S1 IN1 D3 S4 D3 S4 IN4 GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG811, ADG812, and ADG813 are low voltage CMOS devices containing four independently selectable switches. These switches offer ultralow on resistance of less than 0.8 over the full temperature range. The digital inputs can handle 1.8 V logic with a 2.7 V to 3.6 V supply. 1. <0.8 over full temperature range of -40C to +125C. 2. Single 1.65 V to 3.6 V operation. 3. Operational with 1.8 V CMOS logic. 4. High current handling capability (300 mA continuous current at 3.3 V). 5. Low THD+N (0.02% typ). These devices contain four independent single-pole/singlethrow (SPST) switches. The ADG811 and ADG812 differ only in that the digital control logic is inverted. The ADG811 switches are turned on with a logic low on the appropriate control input, while a logic high is required to turn on the switches of the ADG812. The ADG813 contains two switches whose digital control logic is similar to the ADG811, while the logic is inverted on the other two switches. IN4 S4 Cellular phones MP3 players Power routing Battery-powered systems PCMCIA cards Modems Audio and video signal routing Communications systems IN4 D4 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT Figure 1. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. The ADG813 exhibits break-before-make switching action. The ADG811, ADG812, and ADG813 are fully specified for 3.3 V, 2.5 V, and 1.8 V supply operation. They are available in a 16-lead TSSOP package. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved. D4 04306-A-001 FEATURES ADG811/ADG812/ADG813 TABLE OF CONTENTS ADG811/ADG812/ADG813--Specifications .............................. 3 Typical Performance Characteristics ..............................................8 Absolute Maximum Ratings............................................................ 6 Test Circuits..................................................................................... 11 ESD Caution.................................................................................. 6 Outline Dimensions ....................................................................... 13 Pin Configuration and Function Descriptions............................. 7 Ordering Guide .......................................................................... 13 REVISION HISTORY 5/04--Data Sheet Changed from Rev. 0 to Rev. A Updated Format..............................................................Universal Updated Package Choices..............................................Universal 11/03--Revision 0: Initial Version Rev. A | Page 2 of 16 ADG811/ADG812/ADG813 ADG811/ADG812/ADG813--SPECIFICATIONS Table 1. VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted1 Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage IS (OFF) Drain Off Leakage ID (OFF) Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH +25C 0.5 0.65 0.04 -40C to +85C -40C to +125C Unit 0 V to VDD V typ max typ max typ max 0.75 0.8 0.075 0.08 0.15 0.16 0.1 0.2 1 0.2 1 0.2 1 8 80 8 80 15 90 2 0.8 0.005 0.1 CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON 6 V min V max A typ A max pF typ 30 ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation -67 dB typ Channel-to-Channel Crosstalk -90 dB typ Total Harmonic Distortion (THD + N) 0.02 % -0.05 90 30 35 60 dB typ MHz typ pF typ pF typ pF typ 0.003 A typ A max tOFF Break-Before-Make Time Delay (tBBM) (ADG813 only) Charge Injection Insertion Loss -3 dB Bandwidth CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 21 25 4 5 17 nA typ nA max nA typ nA max nA typ nA max 26 28 6 7 5 1.0 4 1 Temperature range for the Y version is -40C to +125C. Guaranteed by design, not subject to production test. 2 Rev. A | Page 3 of 16 Test Conditions/Comments VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA; Figure 18 VDD = 2.7 V, VS = 0.5 V, IS = 10 mA VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA VDD = 3.6 V VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; Figure 19 VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; Figure 19 VS = VD = 0.6 V or 3.3 V; Figure 20 VIN = VINL or VINH RL = 50 , CL = 35 pF VS = 1.5 V/0 V; Figure 21 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 21 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; Figure 22 VS = 1.5 V, RS = 0 , CL = 1 nF; Figure 23 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 26 RL = 32 , f = 20 Hz to 20 kHz, VS = 2 V p-p RL = 50 , CL = 5 pF, f = 100 kHz RL = 50 , CL = 5 pF; Figure 25 VDD = 3.6 V Digital inputs = 0 V or 3.6 V ADG811/ADG812/ADG813 Table 2. VDD = 2.5 V 0.2 V, GND = 0 V, unless otherwise noted1 Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage IS (OFF) Drain Off Leakage ID (OFF) Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH +25C 0.65 0.72 0.04 -40C to +85C -40C to +125C Unit 0 V to VDD V typ max typ max typ max 0.8 0.88 0.08 0.085 0.23 0.24 0.16 0.2 1 0.2 1 0.2 1 6 35 6 35 11 70 1.7 0.7 0.005 0.1 CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON 6 25 Off Isolation -67 dB typ Channel-to-Channel Crosstalk -90 dB typ Total Harmonic Distortion (THD + N) 0.022 % -0.06 90 32 37 60 dB typ MHz typ pF typ pF typ pF typ 0.003 A typ A max Break-Before-Make Time Delay (tBBM) (ADG813 only) Charge Injection Insertion Loss -3 dB Bandwidth CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 29 30 7 8 5 1.0 1 2 V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ tOFF 22 27 4 6 18 nA typ nA max nA typ nA max nA typ nA max 4 Temperature range for the Y version is -40C to +125C. Guaranteed by design, not subject to production test. Rev. A | Page 4 of 16 Test Conditions/Comments VDD = 2.3 V, VS = 0 V to VDD, IS = 10 mA; Figure 18 VDD = 2.3 V; VS = 0.55 V, IS = 10 mA VDD = 2.3 V; VS = 0 V to VDD, IS = 10 mA VDD = 2.7 V VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V; Figure 19 VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V; Figure 19 VS = VD = 0.6 V or 2.4 V; Figure 20 VIN = VINL or VINH RL = 50 , CL = 35 pF VS = 1.5 V/ 0 V; Figure 21 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 21 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; Figure 22 VS = 1.25 V, RS = 0 , CL = 1 nF; Figure 23 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 26 RL = 32 , f = 20 Hz to 20 kHz, VS = 1.5 V p-p RL = 50 , CL = 5 pF, f = 100 kHz RL = 50 , CL = 5 pF; Figure 25 VDD = 2.7 V Digital inputs = 0 V or 2.7 V ADG811/ADG812/ADG813 Table 3. VDD = 1.65 V to 1.95 V, GND = 0 V, unless otherwise noted1 Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (RON) LEAKAGE CURRENTS Source Off Leakage IS (OFF) Drain Off Leakage ID (OFF) Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH +25C 1 1.4 2.5 0.1 0.2 1 0.2 1 0.2 1 -40C to +85C 2.2 4 -40C to +125C Unit Test Conditions/Comments 0 V to VDD V typ max max typ VDD = 1.8 V, VS = 0 V to VDD, IS = 10 mA; Figure 18 VDD = 1.65 V, VS = 0 V to VDD, IS = 10 mA VDD = 1.65 V, VS = 0.7 V, IS = 10 mA 2.2 4 5 30 5 30 9 60 0.65VDD 0.35VDD 0.005 0.1 CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON 6 V min V max A typ A max pF typ 15 ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation -67 dB typ Channel-to-Channel Crosstalk -90 dB typ Total Harmonic Distortion (THD + N) 0.14 % -0.08 90 32 38 60 dB typ MHz typ pF typ pF typ pF typ 0.003 A typ A max tOFF Break-Before-Make Time Delay (tBBM) (ADG813 only) Charge Injection Insertion Loss -3 dB Bandwidth CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 27 35 6 8 20 nA typ nA max nA typ nA max nA typ nA max 36 37 9 10 5 1.0 4 1 Temperature range for the Y version is -40C to +125C. Guaranteed by design, not subject to production test. 2 Rev. A | Page 5 of 16 VDD = 1.95 V VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V; Figure 19 VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V; Figure 19 VS = VD = 0.6 V or 1.65 V; Figure 20 VIN = VINL or VINH RL = 50 , CL = 35 pF VS = 1.5 V/ 0 V; Figure 21 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 21 RL = 50 , CL = 35 pF VS1 = VS2 = 1 V; Figure 22 VS = 1 V, RS = 0 , CL = 1 nF; Figure 23 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 26 RL = 32 , f = 20 Hz to 20 kHz, VS = 1.2 V p-p RL = 50 , CL = 5 pF, f = 100 kHz RL = 50 , CL = 5 pF; Figure 25 VDD = 1.95 V Digital inputs = 0 V or 1.95 V ADG811/ADG812/ADG813 ABSOLUTE MAXIMUM RATINGS Table 4. TA = 25C, unless otherwise noted Table 5. ADG811/ADG812 Truth Table Parameter VDD to GND Analog Inputs1 Digital Inputs1 ADG811 IN 0 1 Peak Current, S or D 3.3 V Operation 2.5 V Operation 1.8 V Operation Continuous Current, S or D 3.3 V Operation 2.5 V Operation 1.8 V Operation Operating Temperature Range Automotive (Y Version) Storage Temperature Range Junction Temperature TSSOP Package JA Thermal Impedance JC Thermal Impedance IR Reflow, Peak Temperature <20 sec Rating -0.3 V to +4.6 V -0.3 V to VDD + 0.3 V GND - 0.3 V to 4.6 V or 10 mA, whichever occurs first (Pulsed at 1 ms, 10% Duty Cycle Max) 500 mA 460 mA 420 mA ADG812 IN 1 0 Table 6. ADG813 Truth Table Logic 0 1 Switch 1, Switch 4 Off On 300 mA 275 mA 250 mA -40C to +125C -65C to +150C 150C 150C/W 27C/W 235C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 1 Switch Condition On Off Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. A | Page 6 of 16 Switch 2, Switch 3 On Off ADG811/ADG812/ADG813 IN1 1 16 IN2 D1 2 15 D2 14 S2 13 VDD 12 NC 11 S3 D4 7 10 D3 IN4 8 9 IN3 S1 3 NC 4 GND 5 S4 6 ADG811/ ADG812/ ADG813 TOP VIEW (Not to Scale) NC = NO CONNECT 04306-A-002 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 2. Table 7. Terminology Term VDD IDD GND S D IN VD, VS RON RFLAT (ON) RON IS (OFF) ID (OFF) ID, IS (ON) VINL VINH IINL (IINH) CS (OFF) CD (OFF) CD, CS (ON) CIN tON tOFF tBBM Charge Injection Off Isolation Crosstalk -3 dB Bandwidth On Response Insertion Loss THD + N Definition Most positive power supply potential. Positive supply current. Ground (0 V) reference. Source terminal. May be an input or output. Drain terminal. May be an input or output. Logic control input. Analog voltage on Terminals D, S. Ohmic resistance between D and S. Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. On resistance match between any two channels, i.e., RON max - RON min. Source leakage current with the switch off. Drain leakage current with the switch off. Channel leakage current with the switch on. Maximum input voltage for Logic 0. Minimum input voltage for Logic 1. Input current of the digital input. Off switch source capacitance. Measured with reference to ground. Off switch drain capacitance. Measured with reference to ground. On switch capacitance. Measured with reference to ground. Digital input capacitance. Delay time between the 50% and the 90% points of the digital input and switch on condition. Delay time between the 50% and the 90% points of the digital input and switch off condition. On or off time measured between the 80% points of both switches, when switching from one to another. A measure of the glitch impulse transferred from the digital input to the analog output during on-to-off switching. A measure of unwanted signal coupling through an off switch. A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. The frequency at which the output is attenuated by 3 dB. The frequency response of the on switch. The loss due to the on resistance of the switch. The ratio of the harmonic amplitudes plus noise of a signal to the fundamental. Rev. A | Page 7 of 16 ADG811/ADG812/ADG813 TYPICAL PERFORMANCE CHARACTERISTICS 0.60 1.2 VDD = 3.3V TA = 25C 0.55 VDD = 3V 1.0 VDD = 2.7V ON RESISTANCE () ON RESISTANCE () 0.50 0.45 0.40 VDD = 3.3V VDD = 3.6V 0.35 0.8 +125C +85C 0.6 0.4 +25C 0.30 -40C 0.2 0.25 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VD, VS (V) 0 Figure 3. On Resistance vs. VD (VS), VDD = 2.7 V to 3.6 V 0 1.0 1.5 2.0 2.5 3.0 VD, VS (V) Figure 6. On Resistance vs. VD (VS) for Different Temperatures, VDD = 3.3 V 0.8 1.2 TA = 25C VDD = 2.5V 0.7 1.0 VDD = 2.3V ON RESISTANCE () ON RESISTANCE () 0.5 04306-A-006 0 04306-A-003 0.20 0.6 0.5 VDD = 2.5V VDD = 2.7V 0.4 +125C 0.8 +85C 0.6 +25C 0.4 -40C 0.3 0 0.5 1.0 1.5 2.0 0 04306-A-004 0.2 2.5 VD, VS (V) Figure 4. On Resistance vs. VD (VS), VDD = 2.5 V 0.2 V 0 1.0 1.5 2.0 2.5 VD, VS (V) Figure 7. On Resistance vs. VD (VS) for Different Temperatures, VDD = 2.5 V 1.8 1.4 TA = 25C -40C VDD = 1.8V 1.6 1.2 VDD = 1.65V +25C +125C ON RESISTANCE () 1.4 1.2 VDD = 1.8V 1.0 0.8 0.6 1.0 0.8 0.6 +85C 0.4 VDD = 1.95V 0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VD, VS (V) Figure 5. On Resistance vs. VD (VS), VDD = 1.8 V 0.15 V 2.0 0 0 0.2 0.4 0.6 0.8 1.0 VD, VS (V) 1.2 1.4 1.6 1.8 04306-A-008 0.2 0.4 04306-A-005 ON RESISTANCE () 0.5 04306-A-007 0.2 Figure 8. On Resistance vs. VD (VS) for Different Temperatures, VDD = 1.8 V Rev. A | Page 8 of 16 ADG811/ADG812/ADG813 10 120 VDD = 3.3V 0 TA = 25C 100 IS (OFF) -10 -20 80 QINJ (pC) CURRENT (nA) ID (OFF) -30 ID, IS (ON) -40 -50 VCC = 3.6V 60 40 VCC = 2.5V -60 20 -70 20 40 60 80 100 120 140 TEMPERATURE (C) 04306-A-009 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VS (V) Figure 9. Leakage Currents vs. Temperature, VDD = 3.3 V 04306-A-012 VCC = 1.8V -80 Figure 12. Charge Injection vs. Source Voltage 10 35 VDD = 2.5V 0 30 ID (OFF) 25 -10 IS (OFF) TIME (ns) CURRENT (nA) VCC = 1.8V tON -20 ID, IS (ON) -30 VCC = 2.5V 20 VCC = 3V 15 10 -40 VDD = 2.5V VDD = 1.8V tOFF -50 5 -60 0 -40 20 40 60 80 100 120 140 TEMPERATURE (C) -20 0 20 40 60 80 100 120 TEMPERATURE (C) Figure 10. Leakage Currents vs. Temperature, VDD = 2.5 V 04306-A-013 0 04306-A-010 VCC = 3V Figure 13. tON/tOFF Times vs. Temperature 0 1 VDD = 1.8V ID (OFF) 0 -10 -1 ATTENUATION (dB) IS (OFF) -30 ID, IS (ON) -40 -3 TA = 25C VCC = 3.3V/2.5V/1.8V -4 -5 -6 -7 -8 -50 0 20 40 60 80 100 120 140 TEMPERATURE (C) Figure 11. Leakage Currents vs. Temperature, VDD = 1.8 V -10 0.01 0.1 1 10 FREQUENCY (MHz) Figure 14. Bandwidth Rev. A | Page 9 of 16 100 1000 04306-A-014 -9 -60 04306-A-011 LEAKAGE (nA) -2 -20 ADG811/ADG812/ADG813 0 0.08 VDD = 2.5V TA = 25C 32 LOAD 1.5V p-p -10 TA = 25C 0.06 VCC = 3.3V/2.5V/1.8V -30 THD+N (%) ATTENUATION (dB) -20 -40 -50 0.05 -60 0.04 -70 0.1 1 10 100 1000 FREQUENCY (MHz) Figure 15. Crosstalk vs. Frequency -10 -40 -50 -60 -70 -80 -90 0.1 1 10 100 FREQUENCY (MHz) 1000 04306-A-016 ATTENUATION (dB) TA = 25C VCC = 3.3V/2.5V/1.8V -30 -100 0.01 20 50 100 200 500 1k 2k 5k FREQUENCY (Hz) Figure 17. Total Harmonic Distortion 0 -20 0.02 Figure 16. Off Isolation vs. Frequency Rev. A | Page 10 of 16 10k 20k 04306-A-017 -90 0.01 04306-A-015 -80 ADG811/ADG812/ADG813 TEST CIRCUITS IDS V1 RON = V1/IDS S D ID (OFF) A VS VD Figure 18. On Resistance ID (ON) S NC D A VD Figure 19. Off Leakage Figure 20. On Leakage VDD 0.1F ADG811 VIN VDD S VOUT D RL VS IN 50% 50% 50% VIN ADG812 CL 35pF 50 50% 90% 90% 04306-A-021 VOUT GND tON tOFF Figure 21. Switching Times VDD 0.1F VDD S2 D2 RL2 50 IN1, IN2 VIN 50% VOUT1 VOUT2 RL1 50 VIN CL1 35pF 50% 0V VOUT 80% CL2 35pF GND 80% tBBM tBBM Figure 22. Break-Before-Make Time Delay, tBBM (ADG813) VDD SW ON VDD RS VS S SW OFF VIN D VOUT CL 1nF IN VOUT VOUT QINJ = CL x VOUT GND Figure 23. Charge Injection Rev. A | Page 11 of 16 04306-A-022 VS2 D1 04306-A-023 VS1 S1 04306-A-020 A 04306-A-019 VS IS (OFF) D 04306-A-018 S ADG811/ADG812/ADG813 VDD 0.1F NETWORK ANALYZER VDD 50 S 50 VS D RL 50 OFF ISOLATION = 20 LOG 04306-A-024 GND VDD VOUT VS Figure 24. Off Isolation VDD 0.1F NETWORK ANALYZER VDD 50 S VS D GND INSERTION LOSS = 20 LOG VDD 04306-A-025 RL 50 VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 25. Bandwidth VDD 0.1F NETWORK ANALYZER VOUT VDD S1 RL 50 S2 D 50 RL 50 VS CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG VOUT VS Figure 26. Channel-to-Channel Crosstalk Rev. A | Page 12 of 16 04306-A-026 GND ADG811/ADG812/ADG813 OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.20 0.09 0.30 0.19 0.65 BSC COPLANARITY 0.10 SEATING PLANE 8 0 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153AB Figure 27. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters ORDERING GUIDE Model ADG811YRU ADG811YRU-REEL ADG811YRU-REEL7 AADG812YRU ADG812YRU-REEL ADG812YRU-REEL7 ADG813YRU ADG813YRU-REEL ADG813YRU-REEL7 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Rev. A | Page 13 of 16 Package Option RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 ADG811/ADG812/ADG813 NOTES Rev. A | Page 14 of 16 ADG811/ADG812/ADG813 NOTES Rev. A | Page 15 of 16 ADG811/ADG812/ADG813 NOTES (c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C04306-0-5/04(A) Rev. A | Page 16 of 16