IDT23S05-1DCG8 - Integrated Device Technology

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

IDT23S05

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM

OCTOBER 2003

2003 Integrated Device Technology, Inc. DSC 6381/3c

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FEATURES:

• Phase-Lock Loop Clock Distribution

• 10MHz to 133MHz operating frequency

• Distributes one clock input to one bank of five outputs

• Zero Input-Output Delay

• Output Skew < 250ps

• Low jitter <200 ps cycle-to-cycle

• IDT23S05-1 for Standard Drive

• IDT23S05-1H for High Drive

• No external RC network required

• Operates at 3.3V VDD

• Power down mode

• Spread spectrum compatible

• Available in SOIC package

FUNCTIONAL BLOCK DIAGRAM

IDT23S05

3.3V ZERO DELAY CLOCK

BUFFER, SPREAD SPECTRUM

COMPATIBLE

PLL

CLK1

CLK2

CLK3

CLK4

Control

Logic

REF

CLKOUT

DESCRIPTION:

The IDT23S05 is a high-speed phase-lock loop (PLL) clock buffer,

designed to address high-speed clock distribution applications. The zero

delay is achieved by aligning the phase between the incoming clock and

the output clock, operable within the range of 10 to 133MHz.

The IDT23S05 is an 8-pin version of the IDT23S09. IDT23S05 accepts

one reference input, and drives out five low skew clocks. The -1H version

of this device operates up to 133MHz frequency and has a higher drive than

the -1 device. All parts have on-chip PLLs which lock to an input clock on

the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT

pad. In the absence of an input clock, the IDT23S05 enters power down.

In this mode, the device will draw less than 12µA for Commercial Tempera-

ture range and less than 25µA for Industrial temperature range, the outputs

are tri-stated, and the PLL is not running, resulting in a significant reduction

of power.

The IDT23S05 is characterized for both Industrial and Commercial

operation.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

IDT23S05

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM

REF

CLK1

CLK2

GND

CLKOUT

CLK4

VDD

CLK3

PIN CONFIGURATION

SOIC

TOP VIEW

Symbol Rating Max. Unit

VDD Supply Voltage Range –0.5 to +4.6 V

VI (2) Input Voltage Range (REF) –0.5 to +5.5 V

VIInput Voltage Range –0.5 to V

(except REF) VDD+0.5

IIK (VI < 0) Input Clamp Current –50 mA

IO (VO = 0 to VDD) Continuous Output Current ±50 mA

VDD or G N D Continuous Current ±100 mA

TA = 55°C Maximum Power Dissipation 0 .7 W

(in still air)(3)

TSTG Storage Temperature Range –65 to +150 °C

Operating Commercial Temperature 0 to +70 °C

Temperature Range

Operating Industrial Temperature -40 to +85 °C

Temperature Range

NOTES:

1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

2 . The input and output negative-voltage ratings may be exceeded if the input and output

clamp-current ratings are observed.

3. The maximum package power dissipation is calculated using a junction temperature

of 150°C and a board trace length of 750 mils.

NOTES:

1. Weak pull down.

2. Weak pull down on all outputs.

PIN DESCRIPTION

ABSOLUTE MAXIMUM RATINGS(1)

APPLICATIONS:

• SDRAM

• Telecom

• Datacom

• PC Motherboards/Workstations

• Critical Path Delay Designs

Pin Name Pin Number Type Functional Description

REF(1) 1 IN Input reference clock, 5 Volt tolerant input

CLK2(2) 2 O ut Output clock

CLK1(2) 3 O ut Output clock

GND 4 Ground Ground

CLK3(2) 5 O ut Output clock

VDD 6 PWR 3.3V Supply

CLK4(2) 7 O ut Output clock

CLKOUT(2) 8 Out Output clock, internal feedback on this pin

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

IDT23S05

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM

Symbol Parameter Min. Max. Unit

VDD Supply Voltage 3 3.6 V

TAOperating Temperature (Ambient Temperature) 0 70 °C

CLLoad Capacitance < 100MHz — 3 0 pF

Load Capacitance 100MHz - 133MHz — 1 0

CIN Input Capacitance — 7 pF

OPERATING CONDITIONS - COMMERCIAL

DC ELECTRICAL CHARACTERISTICS - COMMERCIAL

Symbol Parameter Conditions Min. Max. Unit

VIL Input LOW Voltage Level — 0.8 V

VIH Input HIGH Voltage Level 2 — V

IIL Input LOW Current VIN = 0V — 50 µA

IIH Input HIGH Current VIN = VDD — 100 µA

VOL Output LOW Voltage Standard Drive IOL = 8mA — 0.4 V

High Drive IOL = 12mA (-1H)

VOH Output HIGH Voltage Standard Drive IOH = -8mA 2.4 — V

High Drive IOH = -12mA (-1H)

IDD_PD Power Down Current REF = 0MHz — 12 µA

IDD Supply Current Unloaded Outputs at 66.66MHz — 32 mA

SWITCHING CHARACTERISTICS (23S05-1) - COMMERCIAL(1,2)

Symbol Parameter Conditions Min. Typ. Max. Unit

t1Output Frequency 10pF Load 10 — 133 MHz

30pF Load 10 — 100

Duty Cycle = t2 ÷ t1Measured at 1.4V, FOUT = 66.66MHz 40 50 60 %

t3Rise Time Measured between 0.8V and 2V — — 2.5 ns

t4Fall Time Measured between 0.8V and 2V — — 2.5 ns

t5Output to Output Skew All outputs equally loaded — — 250 ps

t6Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 — 0 ±350 ps

t7Device-to-Device Skew Measured at VDD/2 on the CLKOUT pins of devices — 0 7 0 0 p s

tJCycle-to-Cycle Jitter, pk - pk Measured at 66.66MHz, loaded outputs — — 200 ps

tLOCK PLL Lock Time Stable power supply, valid clock presented on REF pin — — 1 ms

NOTES:

1. REF Input has a threshold voltage of VDD/2.

2. All parameters specified with loaded outputs.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

IDT23S05

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM

Symbol Parameter Min. Max. Unit

VDD Supply Voltage 3 3.6 V

TAOperating Temperature (Ambient Temperature) -40 +85 °C

CLLoad Capacitance < 100MHz — 3 0 pF

Load Capacitance 100MHz - 133MHz — 1 0

CIN Input Capacitance — 7 pF

OPERATING CONDITIONS - INDUSTRIAL

SWITCHING CHARACTERISTICS (23S05-1H) - COMMERCIAL(1,2)

Symbol Parameter Conditions Min. Typ. Max. Unit

t1Output Frequency 10pF Load 10 — 133 MHz

30pF Load 10 — 100

Duty Cycle = t2 ÷ t1Measured at 1.4V, FOUT = 66.66MHz 40 50 60 %

Duty Cycle = t2 ÷ t1Measured at 1.4V, FOUT <50MHz 45 50 55 %

t3Rise Time Measured between 0.8V and 2V — — 1. 5 ns

t4Fall Time Measured between 0.8V and 2V — — 1. 5 ns

t5Output to Output Skew All outputs equally loaded — — 250 ps

t6Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 — 0 ±350 ps

t7Device-to-Device Skew Measured at VDD/2 on the CLKOUT pins of devices — 0 7 0 0 p s

t8Output Slew Rate Measured between 0.8V and 2V using Test Circuit #2 1 — — V/ns

tJCycle-to-Cycle Jitter, pk - pk Measured at 66.66MHz, loaded outputs — — 200 ps

tLOCK PLL Lock Time Stable power supply, valid clock presented on REF pin — — 1 ms

NOTES:

1. REF Input has a threshold voltage of VDD/2.

2. All parameters specified with loaded outputs.

DC ELECTRICAL CHARACTERISTICS - INDUSTRIAL

Symbol Parameter Conditions Min. Max. Unit

VIL Input LOW Voltage Level — 0.8 V

VIH Input HIGH Voltage Level 2 — V

IIL Input LOW Current VIN = 0V — 50 µ A

IIH Input HIGH Current VIN = VDD — 100 µA

VOL Output LOW Voltage Standard Drive IOL = 8mA — 0.4 V

High Drive IOL = 12mA (-1H)

VOH Output HIGH Voltage Standard Drive IOH = -8mA 2.4 — V

High Drive IOH = -12mA (-1H)

IDD_PD Power Down Current REF = 0MHz — 25 µA

IDD Supply Current Unloaded Outputs at 66.66MHz — 35 mA

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

IDT23S05

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM

SWITCHING CHARACTERISTICS (23S05-1H) - INDUSTRIAL(1,2)

Symbol Parameter Conditions Min. Typ. Max. Unit

t1Output Frequency 10pF Load 10 — 133 MHz

30pF Load 10 — 100

Duty Cycle = t2 ÷ t1Measured at 1.4V, FOUT = 66.66MHz 40 50 60 %

Duty Cycle = t2 ÷ t1Measured at 1.4V, FOUT <50MHz 45 50 55 %

t3Rise Time Measured between 0.8V and 2V — — 1.5 ns

t4Fall Time Measured between 0.8V and 2V — — 1.5 ns

t5Output to Output Skew All outputs equally loaded — — 250 ps

t6Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 — 0 ±350 ps

t7Device-to-Device Skew Measured at VDD/2 on the CLKOUT pins of devices — 0 7 0 0 p s

t8Output Slew Rate Measured between 0.8V and 2V using Test Circuit #2 1 — — V/ns

tJCycle-to-Cycle Jitter, pk - pk Measured at 66.66MHz, loaded outputs — — 200 ps

tLOCK PLL Lock Time Stable power supply, valid clock presented on REF pin — — 1 ms

NOTES:

1. REF Input has a threshold voltage of VDD/2.

2. All parameters specified with loaded outputs.

SWITCHING CHARACTERISTICS (23S05-1) - INDUSTRIAL(1,2)

Symbol Parameter Conditions Min. Typ. Max. Unit

t1Output Frequency 10pF Load 10 — 133 MHz

30pF Load 10 — 100

Duty Cycle = t2 ÷ t1Measured at 1.4V, FOUT = 66.66MHz 40 50 60 %

t3Rise Time Measured between 0.8V and 2V — — 2.5 ns

t4Fall Time Measured between 0.8V and 2V — — 2.5 ns

t5Output to Output Skew All outputs equally loaded — — 250 ps

t6Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 — 0 ±350 ps

t7Device-to-Device Skew Measured at VDD/2 on the CLKOUT pins of devices — 0 7 0 0 p s

tJCycle-to-Cycle Jitter, pk - pk Measured at 66.66MHz, loaded outputs — — 200 ps

tLOCK PLL Lock Time Stable power supply, valid clock presented on REF pin — — 1 ms

NOTES:

1. REF Input has a threshold voltage of VDD/2.

2. All parameters specified with loaded outputs.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

IDT23S05

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM

ZERO DELA Y AND SKEW CONTROL

All outputs should be uniformly loaded in order to achieve Zero I/O Delay. Since the CLKOUT pin is the internal feedback for the PLL, its relative

loading can affect and adjust the input/output delay.

For designs utilizing zero I/O Delay, all outputs including CLKOUT must be equally loaded. Even if the output is not used, it must have a capacitive

load equal to that on the other outputs in order to obtain true zero I/O Delay. If I/O Delay adjustments are needed, use the Output Load Difference diagram

to calculate loading differences between the CLKOUT pin and other outputs. For zero output-to-output skew, all outputs must be loaded equally.

SPREAD SPECTRUM COMPATIBLE

Many systems being designed now use a technology called Spread Spectrum Frequency Timing Generation. This product is designed not to filter

off the Spread Spectrum feature of the reference input, assuming it exists. When a zero delay buffer is not designed to pass the Spread Spectrum feature

through, the result is a significant amount of tracking skew, which may cause problems in systems requiring synchronization.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

IDT23S05

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM

VDD

OUTPUTS

VDD

GND GND

0.1µF

0.1µFVDD

OUTPUTS 10pF

VDD

GND GND

0.1µF

1KΩ

CLOAD

CLKOUT CLKOUT

Output 1.4V

1.4V

Output

REF VDD/2

Output

CLKOUT

Device 1

CLKOUT

Device 2

VDD/2

1.4V

1.4V t2

1.4V

0.8V

t3 t4

0.8V 3.3V

Output

All Outputs Rise/Fall Time Input to Output Propagation Delay

Device to Device Skew

Output to Output Skew

Duty Cycle Timing

SWITCHING WAVEFORMS

Test Circuit 1 (all Parameters Except t8) Test Circuit 2 (t8, Output Slew Rate On -1H Devices)

TEST CIRCUITS

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

IDT23S05

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM

ORDERING INFORMATION

Ordering Code Package Type Operating Range

IDT23S05-1DC 8-Pin SOIC Commercial

IDT23S05-1DCI 8-Pin SOIC Industrial

IDT23S05-1HDC 8-Pin SOIC Commercial

IDT23S05-1HDCI 8-Pin SOIC Industrial

CORPORATE HEADQUARTERS for SALES: for Tech Support:

2975 Stender Way 800-345-7015 or 408-727-6116 logichelp@idt.com

Santa Clara, CA 95054 fax: 408-492-8674 (408) 654-6459

www.idt.com

IDT XXXXX XX X

Package Process

Device Type

23S05-1

23S05-1H Zero Delay Clock Buffer with

Hi gh Dri ve, Spread Spect rum Co mpa tib le

DC Small Outline

Blank

ICommercial (0oC to +70oC)

Industrial (-40oC to +8 5 oC)