NVMFS6B03NL Advance Information Power MOSFET 100 V, 4.8 mW, 145 A, Single N-Channel Features * * * * * * Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses NVMFS6B03NLWF - Wettable Flank Option for Enhanced Optical Inspection AEC-Q101 Qualified and PPAP Capable These Devices are Pb-Free and are RoHS Compliant www.onsemi.com V(BR)DSS RDS(ON) MAX ID MAX 100 V 4.8 mW @ 10 V 145 A D (5,6) MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJC (Notes 1, 2, 3) Power Dissipation RqJC (Notes 1, 2) Continuous Drain Current RqJA (Notes 1, 2, 3) Power Dissipation RqJA (Notes 1 & 2) Pulsed Drain Current TC = 25C Steady State Symbol Value Unit VDSS 100 V VGS 16 V ID 145 A TC = 100C TC = 25C 102 PD TC = 100C TA = 25C Steady State ID Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain-to-Source Avalanche Energy (TJ = 25C, VDD = 50 V, VGS = 10 V, IL(pk) = 60 A, L = 0.1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 from case for 10 s) N-CHANNEL MOSFET W 198 MARKING DIAGRAM A 20 14 PD TA = 100C TA = 25C, tp = 10 ms S (1,2,3) 99 TA = 100C TA = 25C G (4) D 1 W 3.9 2.0 IDM 520 A TJ, Tstg -55 to + 175 C IS 160 A EAS 180 mJ TL 260 C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. DFN5 (SO-8FL) CASE 488AA STYLE 1 A Y W ZZ S S S G D XXXXXX AYWZZ D D = Assembly Location = Year = Work Week = Lot Traceability ORDERING INFORMATION See detailed ordering, marking and shipping information on page 5 of this data sheet. THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction-to-Case - Steady State RqJC 0.76 C/W Junction-to-Ambient - Steady State (Note 2) RqJA 38 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface-mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. This document contains information on a new product. Specifications and information herein are subject to change without notice. (c) Semiconductor Components Industries, LLC, 2015 October, 2015 - Rev. P0 1 Publication Order Number: NVMFS6B03NL/D NVMFS6B03NL ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter Symbol Test Condition Min Drain-to-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 100 Drain-to-Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate-to-Source Leakage Current V 67.3 VGS = 0 V, VDS = 80 V mV/C TJ = 25C 10 TJ = 125C 100 IGSS VDS = 0 V, VGS = 16 V VGS(TH) VGS = VDS, ID = 250 mA mA 100 nA 3.0 V ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain-to-Source On Resistance RDS(on) 1.0 -8.1 VGS = 10 V ID = 20 A 3.8 mV/C 4.8 mW CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS 4200 Output Capacitance COSS Reverse Transfer Capacitance CRSS 31 Total Gate Charge QG(TOT) 58 Threshold Gate Charge QG(TH) 6.2 Gate-to-Source Charge QGS Gate-to-Drain Charge QGD 17 Plateau Voltage VGP 5.4 V Gate Resistance RG 1.0 W VGS = 0 V, f = 1 MHz, VDS = 50 V VGS = 10 V, VDS = 80 V; ID = 50 A TJ = 25C 760 pF nC 19 SWITCHING CHARACTERISTICS (Note 5) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) 16 VGS = 4.5 V, VDS = 80 V, ID = 50 A, RG = 1.0 W tf 46 ns 29 11 DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25C 0.9 TJ = 125C 0.8 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 50 A 1.2 V 67 VGS = 0 V, dIS/dt = 100 A/ms, IS = 25 A QRR 35 ns 31 120 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NVMFS6B03NL TYPICAL CHARACTERISTICS 140 120 VDS 10 V 120 5.5 V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 140 VGS = 6 V to 10 V 100 80 5.0 V 60 40 4.5 V 100 80 60 TJ = 125C 40 TJ = 25C 20 20 4.0 V 0 0.5 1.0 2.0 1.5 2.5 3.0 0 4 5 Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics ID = 20 A TJ = 25C 10 9 8 7 6 5 4 3 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10 VGS, GATE VOLTAGE (V) 6 8.0 7.5 TJ = 25C 7.0 6.5 VGS = 6.0 V 6.0 5.5 5.0 4.5 VGS = 10 V 4.0 3.5 3.0 10 15 20 25 35 30 40 45 50 ID, DRAIN CURRENT (A) Figure 3. On-Resistance vs. Gate-to-Source Voltage Figure 4. On-Resistance vs. Drain Current and Gate Voltage 100K 2.2 ID = 20 A VGS = 10 V TJ = 150C 10K 1.8 IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN-TO- SOURCE RESISTANCE 3 2 VGS, GATE-TO-SOURCE VOLTAGE (V) 11 2.0 1 VDS, DRAIN-TO-SOURCE VOLTAGE (V) RDS(on), DRAIN-TO-SOURCE RESISTANCE (mW) 0 RDS(on), DRAIN-TO-SOURCE RESISTANCE (mW) TJ = -55C 0 1.6 1.4 1.2 1.0 0.8 TJ = 125C 1K 100 TJ = 25C 10 0.6 0.4 -50 -25 1 0 25 50 75 100 125 150 175 10 20 30 40 50 60 70 80 90 100 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Voltage www.onsemi.com 3 NVMFS6B03NL 10,000 VGS, GATE-TO-SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS Ciss C, CAPACITANCE (pF) Coss 1000 Crss 100 VGS = 0 V TJ = 25C f = 1 MHz 10 1 1 10 QT 10 8 Qgd Qgs 6 4 TJ = 25C VDS = 50 V ID = 50 A 2 0 0 100 5 10 15 20 25 30 35 40 45 50 55 60 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge 200 1000 VDS = 50 V ID = 50 A VGS = 10 V 180 IS, SOURCE CURRENT (A) td(off) td(on) 100 tr 10 tf TJ = 25C 160 140 120 100 80 60 40 20 1 1 10 0 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 RG, GATE RESISTANCE (W) VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 ID, DRAIN CURRENT (A) t, TIME (ns) 12 100 VGS 10 V Single Pulse TC = 25C 500 ms 10 1 ms 1 10 ms RDS(on) Limit Thermal Limit Package Limit 0.1 0.01 0.1 1 10 100 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 11. Maximum Rated Forward Biased Safe Operating Area www.onsemi.com 4 NVMFS6B03NL TYPICAL CHARACTERISTICS 100 120 IPEAK, DRAIN CURRENT (A) GFS, SMALL-SIGNAL FORWARD TRANSFER CONDUCTANCE (S) 140 100 80 60 40 20 0 25C 10 100C 1 0 40 20 60 80 100 120 140 100E-6 1E-3 10E-3 ID, DRAIN CURRENT (A) TAV, TIME IN AVALANCHE (sec) Figure 12. GFS vs. ID Figure 13. IPEAK vs. TAV 100 50% Duty Cycle R(t) (C/W) 10 1 20% 10% 5% 2% 1% 0.1 NTMFS6B03NL, 650 mm2, 2 oz, Cu Single Layer Pad 0.01 Single Pulse 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 14. Thermal Response DEVICE ORDERING INFORMATION Marking Package Shipping NVMFS6B03NLT1G 6B03NL DFN5 (Pb-Free) 1500 / Tape & Reel NVMFS6B03NLWFT1G 6B03WF DFN5 (Pb-Free, Wettable Flanks) 1500 / Tape & Reel 6B03 DFN5 (Pb-Free) 5000 / Tape & Reel 6B03WF DFN5 (Pb-Free, Wettable Flanks) 5000 / Tape & Reel Device NVMFS6B03NLT3G NVMFS6B03NLWFT3G For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 NVMFS6B03NL PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO-8FL) CASE 488AA ISSUE M 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A 2 B D1 2X 0.20 C 4X E1 2 q E c 1 2 3 DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q A1 4 TOP VIEW C SEATING PLANE DETAIL A 0.10 C A RECOMMENDED SOLDERING FOOTPRINT* 0.10 C SIDE VIEW MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 5.00 5.30 4.70 4.90 5.10 3.80 4.00 4.20 6.00 6.15 6.30 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.575 0.71 1.20 1.35 1.50 0.51 0.575 0.71 0.125 REF 3.00 3.40 3.80 0_ --- 12 _ STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 2X DETAIL A 0.495 4.560 2X 0.10 8X b C A B 0.05 c 1.530 e/2 e L 1 3.200 4 4.530 K 1.330 2X E2 PIN 5 (EXPOSED PAD) L1 0.905 M 1 0.965 4X G D2 1.000 4X 0.750 BOTTOM VIEW 1.270 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5817-1050 www.onsemi.com 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NVMFS6B03NL/D