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IR213(6,62,63,65,66,67,68)(J&S) & PbF
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Recommended Operating Conditions
The input/output logic-timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute referenced to COM. The VS offset ratings are tested
with all supplies biased at a 15 V differential.
Symbol Definition Min Max Units
IR213(6,68) VS1,2,3 +10 VS1,2,3 + 20
IR21362 VS1,2,3 +11.5 VS1,2,3 + 20
VB1,2,3
High side floating supply voltage
IR213(6,63,65,66,67) VS1,2,3 +12 VS1,2,3 + 20
VS 1,2,3 High side floating supply offset voltage Note 1 600
VHO 1,2,3 High side output voltage VS1,2,3 V
B1,2,3
VLO1,2,3 Low side output voltage 0 VCC
IR213(6,68) 10 20
IR21362 11.5 20
VCC Low side and logic fixed supply
voltage
IR213(6,63,65,66,67) 12 20
VSS Logic ground -5 5
VFLT FAULT output voltage VSS V
CC
VRCIN RCIN input voltage VSS V
CC
V
Note 1: Logic operational for VS of (COM - 5 V) to (COM + 600 V). Logic state held for VS of (COM - 5 V) to (COM – VBS).
(Please refer to the Design Tip DT97-3 for more details).
Note 2: All input pins and the ITRIP and EN pins are internally clamped with a 5.2 V zener diode.
Symbol Definition Min Max Units
VS High side offset voltage VB 1,2,3 - 25 VB 1,2,3 + 0.3
VB High side floating supply voltage -0.3 625
VHO High side floating output voltage VS1,2,3 - 0.3 VB 1,2,3 + 0.3
VCC Low side and logic fixed supply voltage -0.3 25
VSS Logic ground VCC - 25 VCC + 0.3
VLO1,2,3 Low side output voltage -0.3 VCC + 0.3
VIN Input voltage LIN, HIN, ITRIP, EN VSS -0.3
Lower of
(VSS + 15) or
VCC + 0.3)
VRCIN RCIN input voltage VSS -0.3 VCC + 0.3
VFLT FAULT output voltage VSS -0.3 VCC + 0.3
V
dV/dt Allowable offset voltage slew rate — 50
V/ns
(28 lead PDIP) — 1.5
(28 lead SOIC) — 1.6
PD Package power dissipation
@ TA ≤ +25 °C (44 lead PLCC) — 2.0
W
(28 lead PDIP) — 83
(28 lead SOIC) — 78
RthJA Thermal resistance, junction to
ambient (44 lead PLCC) — 63
°C/W
TJ Junction temperature — 150
TS Storage temperature -55 150
TL Lead temperature (soldering, 10 seconds) — 300
°C