1
RT8567
DS8567-00 April 2011 www.richtek.com
Ordering Information
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
6-CH 43V WLED Driver
General Description
The RT8567 is a high efficiency driver for white LEDs. It is
designed for LCD panels that employ an array of LEDs a s
the lighting source. An integrated current mode boost
controller drives six strings in parallel a nd supports up to
12 WLEDs per string. The internal current sinks support
a maximum of ±2% current mismatching for excellent
brightness uniformity in each string of LEDs. To provide
enough headroom for current sink operation, the boost
controller monitors the minimum voltage of the feedba ck
pins a nd regulates an optimized output voltage for power
efficiency.
The RT8567 ha s a wide input voltage range from 2.7V to
24V and can provide adjustable LED current from 5mA to
40mA. The internal 250mΩ, 43V power switch with current
mode control provides cycle-by-cycle over current
protection. The RT8567 also integrates PWM dimming
function for a ccurate LED current control. The input PWM
dimming frequency can operate from 200Hz to 25kHz
without inducing any inrush in LED current or inductor
current. The switching frequency of the RT8567 is also
adjustable from 500kHz to 2MHz, which allows flexibility
between efficiency and component size.
The RT8567 is available in a thin WQF N-20L 3x3 package.
Features
zz
zz
z Wide Input Voltage : 2.7V to 24V
zz
zz
z High Output Voltage : Up to 43V
zz
zz
z Channel Current Programmable : 5mA to 40mA
zz
zz
z Channel Current Regulation with Accuracy ±±
±±
±3% and
Matching ±±
±±
±2%
zz
zz
z Dimming Controls : External PWM Input Up to 25kHz
zz
zz
z Adjustable Switching Frequency : 500kHz to 2MHz
zz
zz
z Built-In Soft-Start
zz
zz
z Protections
``
``
` LED Strings Open Detection
``
``
` Current Limit Protection
``
``
` Programmable Over Voltage Protection
``
``
` Over Temperature Protection
zz
zz
z 20-Lead WQFN Package
zz
zz
zRoHS Compliant and Halogen Free
Applications
zUMPC and Notebook Computer Backlight
zGPS, Portable DVD Backlight
Pin Configurations
WQFN-20L 3x3
(TOP VIEW)
JY=YM
DNN
Marking Information
JY= : Product Code
YMDNN : Date Code
ISET
RT
VDC
EN PGND
OVP
CH1
NC
CH6
CH5
AGND
PWM
VIN
NC
COMP
15
14
13
12
17181920
1
2
3
4
9876
AGND
21 115
LX
16
NC CH2
CH3
10
CH4
Package Type
QW : WQFN-20L 3x3 (W-Type)
RT8567
Lead Plating System
G : Green (Halogen Free and Pb Free)
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RT8567
www.richtek.com DS8567-00 April 2011
Typical Application Circuit
10µH
OVP
CH1
CH2
CH3
CH6
ISET
EN
PWM
VIN
VOUT
19.6V(MAX)
VIN
3V to 8.5V
6 LEDs by
String
CH5
CH4
10µF
COMP
19
CIN
L1 D1
9, 21 (Exposed Pad)
AGND
10
4
3
20
18
2
8
7
6
14
11
12
RT8567 ROVP1
ROVP2
:
:
::
:
::
:
::
:
::
:
::
:
:
COUT
LX
16
Chip Enable
PWM Signal RT
RRT
51k
R3
10k
C3
10nF 51k
RISET PGND 15
10µF
C4
Open
1VDC
CDC
0.1µF
10
R2
C2
1µF
OVP setting <24V
10µH
OVP
CH1
CH2
CH3
CH6
ISET
EN
PWM
VIN
VOUT
43V(MAX)
VIN
6V to 24V
12 LEDs by
String
CH5
CH4
10µF
COMP
19
CIN
L1 D1
9, 21 (Exposed Pad)
AGND
10
4
3
20
18
2
8
7
6
14
11
12
RT8567 ROVP1
ROVP2
:
:
::
:
::
:
::
:
::
:
::
:
:
COUT
LX
16
Chip Enable
PWM Signal RT
RRT
51k
R3
10k
C3
10nF 51k
RISET PGND 15
10µF
C4
Open
1VDC
CDC
0.1µF
10
R2
C2
1µF
Figure 1. Application Circuit 1
Figure 2. Application Circuit 2
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RT8567
DS8567-00 April 2011 www.richtek.com
Functional Pin Description
Pi n No. Pi n Name Pin F unc t i on
1 VD C Internal Regulator Voltage. Connect a capacitor to ground.
2 EN Chip Enable Pin (Active High). Note that this pin is high impedance. There
should be a pull low 100kΩ resistor connected to AGND when the control
si gnal is fl oat in g.
3 RT Frequency Set Input. Used to set the switching frequency of the boost
conver ter. Connect a resistor to ground.
4 ISET
LED Current Set Pin. LED Current is Set by the Value of the Resistor RISET
C onnecte d from the I SET Pi n to gr ound. Do n ot short the ISE T pin to gr ound.
VISET i s ty pica l 1V.
5, 13, 17 N C N o In ternal Connecti on.
6 , 7, 8 , CH6 to C H4 Current Si nk Regulation Input. This pin shoul d be connected t o the cathode
of LED s if used. O therwise, i t shoul d be c onnected to gro und.
9, 21 (Exposed Pad) AGND Analog Ground of LE D Driver. The exposed pad m ust be sol der ed t o a large
PC B and connected to AG ND for maximum pow er dis si pat ion.
10,11,12 CH3 to CH1
Current Si nk Regulation Input. This pin shoul d be connected t o the cathode
of LED s if used. O therwise, i t should be c onnected to gro und.
14 O V P O ver Voltage Pro tection fo r B oost Converter. The detecti ng t hre shold is 1.2V.
1 5 PGND Po we r Gr o u nd o f Bo o s t Co nve rt e r .
16 LX S wi t c hing N ode for Boost C onver t er .
18 COMP
Compensation Pin for Error Amplifier. Connect a compensation network to
ground.
1 9 VIN LE D Po wer Supp ly Inp u t.
20 P WM P WM D imm ing C ont r ol Input .
Figure 3. Application Circuit 3
10µH
OVP
CH1
CH2
CH3
CH6
ISET
EN
PWM
VIN
VOUT
19.6V(MAX)
VIN
3V to 8.5V
6 LEDs by
String
CH5
CH4
10µF
COMP
19
CIN
L1 D1
9, 21 (Exposed Pad)
AGND
10
4
3
20
18
2
8
7
6
14
11
12
RT8567 ROVP1
ROVP2
:
:
:
:
:
::
:
::
:
::
:
::
:
:
COUT
LX
16
PWM Signal RT
RRT
51k
R3
10k
C3
10nF 51k
RISET PGND 15
10µF
C4
Open
1VDC
CDC
0.1µF
C2
1µF
5V
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RT8567
www.richtek.com DS8567-00 April 2011
Function Block Diagram
OSC
+
+
-
+
-
VDS
OCP &
OTP
Enable
Control
PWM
Controller
Mini LED
Selection
LED Open
Detection
+
-1.2V
+
-
+
-
+
-……
+
-
1V
6
EN
VIN RT OVP
ISET
COMP
CH1
CH2
AGND
CH6
LX
……
R
SQ
Q
PGND
VDC
PWM
EA
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RT8567
DS8567-00 April 2011 www.richtek.com
Electrical Characteristics
Recommended Operating Conditions (Note 4)
zSupply Input Voltage, VIN ------------------------------------------------------------------------------------------------ 2.7V to 24V
zJunction T emperature Range-------------------------------------------------------------------------------------------- 40°C to 125°C
zAmbient T emperature Range-------------------------------------------------------------------------------------------- 40°C to 85°C
Absolute Maximum Ratings (Note 1)
zVIN to GND------------------------------------------------------------------------------------------------------------------ 0.3V to 26.5V
zEN, PWM, VDC, ISET, COMP, R T to GND -------------------------------------------------------------------------- 0.3V to 26.5V
zLX to GND ------------------------------------------------------------------------------------------------------------------- 0.3V to 48V
zOVP, (CH1 to CH6) to GND --------------------------------------------------------------------------------------------- 0.3V to 48V
zPower Dissipation, PD @ TA = 25°C
WQFN20L 3x3------------------------------------------------------------------------------------------------------------ 1.471W
zPa ckage Thermal Resista nce (Note 2)
WQFN20L 3x3, θJA ------------------------------------------------------------------------------------------------------ 68°C/W
WQFN20L 3x3, θJC ------------------------------------------------------------------------------------------------------ 7.5°C/W
zLead T emperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C
zJunction T emperature----------------------------------------------------------------------------------------------------- 150°C
zStorage T emperature Range -------------------------------------------------------------------------------------------- 65°C to 150°C
zESD Susceptibility (Note 3)
HBM -------------------------------------------------------------------------------------------------------------------------- 2kV
MM---------------------------------------------------------------------------------------------------------------------------- 200V
(VIN = 4.5V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
IVCC V
COMP = 0V, No Switching -- 2 --
VIN Qu ie s c ent C urr e nt IVCC_LX V
COMP = 2V, S wi tc hin g -- 3 --
mA
Shu tdow n Cu rrent ISHDN V
IN = 4. 5V, EN = 0 - - - - 20 μA
VIN Rising -- 2.3 --
V IN U nder Volt age Loc kout
Threshold VUVLO VIN Falling -- 2.1 -- V
C ont r ol Input Logic-High VIH V
IN = 2. 7V to 2 4V 2 - - --
E N I nput Vol tag e
Threshold Logic-Low VIL V
IN = 2. 7V to 2 4V -- -- 0.8
V
Logic-High VIH V
IN = 2.7V to 24V 1.5 -- --
P WM Input Vol ta ge
Threshold Logic-Low VIL V
IN = 2. 7 V t o 24 V -- -- 0.6 V
Boost Converter RRT = 25kΩ -- 2 --
RRT = 5 1 k Ω 0.9 1 1.1
Sw itching Fr equen cy fOSC RRT = 100kΩ -- 0.5 --
MHz
LX On R esi sta nce (N -MOSF ET) R DS(ON) V
IN > 4. 5 V -- 0 .25 -- Ω
Minimu m On Tim e tMON f
OSC = 1MH z -- 120 -- ns
Maximum Duty DMAX V
COMP = 2 V, Swi tc h i ng -- 9 4 -- %
L X Current Limit ILIM 1.6 2 2.4 A
R egul ated VCHx V
CHx Highest LED St ring, ILED = 20mA -- 0.6 -- V
To be continued
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RT8567
www.richtek.com DS8567-00 April 2011
Parameter Symbol Test Conditions Min Typ Max Unit
LED Current P rogr am ming
LE D Cu r ren t Ac cur acy ILEDA 2V > VCHx > 0.6V, RISET = 51kΩ 3 -- 3 %
LE D Cu r ren t M a tc hing ILEDM
2V > VCHx > 0. 6V, RISET = 51kΩ,
Calculating
LEDx AVG
AVG
(I I ) 100%
I
× -- ±0.5 ±2 %
ISET Pin Voltage VISET -- 1 -- V
Faul t P r otection
O ver Vol tage T hr eshol d VOVP -- 1.2 -- V
OVP Fault VOVP_FAULT -- 50 -- mV
Ther mal Shutdown
Temperature TSD -- 150 -- °C
LED Channel U nder Voltage
Threshold VLSD No-Connection -- 60 -- mV
Note 1. Stresses listed as the above Absolute Maximum Ratings may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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RT8567
DS8567-00 April 2011 www.richtek.com
ISET Voltage v s. Temperature
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
-50 -25 0 25 50 75 100 125
Tempera ture (°C)
I SET Voltage (V)
LED Current vs. Te m perature
14
16
18
20
22
24
26
-50 -25 0 25 50 75 100 125
Temperature (°C)
LED Curr ent (m A)
Typical Operating Characteristics
LED Curre nt vs. Input Voltage
14
16
18
20
22
24
26
4 8 12 16 20 24
In put V olt age ( V )
Output Current (mA
)
10LEDs per channel, PWM = 3.3V, fOSC = 1MHz
LED1
LED2
LED3
LED4
LED5
LED6
10LEDs per channel, PWM = 3.3V, fOSC = 1MHz
LED Curren t vs. P WM Duty Cycle
0
4
8
12
16
20
0 20406080100
PWM Duty Cycle (%)
LED Current ( m A)
10LEDs per channel, fOSC = 1MHz
PWM = 200Hz
PWM = 1kHz
PWM = 10kHZ
PWM = 25kHz
10LEDs per channel, fOSC = 1MHz
Efficiency vs. Input Voltage
0
20
40
60
80
100
4 8 12 16 20 24
In put Voltage (V)
Eff iciency (%)
60LEDs, PWM = 3.3V, fOSC = 1MHz
ISET Voltage vs. Input Voltage
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
4 8 12 16 20 24
In put Vol ta ge (V)
I SET Volt age ( V)
10LEDs per channel, fOSC = 1MHz
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RT8567
www.richtek.com DS8567-00 April 2011
OVP Threshold Voltage vs. Input Voltage
1.0
1.1
1.2
1.3
1.4
1.5
4 8 12 16 20 24
In put Voltage (V)
OVP Threshold V oltage (V)
10LEDs per channel, fOSC = 1MHz
Line Transient Response
Time (50ms/Div)
VIN = 11V to 14V, PWM = 3.3V, f OSC = 1MHz
VIN
(5V/Div)
ILED
(50mA/Div)
Power On from EN
Time (5ms/Div)
VEN
(5V/Div)
VOUT
(20V/Div)
ILED
(20mA/Div)
VIN = 12V, PWM = 3.3V, fOSC = 1MHz
Power Off from EN
Time (25ms/Div)
VEN
(5V/Div)
VOUT
(20V/Div)
ILED
(20mA/Div)
VIN = 12V, PWM = 3.3V, fOSC = 1MHz
Quiescent Current vs. Temperature
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
3.00
-50 -25 0 25 50 75 100 125
Temperatur e (°C)
Quiescent C urrent ( m A) 1
VIN = 12V, f OSC = 1MHz
Line Transient Response
Time (50ms/Div)
VIN
(2V/Div)
ILED
(50mA/Div) VIN = 4.5V to 5.5V, PWM = 3.3V, fOSC = 1MHz
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RT8567
DS8567-00 April 2011 www.richtek.com
Application Information
The RT8567 is a current mode boost converter ca pable of
powering to 72 white LEDs with a progra mma ble current
for uniform intensity . The part integrates current sources,
soft-start, and easy analog and digital dimming control.
The protection block provides the circuitry for over
temperature, over voltage and current limit protection
features.
Input UVLO
The input operating voltage ra nge of the RT8567 is from
2.7V to 24V. An input ca pa citor at the VIN pin ca n reduce
ripple voltage. It is re commended to use a cera mic 10μF
or larger capacitance as the input capacitor. This IC provides
an Under Voltage Lockout (UVLO) function to enhance
the stability during startup. The UVLO threshold of the
input rising voltage is set at 2.3V typically with a 0.2V
hysteresis.
Soft-Start
The function of the soft-start is defined by two periods.
The first period is capped at the peak current limit with
the time decided by the ratio of VOUT and VIN. However ,
an external capacitor, VOUT, can also affect the time of
charging. The second period is defined by the slowly
ra mping of the ILED current by the ISET voltage. Thus, the
inrush current is limited by the boost converter and current
regulator.
Compensation
The control loop can be compensated by adjusting the
external components connected to the COMP pin. The
COMP pin is the output of the internal error a mplifier . The
compensation capacitors, C3 and C4, will adjust the
integrator zero and pole respectively to maintain stability .
Moreover, the resistor, R3, will adjust the frequency
integrator gain for fa st tra nsient response.
LED Connection
The RT8567 equips 6-CH LED drivers with each channel
supporting up to 12 LEDs. The 6 LED strings are
connected from VOUT to pin 6, 7, 8, 10, 11, and 12
respectively. If one of the LED channels is not used, the
unused LED pin should be opened directly.
Setting and Regulation of LED current
The LED current can be calculated by the following
equation :
LED ISET
1020
I = R
where, RISET is the resistor between the ISET pin and
GND.
This setting is the reference for the LED current at CH1 to
CH6 and represents the sensed LED current for each string.
The DC/DC converter regulates the LED current according
to the setting.
Brightness Control
The RT8567 brightness dimming is determined by the
signal on the PWM pin with a suggested PWM frequency
range from 200Hz to 25kHz. Referring to the following curve,
the minimum dimming duty can be as low as 1% for the
frequency ra nge from 200Hz to 1kHz. For the frequency
range from 1kHz to 10kHz, the dimming duty is at most
5%. If the frequency is increased to 25kHz, the dimming
duty will be up to 10%.
Over Voltage Protection
The RT8567 equips an Over Voltage Protection (OVP)
function. When the voltage at the OVP pin reaches a
threshold of a pproximately 1.2V , the MOSFET driver turns
off. The MOSFET driver turns on again once the voltage
at OVP drops below the threshold voltage. Thus, the
LED Curren t vs. P WM Duty Cycle
0
4
8
12
16
20
0 20406080100
PWM Duty Cycle (%)
LED Current ( m A)
PWM = 200Hz
PWM = 1kHz
PWM = 10kHZ
PWM = 25kHz
Figure 1
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RT8567
www.richtek.com DS8567-00 April 2011
)×OVP2
OUT, OVP OVP OVP1
1+R
V = V(
R
where ROVP1 and ROVP2 are the resistors in the voltage
divider connected to the OVP pin. If at least one string is
in normal operation, the controller will automatically ignore
the open strings a nd continue to regulate the current f or
the string(s) in normal operation.
Current Limit Protection
The RT8567 can limit the peak current to achieve over
current protection. The RT8567 senses the inductor
current through LX pin in the ON period. The duty cycle
depends on the current sense signal summed with the
internal slope compensation a nd compared to the COMP
signal. The internal N-MOSFET will be turned off when
the current signal is larger than the COMP signal. In the
OFF period, the inductor current will descend. The internal
MOSFET is turned on by the oscillator in the next starting
cycle.
Over Temperature Protection
The RT8567 has an over temperature protection (OTP)
function to prevent excessive power dissipation from
overheating the device. The OTP will shut down switching
operation when the junction temperature exceeds 150°C.
Inductor Selection
The value of the output inductor (L), where the tra nsition
from discontinuous to continuous mode occurs is
a pproxi mated by the following equation :
output voltage ca n be cla mped at a certain voltage level.
This voltage level can be calculated by the following
equation :
−×
×××
2
OUT IN IN2
OUT OUT
(V V ) V
L = 2I fV
where,
VOUT = maximum output voltage.
VIN = minimum input voltage.
f = operating frequency .
IOUT = sum of current from all LED strings.
η is the eff iciency of the power converter .
The boost converter operates in discontinuous mode over
())
×−
×
×
η
OUT OUT OUT IN
IN
PEAK IN OUT
VI VV
VT
I) + ((
x V 2 L V
Diode Selection
Schottky diode is a good choice for any asynchronous
boost converter due to its small forward voltage a nd fast
switching Speed. However, when selecting a Schottky
diode, important parameters such as power dissipation,
reverse voltage rating and pulsating peak current must all
be taken into consideration. Choose a suitable diode with
reverse voltage rating greater tha n the maxi mum output
voltage.
Capacitor Selection
The input ca pacitor reduces current spikes from the input
supply and minimizes noise injection to the converter. For
most a pplications, a 10μF cera mic ca p acitor is suf ficient.
A value higher or lower may be used depending on the
noise level from the input supply a nd the input current to
the converter. It is recommended to choose a ceramic
ca pacitor based on the output voltage ripple requirements.
The minimum value of the output capacitor COUT, can be
calulated by the following equation :
the entire input voltage ra nge when the L1 inductor value
is less tha n this value L. With a n inductance gre ater than
L, the converter operates in continuous mode at the
minimum input voltage and may be discontinuous at higher
voltages.
The selected inductor must be selected with saturation
current rating greater than the peak current provided by
the following equation :
−×
×××
η
OUT IN OUT
OUT RIPPLE OUT
(V V ) I
C = VVf
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) TA) / θJA
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RT8567
DS8567-00 April 2011 www.richtek.com
Figure 2. Derating Curve for RT8567 Package
where TJ(MAX) is the maximum junction temperature, TA is
the a mbient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT8567, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to a mbient
thermal resistance, θJA, is layout dependent. For
WQFN-20L 3x3 pa ckages, the thermal resistance, θJA, is
68°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
PD(MAX) = (125°C 25°C) / (68°C/W) = 1.471W for
WQF N-20L 3x3 package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. For the RT8567 package, the derating
curve in Figure 2 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0 25 50 75 100 125
Ambien t Tempera tu re (°C)
Maximum Power Dissipati on (W ) 1
Four-Layer PCB
Layout Considerations
PCB layout is very important for designing switching power
converter circuits. The following layout guides should be
strictly followed for best performa nce of the RT8567.
`The power components L1, D1, CIN, COUT must be placed
as close to the IC as possible to reduce current loop.
The PCB trace between power components must be as
short a nd wide as possible.
`Place L1 and D1 as close to the LX pin a s possible. The
tra ce should be as short a nd wide as possible.
`The compensation circuit should be kept away from
the power loops and shielded with a ground trace to
prevent any noise coupling. Place the compensation
components as close to the COMP pin as possible.
`The exposed pad of the chip should be connected to
ground plane for thermal consideration.
Figure 3. PCB Layout Guide
GND
GND
ISET
RT
VDC
EN PGND
OVP
CH1
NC
CH6
CH5
AGND
PWM
VIN
NC
COMP
15
14
13
12
17181920
1
2
3
4
9876
AGND
21 115
LX
16
NC CH2
CH3
10
CH4
GND
RISET
VOUT
VIN
CIN
L1
D1
C4
R3
C3
C2
Place the power
components as
Close as possible.
The traces should
be wide and short
especially for the
high current loop.
The compensation circ uit s hould be k ept away from The power loops
and shielded with a ground trace to prevent any noise coupling.
Locate the C2 as
close to VIN as
possible.
Locate RISET as
close to ISET
as possible.
COUT
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RT8567
www.richtek.com DS8567-00 April 2011
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Outline Dimension
Dimension s In Millimeters Dimen sio ns In Inches
Symbol Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.150 0.250 0.006 0.010
D 2.900 3.100 0.114 0.122
D2 1.650 1.750 0.065 0.069
E 2.900 3.100 0.114 0.122
E2 1.650 1.750 0.065 0.069
e 0.400 0.016
L 0.350 0.450
0.014 0.018
W-Type 20L QFN 3x3 Package
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
DETAIL A
Pin #1 ID a nd T ie Bar M ark Options
1
1
22