MCP2542FD/4FD, MCP2542WFD/4WFD CAN FD Transceiver with Wake-Up Pattern (WUP) Option Features Description * Supports CAN 2.0 and CAN with Flexible Data Rate (CAN FD) Physical Layer Transceiver Requirements * Optimized for CAN FD at 2, 5 and 8 Mbps Operation - Maximum propagation delay: 120 ns - Loop delay symmetry: -10%/+10% (2 Mbps) * MCP2542FD/4FD: - Wake-up on CAN activity, 3.6 s filter time * MCP2542WFD/4WFD: - Wake-up on Pattern (WUP), as specified in ISO11898-2:2015, 3.6 s activity filter time * Implements ISO11898-2:2003, ISO11898-5:2007, and ISO/DIS11898-2:2015 * Qualification: AEC-Q100 Rev. G, Grade 0 (-40C to +150C) * Very Low Standby Current (4 A, typical) * VIO Supply Pin to Interface Directly to CAN Controllers and Microcontrollers with 1.8V to 5V I/O * CAN Bus Pins are Disconnected when Device is Unpowered - An unpowered node or brown-out event will not load the CAN bus - Device is unpowered if VDD or VIO drop below its POR level * Detection of Ground Fault: - Permanent Dominant detection on TXD - Permanent Dominant detection on bus * Automatic Thermal Shutdown Protection * Suitable for 12V and 24V Systems * Meets or Exceeds Stringent Automotive Design Requirements Including "Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automotive Applications", Version 1.3, May 2012 - Conducted emissions @ 2 Mbps with Common-Mode Choke (CMC) - Direct Power Injection (DPI) @ 2 Mbps with CMC * Meets SAE J2962/2 "Communication Transceiver Qualification Requirements - CAN" - Radiated emissions @ 2 Mbps without a CMC * High Electrostatic Discharge (ESD) Protection on CANH and CANL, meeting IEC61000-4-2 up to 13 kV * Temperature ranges: - Extended (E): -40C to +125C - High (H): -40C to +150C The MCP2542FD/4FD and MCP2542WFD/4WFD CAN transceiver family is designed for high-speed CAN FD applications up to 8 Mbps communication speed. The maximum propagation delay was improved to support longer bus length. The device meets the automotive requirements for CAN FD bit rates exceeding 2 Mbps, low quiescent current, electromagnetic compatibility (EMC) and electrostatic discharge (ESD). Applications CAN 2.0 and CAN FD networks in Automotive, Industrial, Aerospace, Medical, and Consumer applications. Package Types MCP2542FD MCP2542WFD 3x3 DFN* MCP2544FD MCP2544WFD 3x3 DFN* TXD 1 8 STBY TXD 1 VSS 2 7 CANH VSS 2 6 CANL VDD 3 5 VIO RXD 4 VDD 3 EP 9 RXD 4 MCP2542FD MCP2542WFD 8-Lead SOIC TXD 1 8 STBY EP 9 7 CANH 6 CANL 5 NC MCP2544FD MCP2544WFD 8-Lead SOIC 8 STBY TXD 1 8 STBY 7 CANH VSS 2 7 CANH VSS 2 VDD 3 6 CANL VDD 3 6 CANL RXD 4 5 VIO RXD 4 5 NC MCP2542FD MCP2542WFD 2x3 TDFN* TXD 1 VSS 2 VDD 3 RXD 4 EP 9 MCP2544FD MCP2544WFD 2x3 TDFN* 8 STBY TXD 1 7 CANH VSS 2 6 CANL 5 VIO VDD 3 8 STBY EP 9 RXD 4 7 CANH 6 CANL 5 NC * Includes Exposed Thermal Pad (EP); see Table 1-1. MCP2542FD/4FD, MCP2542WFD/4WFD Family Members Device VIO pin WUP Description MCP2542FD Yes No MCP2544FD No No Internal level shifter on digital I/O pins MCP2542WFD Yes Yes Wake-Up on Pattern (see Section 1.6.5) MCP2544WFD No Yes Internal level shifter on digital I/O pins; Wake-Up on Pattern Note: For ordering information, see the Product Identification System section. 2016 Microchip Technology Inc. DS20005514A-page 1 MCP2542FD/4FD, MCP2542WFD/4WFD Block Diagram VIO VDD Digital I/O Supply Thermal Protection POR UVLO VIO Permanent Dominant Detect TXD CANH Driver and Slope Control VIO CANL STBY Mode Control VDD CANH Wake-Up Filter LP_RX CANL VDD RXD CANH HS_RX CANL VSS Note 1: There is one receiver implemented. The receiver can operate in Low-Power or High-Speed mode. 2: Only MCP2542FD and MCP2542WFD have the VIO pin. 3: In the MCP2544FD and MCP2544WFD, the supply for the digital I/O is internally connected to VDD. DS20005514A-page 2 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD 1.0 DEVICE OVERVIEW The MCP2542FD/4FD and MCP2542WFD/4WFD devices serve as the interface between a CAN protocol controller and the physical bus. The devices provide differential transmit and receive capability for the CAN protocol controller. The devices are fully compatible with the ISO11898-2 and ISO11898-5 standards, and with the ISO/DIS11898-2:2015 working draft. Excellent Loop Delay Symmetry supports data rates up to 8 Mbps for CAN FD. The maximum propagation delay was improved to support longer bus length. Typically, each node in a CAN system must have a device to convert the digital signals generated by a CAN controller to signals suitable for transmission over the bus cabling (differential output). It also provides a buffer between the CAN controller and the high-voltage spikes that can be generated on the CAN bus by outside sources. The MCP2542FD/4FD wakes up on CAN activity (basic wake-up). The CAN activity filter time is 3.6 s maximum. The MCP2542WFD/4WFD wakes up after receiving two consecutive dominant states separated by a recessive state: WUP. The minimum duration of each dominant and recessive state is tFILTER. The complete WUP has to be detected within tWAKE(TO). 1.1 Transmitter Function The CAN bus has two states: Dominant and Recessive. A Dominant state occurs when the differential voltage between CANH and CANL is greater than VDIFF(D)(I). A Recessive state occurs when the differential voltage is less than VDIFF(R)(I). The Dominant and Recessive states correspond to the Low and High states of the TXD input pin, respectively. However, a Dominant state initiated by another CAN node will override a Recessive state on the CAN bus. 1.2 Receiver Function In Normal mode, the RXD output pin reflects the differential bus voltage between CANH and CANL. The Low and High states of the RXD output pin correspond to the Dominant and Recessive states of the CAN bus, respectively. 1.3 Internal Protection CANH and CANL are protected against battery short circuits and electrical transients that can occur on the CAN bus. This feature prevents destruction of the transmitter output stage during such a fault condition. All other parts of the chip remain operational, and the chip temperature is lowered due to the decreased power dissipation in the transmitter outputs. This protection is essential to protect against bus line short-circuit-induced damage. Thermal protection is only active during Normal mode. 1.4 Permanent Dominant Detection The MCP2542FD/4FD and MCP2542WFD/4WFD device prevents two conditions: * Permanent Dominant condition on TXD * Permanent Dominant condition on the bus In Normal mode, if the MCP2542FD/4FD and MCP2542WFD/4WFD detects an extended Low state on the TXD input, it will disable the CANH and CANL output drivers in order to prevent the corruption of data on the CAN bus. The drivers will remain disabled until TXD goes High. The high-speed receiver is active and data on the CAN bus is received on RXD. In Standby mode, if the MCP2542FD/4FD and MCP2542WFD/4WFD detects an extended dominant condition on the bus, it will set the RXD pin to a Recessive state. This allows the attached controller to go to Low-Power mode until the dominant issue is corrected. RXD is latched High until a Recessive state is detected on the bus and the Wake-Up function is enabled again. 1.5 Power-On Reset (POR) and Undervoltage Detection The MCP2542FD/4FD and MCP2542WFD/4WFD have POR detection on both supply pins: VDD and VIO. Typical POR thresholds to deassert the reset are 1.2V and 3.0V for VIO and VDD, respectively. When the device is powered on, CANH and CANL remain in a high-impedance state until VDD exceeds its undervoltage level. Once powered on, CANH and CANL will enter a high-impedance state if the voltage level at VDD drops below the undervoltage level, providing voltage brown-out protection during normal operation. In Normal mode, the receiver output is forced to Recessive state during an undervoltage condition on VDD. In Standby mode, the low-power receiver is designed to work down to 1.7V VIO. Therefore, the low-power receiver remains operational down to VPORL on VDD (MCP2544FD and MCP2544WFD). The MCP2542FD and MCP2542WFD transfers data to the RXD pin down to 1.7V on the VIO supply. The device is further protected from excessive current loading by thermal shutdown circuitry that disables the output drivers when the junction temperature exceeds a nominal limit of +175C. 2016 Microchip Technology Inc. DS20005514A-page 3 MCP2542FD/4FD, MCP2542WFD/4WFD 1.6 Mode Control The main difference between the MCP2542FD/4FD and MCP2542WFD/4WFD is the wake-up method. Figure 1-1 shows the state diagram of the MCP2542FD/4FD. The devices wake up on CAN activity. Figure 1-2 shows the state diagram of the MCP2542WFD/4WFD. The devices wake up on a WUP. 1.6.1 UNPOWERED MODE (POR) The MCP2542FD/4FD and MCP2542WFD/4WFD enter Unpowered mode under the following conditions: * After powering up the device, or * If VDD drops below VPORL, or * If VIO drops below VPORL_VIO. In Unpowered mode, the CAN bus will be biased to ground using a high impedance. The MCP2542FD/4FD and MCP2542WFD/4WFD are not able to communicate on the bus or detect a wake-up event. 1.6.2 WAKE MODE The MCP2542FD/4FD and MCP2542WFD/4WFD transitions from Unpowered mode to Wake mode when VDD and VIO are above their PORH levels. From Normal mode, the device will also enter Wake mode if VDD is smaller than VUVL, or if the band gap output voltage is not within valid range. Additionally, the device will transition from Standby mode to Wake mode if STBY is pulled Low. In Wake mode, the CAN bus is biased to ground and RXD is always high. 1.6.3 NORMAL MODE When VDD exceeds VUVH, the band gap is within valid range and TXD is High, the device transitions into Normal mode. During POR, when the microcontroller powers up, the TXD pin could be unintentionally pulled down by the microcontroller powering up. To avoid driving the bus during a POR of the microcontroller, the transceiver proceeds to Normal mode only after TXD is high. The low-power receiver and the wake-up block are enabled in order to monitor the bus for activity. The CAN bus is biased to ground. The RXD pin remains HIGH until a wake-up event has occurred. The MCP2542FD/4FD uses Basic Wake-Up: one dominant phase for a minimum time of tFILTER will wake up the device. The MCP2542WFD/4WFD will only wake up if it detects a complete WUP. The WUP method is described in the next section. After a wake-up event was detected, the CAN controller gets interrupted by a negative edge on the RXD pin. The CAN controller must put the MCP2542FD/4FD and MCP2542WFD/4WFD back into Normal mode by deasserting the STBY pin in order to enable high-speed data communication. The CAN bus Wake-Up function requires both supply voltages, VDD and VIO, to be in valid range. 1.6.5 REMOTE WAKE-UP VIA CAN BUS (WUP) The MCP2542WFD/4WFD wakes up from Standby/Silent mode when a dedicated wake-up pattern (WUP) is detected on the CAN bus. The wake-up pattern is specified in ISO11898-6 and ISO/DIS11898-2:2015 (see Figure 1-2 and Figure 2-11). The Wake-Up Pattern consists of three events: * a Dominant phase of at least tFILTER, followed by * a Recessive phase of at least tFILTER, followed by * a Dominant phase of at least tFILTER The complete pattern must be received within tWAKE(TO). Otherwise, the internal wake-up logic is reset and the complete wake-up pattern must be retransmitted in order to trigger a wake-up event. In Normal mode, the driver block is operational and can drive the bus pins. The slopes of the output signals on CANH and CANL are optimized to reduce Electromagnetic Emissions (EME). The CAN bus is biased to VDD/2. The high-speed differential receiver is active. 1.6.4 STANDBY MODE The device may be placed in Standby mode by applying a high level to the STBY pin. In Standby mode, the transmitter and the high-speed part of the receiver are switched off to minimize power consumption. DS20005514A-page 4 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD FIGURE 1-1: MCP2542FD/4FD STATE DIAGRAM: BASIC WAKE-UP From any Vtate UnSowered (POR) CAN High Impedance Common mode tied to GND HS RX OFF Wake-Up Disabled RXD High Bandgap OFF TXD Time Out CAN Recessive Common mode VDD/2 HS RX ON Wake-Up Disabled 5;' I +65; VDD > VPORH And VIO > VPORH_VIO And STBY Low VDD > VPORH And VIO > VPORH_VIO And STBY High Wake Start Bandgap CAN High Impedance Common mode tied to GND HS RX OFF Wake-Up Disabled RXD High TXD Low > TPDT TXD High Or And T > TJ(SD) T < TJ(SD)-TJ(HYST) TXD High And Bandgap OK And VDD > VUVH Bandgap not OK Or VDD < VUVL Normal CAN Driven Common mode VDD/2 HS RX ON Wake-Up Disabled RXD = f(HS RX) STBY Low Standby CAN High Impedance Common mode tied to GND HS RX OFF Wake-Up Enabled RXD = f(LP RX) Stop Bandgap 2016 Microchip Technology Inc. Bus Dominant > tPDT Bus Recessive Bus Dominant Time Out CAN High Impedance Common mode tied to GND HS RX OFF Wake-Up Disabled RXD High DS20005514A-page 5 MCP2542FD/4FD, MCP2542WFD/4WFD FIGURE 1-2: MCP2542WFD/4WFD STATE DIAGRAM: WAKE-UP PATTERN From any State UnPowered (POR) CAN High Impedance Common mode tied to GND HS RX OFF Wake-Up Disabled RXD High Bandgap OFF TXD Time Out CAN Recessive Common mode VDD/2 HS RX ON Wake-Up Disabled RXD = f(HS RX) VDD > VPORH And VIO > VPORH_VIO And STBY Low TXD Low > TPDT TXD High Or And T > TJ(SD) T < TJ(SD)-TJ(HYST) Wake Start Bandgap CAN High Impedance Common mode tied to GND HS RX OFF Wake-Up Disabled RXD High TXD High And Bandgap OK And VDD > VUVH Bandgap Not Ok Or VDD < VUVL Normal CAN Driven Common mode VDD/2 HS RX ON Wake-Up Disabled RXD = f(HS RX) STBY High Standby Standby Init CAN High Impedance Common mode tied to GND HS RX OFF Wake-Up Enabled RXD High Stop Bandgap Standby 3 RXD High Bus Dominant > tFILTER Standby 1 Start t WAKE TIME OUT RXD High tWAKE(TO) Expired Bus Recessive > tFILTER Standby 2 RXD High Bus Dominant > tFILTER Bus Dominant Time Out CAN High Impedance Common mode tied to GND HS RX OFF Wake-Up Disabled RXD High DS20005514A-page 6 Bus Dominant > tPDT Standby/Receiving CAN High Impedance Common mode tied to GND HS RX OFF RXD = f(LP RX) Bus Recessive 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD 1.7 Pin Descriptions The description of the pins are listed in Table 1-1. TABLE 1-1: MCP2542/4FD AND MCP2542/4WFD PIN DESCRIPTIONS MCP2542FD MCP2542WFD 3x3 DFN, 2x3TDFN MCP2542FD MCP2542WFD SOIC MCP2544FD MCP2544WFD 3x3 DFN, 2x3TDFN MCP2544FD MCP2544WFD SOIC Symbol 1 1 1 1 TXD Transmit Data Input 2 2 2 2 VSS Ground 3 3 3 3 VDD Supply Voltage 4 4 4 4 RXD Receive Data Output -- -- 5 5 NC No Connect 5 5 -- -- VIO Digital I/O Supply Pin 6 6 6 6 CANL CAN Low-Level Voltage I/O 7 7 7 7 CANH CAN High-Level Voltage I/O 8 8 8 8 STBY Standby Mode Input 9 -- 9 -- EP 1.7.1 TRANSMITTER DATA INPUT PIN (TXD) The CAN transceiver drives the differential output pins CANH and CANL according to TXD. It is usually connected to the transmitter data output of the CAN controller device. When TXD is Low, CANH and CANL are in the Dominant state. When TXD is High, CANH and CANL are in the Recessive state, provided that another CAN node is not driving the CAN bus with a Dominant state. TXD is connected from an internal pull-up resistor (nominal 33 k) to VIO in the MCP2542FD and MCP2542WFD, and to VDD in the MCP2544FD and MCP2544WFD. 1.7.2 GROUND SUPPLY PIN (VSS) Ground supply pin. 1.7.3 SUPPLY VOLTAGE PIN (VDD) Positive supply voltage pin. Supplies transmitter and receiver, including the wake-up receiver. 1.7.4 RECEIVER DATA OUTPUT PIN (RXD) RXD is a CMOS-compatible output that drives High or Low depending on the differential signals on the CANH and CANL pins, and is usually connected to the receiver data input of the CAN controller device. RXD is High when the CAN bus is Recessive, and Low in the Dominant state. RXD is supplied by VIO in the MCP2542FD and MCP2542WFD and by VDD in the MCP2544FD and MCP2544WFD. 1.7.5 NC PIN (MCP2544FD AND MCP2544WFD) No Connect. This pin can be left open or connected to VSS. 2016 Microchip Technology Inc. 1.7.6 Pin Function Exposed Thermal Pad VIO PIN (MCP2542FD AND MCP2542WFD) Supply for digital I/O pins. In the MCP2544FD and MCP2544WFD, the supply for the digital I/O (TXD, RXD and STBY) is internally connected to VDD. 1.7.7 DIGITAL I/O The MCP2542FD/4FD and MCP2542WFD/4WFD enable easy interfacing to MCU with I/O ranges from 1.8V to 5V. 1.7.7.1 MCP2544FD and MCP2544WFD The VIH(MIN) and VIL(MAX) for STBY and TXD are independent of VDD. They are set at levels that are compatible with 3V and 5V microcontrollers. The RXD pin is always driven to VDD, therefore a 3V microcontroller will need a 5V tolerant input. 1.7.7.2 MCP2542FD and MCP2542WFD VIH and VIL for STBY and TXD depend on VIO. The RXD pin is driven to VIO. 1.7.8 CAN LOW PIN (CANL) The CANL output drives the Low side of the CAN differential bus. This pin is also tied internally to the receive input comparator. CANL disconnects from the bus when MCP2542FD/4FD and MCP2542WFD/4WFD are not powered. 1.7.9 CAN HIGH PIN (CANH) The CANH output drives the high side of the CAN differential bus. This pin is also tied internally to the receive input comparator. CANH disconnects from the bus when MCP2542FD/4FD and MCP2542WFD/4WFD are not powered. DS20005514A-page 7 MCP2542FD/4FD, MCP2542WFD/4WFD 1.7.10 STANDBY MODE INPUT PIN (STBY) This pin selects between Normal or Standby mode. In Standby mode, the transmitter and high-speed receiver are turned off, only the low-power receiver and wake-up filter are active. STBY is connected from an internal MOS pull-up resistor to VIO in the MCP2542FD and MCP2542WFD, and to VDD in the MCP2544FD and MCP2544WFD. The value of the MOS pull-up resistor depends on the supply voltage. Typical values are 660 k for 5V, 1.1 M for 3.3V and 4.4 M for 1.8V. 1.7.11 EXPOSED THERMAL PAD (EP) It is recommended to connect this pad to VSS to enhance electromagnetic immunity and thermal resistance. DS20005514A-page 8 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD 1.8 Typical Applications In order to meet the EMC/EMI requirements, a Common Mode Choke (CMC) may be required for data rates greater than 1 Mbps. Figure 1-3 and Figure 1-4 illustrate examples of typical applications of the devices. FIGURE 1-3: MCP2544WFD WITH NC AND SPLIT TERMINATION VBAT 5V LDO 0.1 F VDD CANTX TXD CANRX RXD RBX STBY VSS FIGURE 1-4: MCP2544WFD PIC(R) MCU VDD VSS CANH CANH 60 4700 pF NC 60 CANL CANL MCP2542FD WITH VIO PIN VBAT 5V LDO EN 3.3V LDO 0.1 F RBX CANTX CANRX VSS 2016 Microchip Technology Inc. RBX VIO TXD RXD STBY MCP2542FD (R) PIC MCU VDD 0.1 F VSS CANH VDD CANH 120 CANL CANL DS20005514A-page 9 MCP2542FD/4FD, MCP2542WFD/4WFD NOTES: DS20005514A-page 10 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD 2.0 ELECTRICAL CHARACTERISTICS 2.1 Terms and Definitions A number of terms are defined in ISO-11898 that are used to describe the electrical characteristics of a CAN transceiver device. These terms and definitions are summarized in this section. 2.1.1 BUS VOLTAGE VCANL and VCANH denote the voltages of the bus line wires CANL and CANH relative to the ground of each individual CAN node. 2.1.2 COMMON MODE BUS VOLTAGE RANGE Boundary voltage levels of VCANL and VCANH with respect to ground, for which proper operation will occur, if up to the maximum number of CAN nodes are connected to the bus. 2.1.3 2.1.5 DIFFERENTIAL VOLTAGE, VDIFF (OF CAN BUS) Differential voltage of the two-wire CAN bus, with value equal to VDIFF = VCANH - VCANL. 2.1.6 INTERNAL CAPACITANCE, CIN (OF A CAN NODE) Capacitance seen between CANL (or CANH) and ground during the Recessive state when the CAN node is disconnected from the bus (see Figure 2-1). 2.1.7 INTERNAL RESISTANCE, RIN (OF A CAN NODE) Resistance seen between CANL (or CANH) and ground during the Recessive state when the CAN node is disconnected from the bus (see Figure 2-1). FIGURE 2-1: PHYSICAL LAYER DEFINITIONS ECU DIFFERENTIAL INTERNAL CAPACITANCE, CDIFF (OF A CAN NODE) RIN Capacitance seen between CANL and CANH during the Recessive state when the CAN node is disconnected from the bus (see Figure 2-1). RIN CANL CANH CIN 2.1.4 DIFFERENTIAL INTERNAL RESISTANCE, RDIFF (OF A CAN NODE) CDIFF RDIFF CIN GROUND Resistance seen between CANL and CANH during the Recessive state when the CAN node is disconnected from the bus (see Figure 2-1). 2016 Microchip Technology Inc. DS20005514A-page 11 MCP2542FD/4FD, MCP2542WFD/4WFD 2.2 Absolute Maximum Ratings VDD .............................................................................................................................................................................7.0V VIO ..............................................................................................................................................................................7.0V DC Voltage at TXD, RXD, STBY and VSS .............................................................................................-0.3V to VIO + 0.3V DC Voltage at CANH and CANL .................................................................................................................. -58V to +58V Transient Voltage on CANH and CANL (ISO-7637) (Figure 2-5) ............................................................. -150V to +100V Differential Bus Input Voltage VDIFF(I) (t = 60 days, continuous)....................................................................-5V to +10V Differential Bus Input Voltage VDIFF(I) (1000 pulses, t = 0.1 ms, VCANH = +18V) .....................................................+17V Dominant State Detection VDIFF(I) (10000 pulses, t = 1 ms) .......................................................................................+9V Storage temperature ...............................................................................................................................-55C to +150C Operating ambient temperature ..............................................................................................................-40C to +150C Virtual Junction Temperature, TVJ (IEC60747-1) ....................................................................................-40C to +190C Soldering temperature of leads (10 seconds) .......................................................................................................+300C ESD protection on CANH and CANL pins (IEC 61000-4-2) ...................................................................................13 kV ESD protection on CANH and CANL pins (IEC 801; Human Body Model)..............................................................8 kV ESD protection on all other pins (IEC 801; Human Body Model).............................................................................4 kV ESD protection on all pins (IEC 801; Machine Model) ............................................................................................400V ESD protection on all pins (IEC 801; Charge Device Model) ..................................................................................750V Notice: Stresses above those listed under "Maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. DS20005514A-page 12 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD TABLE 2-1: DC CHARACTERISTICS DC Specifications Parameter Electrical Characteristics: Unless otherwise indicated, Extended (E): TAMB = -40C to +125C and High (H): TAMB = -40C to +150C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless otherwise specified. Sym. Min. Typ. Max. Units VDD 4.5 -- 5.5 V -- 2.5 5 IDD mA -- 55 70 -- 4 15 -- 4 16 Conditions Supply VDD Pin Voltage Range Supply Current Standby Current IDDS Recessive; VTXD = VDD Dominant; VTXD = 0V A MCP2544FD and MCP2544WFD, Bus Recessive MCP2542FD and MCP2542WFD, Includes IIO Maximum Supply Current IDDMAX -- 95 140 mA Fault condition: VTXD = VSS; VCANH = VCANL = -5V to +18V (Note 1) High Level of the POR Comparator for VDD VPORH -- 3.0 3.95 V Note 1 Low Level of the POR Comparator for VDD VPORL 1.0 2.0 3.2 V Note 1 Hysteresis of POR Comparator for VDD VPORD 0.2 0.9 2.0 V Note 1 High Level of the UV Comparator for VDD VUVH 4.0 4.25 4.4 V Low Level of the UV Comparator for VDD VUVL 3.6 3.8 4.0 V Hysteresis of UV comparator VUVD -- 0.4 -- V Digital Supply Voltage Range VIO 1.7 -- 5.5 V Supply Current on VIO IIO -- 7 20 A -- 200 400 IDDS -- 0.3 2 A High Level of the POR Comparator for VIO VPORH_VIO 0.8 1.2 1.7 V Low Level of the POR Comparator for VIO VPORL_VIO 0.7 1.1 1.4 V Hysteresis of POR Comparator for VIO VPORD_VIO -- 0.2 -- V Note 1 VIO Pin Standby Current Recessive; VTXD = VIO Dominant; VTXD = 0V Bus Recessive (Note 1) Bus Line (CANH; CANL) Transmitter CANH; CANL: Recessive Bus Output Voltage VO(R) 2.0 0.5 VDD 3.0 V VTXD = VDD; No load CANH; CANL: Bus Output Voltage in Standby VO(S) -0.1 0.0 +0.1 V STBY = VTXD = VDD; No load Note 1: 2: 3: Characterized; not 100% tested. Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFD, VIO is internally connected to VDD. -12V to 12V is ensured by characterization, and tested from -2V to 7V. 2016 Microchip Technology Inc. DS20005514A-page 13 MCP2542FD/4FD, MCP2542WFD/4WFD TABLE 2-1: DC CHARACTERISTICS (CONTINUED) DC Specifications Parameter Recessive Output Current CANH: Dominant Output Voltage Electrical Characteristics: Unless otherwise indicated, Extended (E): TAMB = -40C to +125C and High (H): TAMB = -40C to +150C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless otherwise specified. Sym. Dominant: Differential Output Voltage Recessive: Differential Output Voltage CANH: Short-Circuit Output Current Typ. Max. Units Conditions IO(R) -5 -- +5 mA VO(D) 2.75 3.50 4.50 V 0.50 1.50 2.25 VSYM 0.9 1.0 1.1 V 1 MHz square wave, Recessive and Dominant states, and transition (Note 1) VO(DIFF)(D) 1.5 2.0 3.0 V VTXD = VSS; RL = 50 to 65 (Figure 2-2, Figure 2-4, Section 3.0) (Note 1) 1.4 2.0 3.3 VTXD = VSS; RL = 45 to 70 (Figure 2-2, Figure 2-4, Section 3.0) (Note 1) 1.3 2.0 3.3 VTXD = VSS; RL = 40 to 75 (Figure 2-2, Figure 2-4) 1.5 -- 5.0 VTXD = VSS; RL = 2240 (Figure 2-2, Figure 2-4, Section 3.0) (Note 1) VO(DIFF)(R) -500 0 50 VO(DIFF)(S) -200 0 200 IO(SC) -115 -85 -- mA VTXD = VSS; VCANH = -3V; CANL: floating -- 75 +115 mA VTXD = VSS; VCANL = +18V; CANH: floating -4.0 -- +0.5 V -4.0 -- +0.4 0.9 -- 9.0 1.1 -- 9.0 CANL: Dominant Output Voltage Driver Symmetry (VCANH+VCANL)/VDD Min. CANL: Short Circuit Output Current -24V < VCAN < +24V TXD = 0; RL = 50 to 65 RL = 50 to 65 mV VTXD = VDD, no load, Normal. (Figure 2-2, Figure 2-4) VTXD = VDD,no load, Standby. Figure 2-2, Figure 2-4 Bus Line (CANH; CANL) Receiver Recessive Differential Input Voltage Dominant Differential Input Voltage Note 1: 2: 3: VDIFF(R)(I) VDIFF(D)(I) Normal Mode; -12V < V(CANH, CANL) < +12V; see Figure 2-6 (Note 3) Standby Mode; -12V < V(CANH, CANL) < +12V; see Figure 2-6 (Note 3) V Normal Mode; -12V < V(CANH, CANL) < +12V; see Figure 2-6 (Note 3) Standby Mode; -12V < V(CANH, CANL) < +12V; see Figure 2-6 (Note 3) Characterized; not 100% tested. Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFD, VIO is internally connected to VDD. -12V to 12V is ensured by characterization, and tested from -2V to 7V. DS20005514A-page 14 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD TABLE 2-1: DC CHARACTERISTICS (CONTINUED) DC Specifications Parameter Differential Receiver Threshold Electrical Characteristics: Unless otherwise indicated, Extended (E): TAMB = -40C to +125C and High (H): TAMB = -40C to +150C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless otherwise specified. Sym. Min. Typ. Max. Units Conditions VTH(DIFF) 0.5 0.7 0.9 V Normal Mode; -12V < V(CANH, CANL) < +12V; see Figure 2-6 (Note 3) 0.4 0.7 0.9 Standby Mode; -12V < V(CANH, CANL) < +12V; see Figure 2-6 (Note 3) Differential Input Hysteresis VHYS(DIFF) 30 -- 200 mV Normal mode, see Figure 2-6, (Note 1) Single Ended Input Resistance RCAN_H, RCAN_L 6 -- 50 k Note 1 mR -3 0 +3 % VCANH = VCANL (Note 1) RDIFF 12 25 100 k Note 1 Internal Capacitance CIN -- 20 -- pF 1 Mbps (Note 1) Differential Internal Capacitance CDIFF -- 10 -- pF 1 Mbps (Note 1) ILI -5 -- +5 A VDD = VTXD = VSTBY = 0V. For MCP2542FD and MCP2542WFD, VIO = 0V. VCANH = VCANL = 5 V. VIH 2.0 -- VIO + 0.3 V MCP2544FD and MCP2544WFD 0.7 VIO -- VIO + 0.3 -0.3 -- 0.8 -0.3 -- 0.3VIO IIH -1 -- +1 A TXD: Low-Level Input Current IIL(TXD) -270 -150 -30 A STBY: Low-Level Input Current IIL(STBY) -30 -- -1 A Internal Resistance Matching mR=2*(RCANH-RCANL)/(RCANH+RCANL) Differential Input Resistance CANH, CANL: Input Leakage Digital Input Pins (TXD, STBY) High-Level Input Voltage Low-Level Input Voltage High-Level Input Current Note 1: 2: 3: VIL MCP2542FD and MCP2542WFD V MCP2544FD and MCP2544WFD MCP2542FD and MCP2542WFD Characterized; not 100% tested. Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFD, VIO is internally connected to VDD. -12V to 12V is ensured by characterization, and tested from -2V to 7V. 2016 Microchip Technology Inc. DS20005514A-page 15 MCP2542FD/4FD, MCP2542WFD/4WFD TABLE 2-1: DC CHARACTERISTICS (CONTINUED) DC Specifications Parameter Electrical Characteristics: Unless otherwise indicated, Extended (E): TAMB = -40C to +125C and High (H): TAMB = -40C to +150C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF; unless otherwise specified. Sym. Min. Typ. Max. Units Conditions VOH VDD - 0.4 -- -- V VIO - 0.4 -- -- VOL -- -- 0.4 V IOL = 4 mA; typical 8 mA TJ(SD) 165 175 185 C -12V < V(CANH, CANL) < +12V (Note 1) TJ(HYST) 15 -- 30 C -12V < V(CANH, CANL) < +12V (Note 1) Receive Data (RXD) Output High-Level Output Voltage Low-Level Output Voltage MCP2544FD and MCP2544WFD: IOH = -2 mA; typical -4 mA MCP2542FD and MCP2542WFD: VIO = 2.7V to 5.5V, IOH = -1 mA; VIO = 1.7V to 2.7V, IOH = -0.5 mA, typical -2 mA Thermal Shutdown Shutdown Junction Temperature Shutdown Temperature Hysteresis Note 1: 2: 3: Characterized; not 100% tested. Only MCP2542FD and MCP2542WFD have a VIO pin. For the MCP2544FD and MCP2544WFD, VIO is internally connected to VDD. -12V to 12V is ensured by characterization, and tested from -2V to 7V. DS20005514A-page 16 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD FIGURE 2-2: PHYSICAL BIT REPRESENTATION AND SIMPLIFIED BIAS IMPLEMENTATION Normal Mode Standby Mode CANH, CANL CANH CANL Recessive Dominant Recessive Time VDD CANH Normal VDD/2 RXD Standby Mode CANL TABLE 2-2: AC CHARACTERISTICS AC Characteristics Param. No. Parameter Electrical Characteristics: Unless otherwise indicated, Extended (E): TAMB = -40C to +125C and High (H): TAMB = -40C to +150C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF. Maximum VDIFF(D)(I) = 3V. Sym. Min. Typ. Max. Units Conditions 1 Bit Time tBIT 0.125 -- 69.44 s 2 Nominal Bit Rate NBR 14.4 -- 8000 kbps 3 Delay TXD Low to Bus Dominant tTXD-BUSON -- 50 85 ns Note 1 4 Delay TXD High to Bus Recessive tTXD-BUSOFF -- 40 85 ns Note 1 5 Delay Bus Dominant to RXD tBUSON-RXD -- 70 85 ns Note 1 6 Delay Bus Recessive to RXD tBUSOFF-RXD -- 110 145 ns Note 1 Note 1: Characterized, not 100% tested. 2: Not in ISO 11898-2:2015, but needs to be characterized. 2016 Microchip Technology Inc. DS20005514A-page 17 MCP2542FD/4FD, MCP2542WFD/4WFD TABLE 2-2: AC CHARACTERISTICS (CONTINUED) AC Characteristics Param. No. 7 Electrical Characteristics: Unless otherwise indicated, Extended (E): TAMB = -40C to +125C and High (H): TAMB = -40C to +150C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF. Maximum VDIFF(D)(I) = 3V. Parameter Sym. Min. Typ. Max. Units Propagation Delay TXD to RXD Worst Case of tLOOP(R) and tLOOP(F) Figure 2-10 tTXD - RXD -- 90 120 -- 115 150 Conditions ns RL = 150, CL = 200pF(Note 1) 7a Propagation Delay, Rising Edge tLOOP(R) -- 90 120 ns 7b Propagation Delay, Falling Edge tLOOP(F) -- 80 120 ns 8a Recessive Bit Time on RXD - 1 Mbps, Loop Delay Symmetry (Note 2) tBIT(RXD), 1M 900 985 1100 ns 800 960 1255 Recessive Bit Time on RXD - 2 Mbps, Loop Delay Symmetry tBIT(RXD), 2M 450 490 550 400 460 550 8c Recessive Bit Time on RXD - 5 Mbps, Loop Delay Symmetry tBIT(RXD), 5M 160 190 220 ns tBIT(TXD) = 200 ns (Figure 2-10) 8d Recessive Bit Time on RXD - 8 Mbps, Loop Delay Symmetry (Note 2) tBIT(RXD), 8M 85 100 135 ns tBIT(TXD) = 120 ns (Figure 2-10) (Note 1) 9 CAN Activity Filter Time (Standby) tFILTER 0.5 1.7 3.6 s VDIFF(D)(I) = 1.2V to 3V 10 Delay Standby to Normal Mode tWAKE -- 7 30 s Negative edge on STBY 11 Permanent Dominant Detect Time tPDT 0.8 1.9 5 ms TXD = 0V 12 Permanent Dominant Timer Reset tPDTR -- 5 -- ns The shortest recessive pulse on TXD or CAN bus to reset Permanent Dominant Timer 13a Transmitted Bit Time on Bus - 1 Mbps (Note 2) tBIT(BUS), 1M 870 1000 1060 ns tBIT(TXD) = 1000 ns (Figure 2-10) 870 1000 1060 8b tBIT(TXD) = 1000 ns (Figure 2-10) tBIT(TXD) = 1000 ns (Figure 2-10), RL = 150, CL = 200pF (Note 1) tBIT(TXD) = 500 ns (Figure 2-10) ns tBIT(TXD) = 500 ns (Figure 2-10), RL = 150, CL = 200pF(Note 1) tBIT(TXD) = 1000 ns (Figure 2-10), RL = 150, CL = 200pF (Note 1) Note 1: Characterized, not 100% tested. 2: Not in ISO 11898-2:2015, but needs to be characterized. DS20005514A-page 18 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD TABLE 2-2: AC CHARACTERISTICS (CONTINUED) AC Characteristics Param. No. 13b Electrical Characteristics: Unless otherwise indicated, Extended (E): TAMB = -40C to +125C and High (H): TAMB = -40C to +150C; VDD = 4.5V to 5.5V, VIO = 1.7V to 5.5V (Note 2), RL = 60CL = 100 pF. Maximum VDIFF(D)(I) = 3V. Parameter Transmitted Bit Time on Bus - 2 Mbp Sym. Min. Typ. Max. Units tBIT(BUS), 2M 435 515 530 435 480 550 ns Conditions tBIT(TXD) = 500 ns (Figure 2-10) tBIT(TXD) = 500 ns (Figure 2-10) RL = 150, CL = 200pF (Note 1) 13c Transmitted Bit Time on Bus - 5 Mbps tBIT(BUS), 5M 155 200 210 ns tBIT(TXD) = 200ns (Figure 2-10) (Note 1) 13d Transmitted Bit Time on Bus - 8Mbps (Note 2) tBIT(BUS), 8M 100 125 140 ns tBIT(TXD) = 120 ns (Figure 2-10) (Note 1) 14a Receiver Timing Symmetry - 1 Mbps (Note 2) tDIFF(REC), 1M = tBIT(RXD) tBIT(BUS) -65 0 40 ns tBIT(TXD) = 1000 ns (Figure 2-10) -130 0 80 Receiver Timing Symmetry - 2 Mbps tDIFF(REC), 2M -65 0 40 -70 0 40 14b tBIT(TXD) = 1000ns (Figure 2-10), RL = 150, CL = 200pF (Note 1) ns tBIT(TXD) = 500 ns (Figure 2-10) tBIT(TXD) = 500 ns (Figure 2-10), RL = 150, CL = 200pF (Note 1) 14c Receiver Timing Symmetry - 5 Mbps tDIFF(REC), 5M -45 0 15 ns tBIT(TXD) = 200 ns (Figure 2-10) (Note 1) 14d Receiver Timing Symmetry - 8 Mbps (Note 2) tDIFF(REC),8M tDIFF(REC), 8M -45 0 10 ns tBIT(TXD) = 120 ns (Figure 2-10) (Note 1) 15 WUP Time Out tWAKE(TO) 1 1.9 5 ms MCP2542WFD/4WFD (Figure 2-11) 16 Delay Bus Dominant/Recessive to RXD (Standby mode) tBUS-RXD(S) -- 0.5 -- s Note 1: Characterized, not 100% tested. 2: Not in ISO 11898-2:2015, but needs to be characterized. FIGURE 2-3: TEST LOAD CONDITIONS Load Condition 1 Load Condition 2 VDD/2 RL CL Pin CL Pin RL = 464 CL = 50 pF for all digital pins 2016 Microchip Technology Inc. VSS VSS DS20005514A-page 19 MCP2542FD/4FD, MCP2542WFD/4WFD FIGURE 2-4: TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS 0.1 F VDD CANH TXD CAN Transceiver RL CL RXD 15 pF CANL STBY GND Note: On MCP2544FD and MCP2544WFD, VIO is connected to VDD. FIGURE 2-5: TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS CANH TXD CAN Transceiver 1000 pF RL Transient Generator RXD GND STBY CANL 1000 pF Note 1: On MCP2544FD and MCP2544WFD, VIO is connected to VDD. 2: The wave forms of the applied transients shall be in accordance with ISO-7637, Part 1, test pulses 1, 2, 3a and 3b. FIGURE 2-6: HYSTERESIS OF THE RECEIVER RXD (receive data output voltage) VOH VDIFF (R)(I) VDIFF (D)(I) VOL VDIFF (H)(I) 0.5 DS20005514A-page 20 VDIFF (V) 0.9 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD 2.3 Timing Diagrams and Specifications FIGURE 2-7: TIMING DIAGRAM FOR AC CHARACTERISTICS VDD TXD (transmit data input voltage) 0V VDIFF (CANH, CANL differential voltage) RXD (receive data output voltage) 3 5 6 4 7 7 FIGURE 2-8: TIMING DIAGRAM FOR WAKEUP FROM STANDBY TXD STBY VCANH VCANL 10 FIGURE 2-9: PERMANENT DOMINANT TIMER RESET DETECT Minimum pulse width until CAN bus goes to Dominant state after the falling edge. TXD VDIFF (VCANH-VCANL) Driver is off 11 2016 Microchip Technology Inc. 12 DS20005514A-page 21 MCP2542FD/4FD, MCP2542WFD/4WFD FIGURE 2-10: TIMING DIAGRAM FOR LOOP DELAY SYMMETRY 70% TXD 30% 30% 5*tBIT(TXD) tLOOP(F) TBIT(TXD) VDIFF_BUS 900 mV 500 mV 13 tBIT(BUS) 70% RXD 30% tLOOP(R) 8 tBIT(RXD) FIGURE 2-11: TIMING DIAGRAM FOR WAKE-UP PATTERN (WUP) CANH CANL tFILTER (9) tFILTER (9) tFILTER (9) t < tWAKE(TO) (15) RXD tBU S-RXD (S ) (16) TABLE 2-1: tBU S-RXD (S ) (16) THERMAL SPECIFICATIONS Parameter Sym. Min. Typ. Max. Units TA -40 -- +125 C -40 -- +150 Test Conditions Temperature Ranges Specified Temperature Range Operating Temperature Range TA -40 -- +150 C Storage Temperature Range TA -65 -- +155 C Thermal Resistance, 8LD DFN (3x3) JA -- 56.7 -- C/W Thermal Resistance, 8LD SOIC JA -- 149.5 -- C/W Thermal Resistance, 8LD TDFN (2x3) JA -- 53 -- C/W Package Thermal Resistances DS20005514A-page 22 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD 3.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Dominant Differential Output (V) VDD = 4.5 V 2.3 2.2 2.1 2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 -40 25 150 40 45 50 55 60 65 70 75 RL () FIGURE 3-1: Dominant Differential Output vs. RL (VDD = 4.5V). Dominant Differential Output (V) VDD = 5.0 V 2.3 2.2 2.1 2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 -40 25 150 40 45 50 55 60 65 70 75 RL () FIGURE 3-2: Dominant Differential Output vs. RL (VDD = 5.0V). VDD = 5.5 V Dominant Differential Output (V) 2.6 2.5 2.4 2.3 2.2 -40 2.1 2 25 1.9 150 1.8 1.7 1.6 40 45 50 55 60 65 70 75 RL () FIGURE 3-3: Dominant Differential Output vs. RL (VDD = 5.5V). 2016 Microchip Technology Inc. DS20005514A-page 23 MCP2542FD/4FD, MCP2542WFD/4WFD NOTES: DS20005514A-page 24 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD 4.0 PACKAGING INFORMATION 4.1 Package Marking Information 8-Lead DFN (03x03x0.9 mm) Example: Part Number Code MCP2542FD-E/MF DAEK MCP2542FDT-H/MF DAEK MCP2542FD-H/MF DAEK MCP2542FDT-E/MF DAEK MCP2542WFD-E/MF DAEH MCP2542WFDT-H/MF DAEH MCP2542WFD-H/MF DAEH MCP2542WFDT-E/MF DAEH MCP2544FD-E/MF DAEJ MCP2544FDT-H/MF DAEJ MCP2544FD-H/MF DAEJ MCP2544FDT-E/MF DAEJ MCP2544WFD-E/MF DAEG MCP2544WFDT-H/MF DAEG MCP2544WFD-H/MF DAEG MCP2544WFDT-E/MF DAEG 8-Lead SOIC (150 mil) Example: Part Number MCP2542WFD-E/SN MCP2542WFD-H/SN MCP2542W MCP2542WFDT-E/SN MCP2542 e3 Note: MCP2542W MCP2542FDT-H/SN MCP2542W MCP2542FD-H/SN MCP2542W MCP2542FDT-E/SN MCP2542W MCP2542W SN e31538 256 MCP2544W MCP2544WFDT-H/SN MCP2544WFD MCP2544WFD-H/SN MCP2544WFD MCP2544WFD-E/SN MCP2544W MCP2544FD-E/SN * MCP2542 MCP2542W MCP2544WFD-E/SN XX...X Y YY WW NNN Code MCP2542WFDT-H/SN MCP2542FD-E/SN Legend: DAEK 1538 256 MCP2544 MCP2544FDT-H/SN MCP2544 MCP2544FD-H/SN MCP2544 MCP2544FDT-E/SN MCP2544 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC(R)designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC(R) designator ( e) 3 can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2016 Microchip Technology Inc. DS20005514A-page 25 MCP2542FD/4FD, MCP2542WFD/4WFD 8-Lead TDFN (02x03x0.8 mm) Legend: XX...X Y YY WW NNN * Note: DS20005514A-page 26 Part Number Example: Code MCP2542FDT-E/MNY ACR MCP2542FDT-H/MNY ACR MCP2542WFDT-E/MNY ACP MCP2542WFDT-H/MNY ACP MCP2544FDT-E/MNY ACQ MCP2544FDT-H/MNY ACQ MCP2544WFDT-E/MNY ACN MCP2544WFDT-H/MNY ACN ACQ 607 25 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC(R)designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC(R) designator ( ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2016 Microchip Technology Inc. DS20005514A-page 27 MCP2542FD/4FD, MCP2542WFD/4WFD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005514A-page 28 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2016 Microchip Technology Inc. DS20005514A-page 29 MCP2542FD/4FD, MCP2542WFD/4WFD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005514A-page 30 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2016 Microchip Technology Inc. DS20005514A-page 31 MCP2542FD/4FD, MCP2542WFD/4WFD & !"#$% ! "# $% &"' "" ($ ) % *++&&&! !+ $ DS20005514A-page 32 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2016 Microchip Technology Inc. DS20005514A-page 33 MCP2542FD/4FD, MCP2542WFD/4WFD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005514A-page 34 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD & ' ( )*+,--./ !"0'(% ! "# $% &"' "" ($ ) % *++&&&! !+ $ 2016 Microchip Technology Inc. DS20005514A-page 35 MCP2542FD/4FD, MCP2542WFD/4WFD NOTES: DS20005514A-page 36 2016 Microchip Technology Inc. MCP2542FD/4FD, MCP2542WFD/4WFD APPENDIX A: REVISION HISTORY Revision A (February 2016) Initial release of this document. 2016 Microchip Technology Inc. DS20005514A-page 37 MCP2542FD/4FD, MCP2542WFD/4WFD PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. [X](1) X /XX Tape and Reel Option Temperature Range Package PART NO. Device Device: MCP2542FD/4FD: MCP2542WFD/4WFD: CAN FD Transceiver with WUP Option CAN FD Transceiver with WUP Option Tape and Reel Option: Blank = Standard packaging (tube or tray) T = Tape and Reel(1) Temperature Range: E H = -40C to+125C (Extended) = -40C to +150C (High) Package: MF = Plastic Dual Flat No Lead Package 3x3x0.9 mm Body (DFN), 8-lead MNY = Plastic Dual Flat No Lead Package 2x3x0.75 mm Body (TDFN), 8-lead SN Plastic Small Outline (SN) - Narrow, 3.90 mm, Body (SOIC), 8-lead = Examples: a) MCP2542FD-E/MF: Extended Temperature, 8-lead, Plastic Dual Flat No Lead DFN package. b) MCP2544WFD-H/MF:High Temperature, 8-lead, Plastic Dual Flat No Lead DFN package. c) MCP2542WFDT-H/SN:Tape and Reel, High Temperature, 8-lead, Plastic Small Outline SOIC package. d) MCP2544WFDT-E/SN:Tape and Reel, Extended Temperature, 8-lead, Plastic Small Outline SOIC package. e) MCP2542FDT-E/MNY:Tape and Reel, Extended Temperature, 8-lead, Plastic Dual Flat No Lead TDFN package. f) MCP2544WFDT-H/MNY:Tape and Reel, High Temperature, 8-lead, Plastic Dual Flat No Lead TDFN package. Note1: DS20005514A-page 38 Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. 2016 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2016 Microchip Technology Inc. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-0347-0 DS20005514A-page 39 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/support Web Address: www.microchip.com Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 Germany - Dusseldorf Tel: 49-2129-3766400 Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Hong Kong Tel: 852-2943-5100 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 Austin, TX Tel: 512-257-3370 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Canada - Toronto Tel: 905-673-0699 Fax: 905-673-6509 China - Dongguan Tel: 86-769-8702-9880 China - Hangzhou Tel: 86-571-8792-8115 Fax: 86-571-8792-8116 India - Pune Tel: 91-20-3019-1500 Japan - Osaka Tel: 81-6-6152-7160 Fax: 81-6-6152-9310 Japan - Tokyo Tel: 81-3-6880- 3770 Fax: 81-3-6880-3771 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 China - Hong Kong SAR Tel: 852-2943-5100 Fax: 852-2401-3431 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 China - Shenzhen Tel: 86-755-8864-2200 Fax: 86-755-8203-1760 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 Taiwan - Kaohsiung Tel: 886-7-213-7828 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 Germany - Karlsruhe Tel: 49-721-625370 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Italy - Venice Tel: 39-049-7625286 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Poland - Warsaw Tel: 48-22-3325737 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Stockholm Tel: 46-8-5090-4654 UK - Wokingham Tel: 44-118-921-5800 Fax: 44-118-921-5820 Taiwan - Taipei Tel: 886-2-2508-8600 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 07/14/15 DS20005514A-page 40 2016 Microchip Technology Inc.