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LM7121
SNOS750A –AUGUST 1999–REVISED OCTOBER 2014
LM7121 235-MHz Tiny Low Power Voltage Feedback Amplifier
1 Features 3 Description
The LM7121 is a high performance operational
1• (Typical Unless Otherwise Noted). VS= ±15 V amplifier which addresses the increasing AC
• Easy to use Voltage Feedback Topology performance needs of video and imaging
• Stable with Unlimited Capacitive Loads applications, and the size and power constraints of
portable applications.
• Tiny SOT23-5 Package — Typical Circuit Layout
Takes Half the Space Of SO-8 Designs The LM7121 can operate over a wide dynamic range
• Unity Gain Frequency: 175 MHz of supply voltages, from 5 V (single supply) up to
±15V (see Application and Implementation for more
• Bandwidth (−3 dB, AV= +1, RL= 100Ω): 235 MHz details). It offers an excellent speed-power product
• Slew Rate: 1300V/μsdelivering 1300 V/μs and 235 MHz Bandwidth (−3 dB,
• Supply Voltages: AV= +1). Another key feature of this operational
amplifier is stability while driving unlimited capacitive
– SO-8: 5 V to ±15 V loads.
– SOT23-5: 5 V to ±5 V Due to its tiny SOT23-5 package, the LM7121 is ideal
• Characterized for: +5 V, ±5 V, ±15 V for designs where space and weight are the critical
• Low Supply Current: 5.3 mA parameters. The benefits of the tiny package are
evident in small portable electronic devices, such as
2 Applications cameras, and PC video cards. Tiny amplifiers are so
small that they can be placed anywhere on a board
• Scanners, Color Fax, Digital Copiers close to the signal source or near the input to an A/D
• PC Video Cards converter.
• Cable Drivers Device Information(1)
• Digital Cameras PART NUMBER PACKAGE BODY SIZE (NOM)
• ADC/DAC Buffers SOT-23 (5) 2.921 mm × 1.651 mm
• Set-top Boxes LM7121 SOIC (8) 4.902 mm × 3.912 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Unity Gain Frequency vs. Supply Voltage
Typical Circuit for AV= +1 Operation
(VS= 6 V)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
6.8 ±5V AC Electrical Characteristics............................. 7
1 Features.................................................................. 16.9 +5V DC Electrical Characteristics............................. 8
2 Applications ........................................................... 16.10 +5V AC Electrical Characteristics........................... 8
3 Description............................................................. 16.11 Typical Characteristics............................................ 9
4 Revision History..................................................... 27 Application and Implementation ........................ 21
5 Pin Configuration and Functions......................... 37.1 Application Information............................................ 21
6 Specifications......................................................... 47.2 Typical Applications ................................................ 22
6.1 Absolute Maximum Ratings ...................................... 48 Device and Documentation Support.................. 26
6.2 Handling Ratings....................................................... 48.1 Trademarks............................................................. 26
6.3 Recommended Operating Conditions....................... 48.2 Electrostatic Discharge Caution.............................. 26
6.4 Thermal Information.................................................. 48.3 Glossary.................................................................. 26
6.5 ±15V DC Electrical Characteristics........................... 59 Mechanical, Packaging, and Orderable
6.6 ±15V AC Electrical Characteristics........................... 6Information........................................................... 26
6.7 ±5V DC Electrical Characteristics............................. 6
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (August 1999) to Revision A Page
• Added, updated, or renamed the following sections: Device Information Table, Pin Configuration and Functions,
Application and Implementation;Power Supply Recommendations ;Layout;Device and Documentation Support;
Mechanical, Packaging, and Ordering Information................................................................................................................. 1
• Deleted TJ= 25°C from Electrical Characteristics tables....................................................................................................... 5
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5 Pin Configuration and Functions
Package DBV Package D0008A
5-Pin 8-Pin
Top View Top View
Pin Functions
PIN
NUMBER I/O DESCRIPTION
NAME DBV D0008A
-IN 4 2 I Inverting input
+IN 3 3 I Non-inverting input
N/C –– 5, 8 –– No connection
OUTPUT 1 6 O Output
V-2 4 I Negative supply
V+5 7 I Positive supply
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6 Specifications
6.1 Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Differential Input Voltage (2) ±2 V
Voltage at Input/Output Pins (V+)−1.4, V
(V−)+1.4
Supply Voltage (V+–V−) 36 V
Output Short Circuit to Ground (3) Continuous
Lead Temperature (soldering, 10 sec) 260 °C
Junction Temperature(4) 150 ˚C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C.
(3) The maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD= (TJ(max)–TA)/RθJA. All numbers apply for packages soldered directly into a PC board.
(4) Typical Values represent the most likely parametric norm.
6.2 Handling Ratings MIN MAX UNIT
Tstg Storage temperature range −65 +150 °C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all 2000
V(ESD) Electrostatic discharge V
pins(1)
(1) JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process. Human body
model, 1.5 k in series with 100 pF.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT
Operating Temperature Range -40 85 °C
6.4 Thermal Information THERMAL METRIC(1) D0008A (8) DBV (5) UNIT
RθJA Junction-to-ambient thermal resistance 165 325 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 ±15V DC Electrical Characteristics
Unless otherwise specified, all limits ensured for V+= +15V, V−=−15V, VCM = VO= 0 V and RL> 1 MΩ.Boldface limits apply
at the temperature extremes. LM7121I
PARAMETER TEST CONDITIONS TYP(1) UNIT
LIMIT(2)
8 mV
VOS Input Offset Voltage 0.9 15 max
9.5 µA
IBInput Bias Current 5.2 12 max
4.3 µA
IOS Input Offset Current 0.04 7max
Common Mode 10 MΩ
RIN Input Resistance Differential Mode 3.4 MΩ
CIN Input Capacitance Common Mode 2.3 pF
73 dB
CMRR Common Mode Rejection Ratio −10V ≤VCM ≤10V 93 70 min
70 dB
+PSRR Positive Power Supply Rejection Ratio 10V ≤V+≤15 V 86 68 min
68 dB
−PSRR Negative Power Supply Rejection Ratio −15V ≤V−≤ −10V 81 65 min
13 11 V min
VCM Input Common-Mode Voltage Range CMRR ≥70 dB −13 −11 V max
65 dB
AVLarge Signal Voltage Gain RL= 2 kΩ, VO= 20 VPP 72 57 min
11.1 V
13.4 10.8 min
RL= 2 kΩ−11.2 V
−13.4 −11.0 max
VOOutput Swing 7.75 V
10.2 7.0 min
RL= 150 Ω−5.0 V
−7.0 −4.8 max
54 mA
Sourcing 71 44 min
ISC Output Short Circuit Current 39 mA
Sinking 52 34 min
6.6 mA
ISSupply Current 5.3 7.5 max
(1) Typical Values represent the most likely parametric norm.
(2) All limits are ensured by testing or statistical analysis.
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6.6 ±15V AC Electrical Characteristics
Unless otherwise specified, all limits ensured for V+ = 15V, V−=−15V, VCM = VO= 0 V and RL> 1 MΩ.Boldface limits apply
at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(1) LM7121I UNIT
LIMIT(2)
SR Slew Rate(3) AV= +2, RL= 1 kΩ, VO= 20 VPP 1300 V/µs
GBW Unity Gain-Bandwidth RL= 1 kΩ175 MHz
ØmPhase Margin 63 Deg
RL= 100 Ω, AV= +1 235
f (−3 dB) Bandwidth(4)(5) MHz
RL= 100 Ω, AV= +2 50
tsSettling Time 10 VPP Step, to 0.1%, RL= 500 Ω74 ns
tr, tfRise and Fall Time(5) AV= +2, RL= 100 Ω, VO= 0.4 VPP 5.3 ns
ADDifferential Gain AV= +2, RL= 150 Ω0.3%
ØDDifferential Phase AV= +2, RL= 150 Ω0.65 Deg
enInput-Referred Voltage Noise f = 10 kHz 17 nV / √HZ
inInput-Referred Current Noise f = 10 kHz 1.9 pA / √HZ
2 VPP Output, RL= 150 Ω, 0.065%
AV= +2, f = 1 MHz
T.H.D. Total Harmonic Distortion 2 VPP Output, RL= 150 Ω, 0.52%
AV= +2, f = 5 MHz
(1) Typical Values represent the most likely parametric norm.
(2) All limits are ensured by testing or statistical analysis.
(3) Slew rate is the average of the rising and falling slew rates.
(4) Unity gain operation for ±5 V and ±15 V supplies is with a feedback network of 510 Ωand 3 pF in parallel (see Application and
Implementation). For +5V single supply operation, feedback is a direct short from the output to the inverting input.
(5) AV= +2 operation with 2 kΩresistors and 2 pF capacitor from summing node to ground.
6.7 ±5V DC Electrical Characteristics
Unless otherwise specified, all limits ensured for V+ = 5V, V−=−5V, VCM = VO= 0 V and RL> 1 MΩ.Boldface limits apply at
the temperature extremes. LM7121I
PARAMETER TEST CONDITIONS TYP(1) UNIT
LIMIT(2)
8 mV
VOS Input Offset Voltage 1.6 15 max
9.5 µA
IBInput Bias Current 5.5 12 max
4.3 µA
IOS Input Offset Current 0.07 7.0 max
Common Mode 6.8 MΩ
RIN Input Resistance Differential Mode 3.4 MΩ
CIN Input Capacitance Common Mode 2.3 pF
65 dB
CMRR Common Mode Rejection Ratio −2V ≤VCM ≤2V 75 60 min
65 dB
+PSRR Positive Power Supply Rejection Ratio 3V ≤V+≤5V 89 60 min
65 dB
−PSRR Negative Power Supply Rejection Ratio −5V ≤V−≤ −3V 78 60 min
(1) Typical Values represent the most likely parametric norm.
(2) All limits are ensured by testing or statistical analysis.
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±5V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits ensured for V+ = 5V, V−=−5V, VCM = VO= 0 V and RL> 1 MΩ.Boldface limits apply at
the temperature extremes. LM7121I
PARAMETER TEST CONDITIONS TYP(1) UNIT
LIMIT(2)
V
3 2.5 min
VCM Input Common Mode Voltage Range CMRR ≥60 dB V
−3−2.5 max
60 dB
AVLarge Signal Voltage Gain RL= 2 kΩ, VO= 3 VPP 66 58 min
3.0 V
3.62 2.75 min
RL= 2 kΩ−3.0 V
−3.62 −2.70 max
VOOutput Swing 2.5 V
3.1 2.3 min
RL= 150 Ω−2.15 V
−2.8 −2.00 max
38 mA
Sourcing 53 33 min
ISC Output Short Circuit Current 21 mA
Sinking 29 19 min
6.4 mA
ISSupply Current 5.1 7.2 max
6.8 ±5V AC Electrical Characteristics
Unless otherwise specified, all limits ensured for V+= 5V, V−=−5V, VCM = VO= 0 V and RL> 1 MΩ.Boldface limits apply at
the temperature extremes. LM7121I
PARAMETER TEST CONDITIONS TYP(1) UNIT
LIMIT(2)
SR Slew Rate(3) AV= +2, RL= 1 kΩ, VO= 6 VPP 520 V/µs
GBW Unity Gain-Bandwidth RL= 1 kΩ105 MHz
ØmPhase Margin RL= 1 kΩ74 Deg
RL= 100 Ω, AV= +1 160 MHz
f (−3 dB) Bandwidth(4)(5) RL= 100 Ω, AV= +2 50 MHz
tsSettling Time 5 VPP Step, to 0.1%, RL= 500 Ω65 ns
tr, tfRise and Fall Time(5) AV= +2, RL= 100 Ω, VO= 0.4 VPP 5.8 ns
ADDifferential Gain AV= +2, RL= 150 Ω0.3%
ØDDifferential Phase AV= +2, RL= 150 Ω0.65 Deg
enInput-Referred Voltage Noise f = 10 kHz 17 nV / √Hz
inInput-Referred Current Noise f = 10 kHz 2 pA / √Hz
2 VPP Output, RL= 150 Ω,0.1%
AV= +2, f = 1 MHz
T.H.D. Total Harmonic Distortion 2 VPP Output, RL= 150 Ω,0.6
AV= +2, f = 5 MHz
(1) Typical Values represent the most likely parametric norm.
(2) All limits are ensured by testing or statistical analysis.
(3) Slew rate is the average of the rising and falling slew rates.
(4) Unity gain operation for ±5 V and ±15 V supplies is with a feedback network of 510 Ωand 3 pF in parallel (see Application and
Implementation). For +5V single supply operation, feedback is a direct short from the output to the inverting input.
(5) AV= +2 operation with 2 kΩresistors and 2 pF capacitor from summing node to ground.
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6.9 +5V DC Electrical Characteristics
Unless otherwise specified, all limits ensured for V+= +5V, V−= 0 V, VCM = VO= V+/2 and RL> 1 MΩ.Boldface limits apply
at the temperature extremes. LM7121I
PARAMETER TEST CONDITIONS TYP(1) UNIT
LIMIT(2)
VOS Input Offset Voltage 2.4 mV
IBInput Bias Current 4 µA
IOS Input Offset Current 0.04 µA
RIN Common Mode 2.6 M
Input Resistance Differential Mode 3.4 M
CIN Input Capacitance Common Mode 2.3 pF
CMRR Common Mode Rejection Ratio 2V ≤VCM ≤3V 65 dB
+PSRR Positive Power Supply Rejection Ratio 4.6V ≤V+≤5V 85 dB
−PSRR Negative Power Supply Rejection Ratio 0V ≤V−≤0.4V 61 dB
3.5 V min
VCM Input Common-Mode Voltage Range CMRR 45 dB 1.5 V max
AVLarge Signal Voltage Gain RL= 2 kΩto V+/2 64 dB
RL= 2 kΩto V+/2, High 3.7
RL= 2 kΩto V+/2, Low 1.3
VOOutput Swing V
RL= 150 Ωto V+/2, High 3.48
RL= 150 Ωto V+/2, Low 1.59
ISC Output Short Circuit Current Sourcing 33 mA
Sinking 20 mA
ISSupply Current 4.8 mA
(1) Typical Values represent the most likely parametric norm.
(2) All limits are ensured by testing or statistical analysis.
6.10 +5V AC Electrical Characteristics
Unless otherwise specified, all limits ensured for V+= +5V, V−= 0 V, VCM = VO= V+/2 and RL> 1 MΩ.Boldface limits apply
at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(1) LM7121I UNIT
LIMIT(2)
AV= +2, RL= 1 kΩto V+/2,
SR Slew Rate(3) 145 V/µs
VO= 1.8 VPP
GBW Unity Gain-Bandwidth RL= 1k to V+/2 80 MHz
ØmPhase Margin RL= 1k to V+/2 70 Deg
RL= 100 Ωto V+/2, AV= +1 200
f (−3 dB) Bandwidth(4)(5) MHz
RL= 100 Ωto V+/2, AV= +2 45
tr, tfRise and Fall Time(5) AV= +2, RL= 100 Ω, VO= 0.2 VPP 8 ns
0.6 VPP Output, RL= 150 Ω,0.067%
AV= +2, f = 1 MHz
T.H.D. Total Harmonic Distortion 0.6 VPP Output, RL= 150 Ω,0.33%
AV= +2, f = 5 MHz
(1) Typical Values represent the most likely parametric norm.
(2) All limits are ensured by testing or statistical analysis.
(3) Slew rate is the average of the rising and falling slew rates.
(4) Unity gain operation for ±5 V and ±15 V supplies is with a feedback network of 510 Ωand 3 pF in parallel (see Application and
Implementation). For +5V single supply operation, feedback is a direct short from the output to the inverting input.
(5) AV= +2 operation with 2 kΩresistors and 2 pF capacitor from summing node to ground.
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6.11 Typical Characteristics
Figure 1. Supply Current vs. Supply Voltage Figure 2. Supply Current vs. Temperature
Figure 3. Input Offset Voltage vs. Temperature Figure 4. Input Bias Current vs Temperature
Figure 6. Input Offset Voltage vs. Common Mode Voltage
Figure 5. Input Offset Voltage vs. Common Mode Voltage at VS= ±5 V
at VS= ±15 V
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Typical Characteristics (continued)
Figure 8. Short Circuit Current vs Temperature (Sinking)
Figure 7. Short Circuit Current vs. Temperature (Sourcing)
Figure 10. Output Voltage vs Output Current
Figure 9. Output Voltage vs Output Current (ISOURCE, VS= ±15 V)
(ISINK, VS= ±15 V)
Figure 12. Output Voltage vs Output Current
Figure 11. Output Voltage vs Output Current (ISINK, VS= ±5 V)
(ISOURCE, VS= ±5 V)
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Typical Characteristics (continued)
Figure 14. Output Voltage vs Output Current
Figure 13. Output Voltage vs. Output Current (ISINK, VS= +5 V)
(ISOURCE, VS= +5 V)
Figure 16. PSRR vs. Frequency
Figure 15. CMRR vs. Frequency
Figure 18. Open Loop Frequency Response
Figure 17. PSRR vs. Frequency
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Typical Characteristics (continued)
Figure 19. Open Loop Frequency Response Figure 20. Open Loop Frequency Response
Figure 21. Unity Gain Frequency vs. Supply Voltage Figure 22. GBWP at 10 MHz vs. Supply Voltage
Figure 24. Large Signal Voltage Gain vs. Load, VS= ±5 V
Figure 23. Large Signal Voltage Gain vs. Load, VS= ±15 V
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Typical Characteristics (continued)
Figure 25. Input Voltage Noise vs. Frequency Figure 26. Input Current Noise vs. Frequency
Figure 27. Input Voltage Noise vs. Frequency Figure 28. Input Current Noise vs. Frequency
Figure 30. Slew Rate vs. Input Voltage
Figure 29. Slew Rate vs. Supply Voltage
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Typical Characteristics (continued)
Figure 31. Slew Rate vs. Input Voltage Figure 32. Slew Rate vs. Load Capacitance
Figure 33. Large Signal Pulse Response, Figure 34. Large Signal Pulse Response,
AV= -1 VS= ±15 V AV= -1, VS= ±5V
Figure 36. Large Signal Pulse Response,
Figure 35. Large Signal Pulse Response, AV= +1, VS= ±15 V
AV= -1, VS= +5 V
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Typical Characteristics (continued)
Figure 38. Large Signal Pulse Response,
Figure 37. Large Signal Pulse Response, AV= +1, VS= +5 V
AV= +1, VS= ±5 V
Figure 39. Large Signal Pulse Response, Figure 40. Large Signal Pulse Response,
AV= +2, VS= ±15 V AV= +2, VS= ±5 V
Figure 42. Small Signal Pulse Response,
Figure 41. Large Signal Pulse Response, AV= -1, VS= ±15 V, RL= 100 Ω
AV= +2, VS= +5 V
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Typical Characteristics (continued)
Figure 43. Small Signal Pulse Response, Figure 44. Small Signal Pulse Response,
AV=-1,VS= ±5 V, RL= 100 ΩAV= -1, VS= +5 V, RL= 100 Ω
Figure 45. Small Signal Pulse Response, Figure 46. Small Signal Pulse Response,
AV= +1, VS= ±15 V, RL= 100 ΩAV= +1, V S= ±5 V, RL= 100 Ω
Figure 47. Small Signal Pulse Response, Figure 48. Small Signal Pulse Response,
AV= +1, VS= +5 V, RL= 100 ΩAV= +2, VS= ±15 V, RL= 100 Ω
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Typical Characteristics (continued)
Figure 50. Small Signal Pulse Response,
Figure 49. Small Signal Pulse Response, AV= +2, VS= +5 V, RL= 100 Ω
AV= +2, VS= ±5 V, RL= 100 Ω
Figure 51. Closed Loop Frequency Response vs. Figure 52. Closed Loop Frequency Response
Temperature, vs. Temperature
VS= ±15 V, AV= +1, RL= 100 ΩVS= ±5 V, AV= +1, RL= 100 Ω
Figure 53. Closed Loop Frequency Response Figure 54. Closed Loop Frequency Response
vs. Temperature, vs. Temperature,
VS= +5 V, AV= +1, RL= 100 ΩVS= ±15 V, AV= +2, RL= 100 Ω
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Typical Characteristics (continued)
Figure 55. Closed Loop Frequncy Response Figure 56. Closed Loop Frequency Response
vs. Temperature, vs. Temperature,
VS= ±5 V, AV= +2 , RL= 100 ΩVS= +5 V, AV= +2, RL= 100 Ω
Figure 57. Closed Loop Frequency Response Figure 58. Closed Loop Frequency Response
vs. Capacitance Load vs. Capacitive Load
(AV= +1, VS= ±15 V) (AV= +1, VS= ±5 V)
Figure 59. Closed Loop Frequency Response Figure 60. Closed Loop Frequency Response
vs. Capacitive Load vs. Capacitive Load
(AV= +2, VS= ±15 V) (AV= +2, VS= ±5 V)
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Typical Characteristics (continued)
Figure 61. Total Harmonic Distortion vs. Frequency Figure 62. Total Harmonic Distortion vs. Frequency
Figure 63. Total Harmonic Distortion vs. Frequency Figure 64. Total Harmonic Distortion vs. Frequency
Figure 66. Undistorted Output Swing vs. Frequency
Figure 65. Undistorted Output Swing vs. Frequency
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Typical Characteristics (continued)
Figure 67. Undistorted Output Swing vs. Frequency Figure 68. Total Power Dissipation vs. Ambient Temperature
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7 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
7.1 Application Information
Table 1 depicts the maximum operating supply voltage for each package type
Table 1. Maximum Supply Voltage Values
SOT-23 SO-8
Single Supply 10 V 30 V
Dual Supplies ±5 V ±15 V
Stable unity gain operation is possible with supply voltage of 5 V for all capacitive loads. This allows the
possibility of using the device in portable applications with low supply voltages with minimum components around
it.
Above a supply voltage of 6 V (±3 V Dual supplies), an additional resistor and capacitor (shown in Figure 69)
should be placed in the feedback path to achieve stability at unity gain over the full temperature range.
The package power dissipation should be taken into account when operating at high ambient temperatures
and/or high power dissipative conditions. Refer to the power derating curves in the data sheet for each type of
package.
In determining maximum operable temperature of the device, make sure the total power dissipation of the device
is considered; this includes the power dissipated in the device with a load connected to the output as well as the
nominal dissipation of the op amp.
The device is capable of tolerating momentary short circuits from its output to ground but prolonged operation in
this mode will damage the device, if the maximum allowed junction temperation is exceeded.
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7.2 Typical Applications
Figure 69. Typical Circuit for AV= +1 Operation (VS= 6 V)
Figure 70. Simple Circuit to Improve Linearity and Output Drive Current
Figure 71. AV= -1
CC= 2 pF for RL= 100 Ω
CC= Open for RL= Open
Figure 72. AV= +2
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Typical Applications (continued)
Figure 73. AV= +2, Capacitive Load
RF= 0 Ω, CC= Open for VS< 6 V
RF= 510 Ω, CC= 3 pF for VS≥6 V
Figure 74. AV= +1
RF= 0 Ω, CC= Open for VS< 6 V
RF= 510 Ω, CC= 3 pF for VS≥6 V
Figure 75. AV= +1. VS= +5 V, Single Supply Operation
7.2.1 Design Requirements
7.2.1.1 Current Boost Circuit
The circuit in Figure 70 can be used to achieve good linearity along with high output current capability.
By proper choice of R3, the LM7121 output can be set to supply a minimal amount of current, thereby improving
its output linearity.
R3can be adjusted to allow for different loads:
R3= 0.1 RL(1)
Figure 70 has been set for a load of 100 Ω. Reasonable speeds (< 30 ns rise and fall times) can be expected up
to 120 mApp of load current (see Figure 77 for step response across the load).
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Typical Applications (continued)
7.2.2 Detailed Design Procedure
It is very important to keep the lead lengths to a minimum and to provide a low impedance current path by using
a ground-plane on the board.
CAUTION
If RLis removed, the current balance at the output of LM7121 would be disturbed and
it would have to supply the full amount of load current. This might damage the part if
power dissipation limit is exceeded.
7.2.2.1 Color Video on Twisted Pairs Using Single Supply
The circuit shown in Figure 76 can be used to drive in excess of 25 meters length of twisted pair cable with no
loss of resolution or picture definition when driving a NTSC monitor at the load end.
Pin numbers shown are for SO-8 package.
* Input termination of NTSC monitor.
Figure 76. Single Supply Differential Twister Pair Cable Transmitter/Receiver,
8.5 V ≤VCC ≤30 V
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SNOS750A –AUGUST 1999–REVISED OCTOBER 2014
Typical Applications (continued)
Differential Gain and Differential Phase errors measured at the load are less than 1% and 1˚respectively
RGand CCcan be adjusted for various cable lengths to compensate for the line losses and for proper response
at the output. Values shown correspond to a twisted pair cable length of 25 meters with about 3 turns/inch (see
Figure 78 for step response).
The supply voltage can vary from 8.5 V up to 30 V with the output rise and fall times under 12 ns. With the
component values shown, the overall gain from the input to the output is about 1.
Even though the transmission line is not terminated in its nominal characteristic impedance of about 600 Ω, the
resulting reflection at the load is only about 5% of the total signal and in most cases can be neglected. Using 75
termination instead, has the advantage of operating at a low impedance and results in a higher realizable
bandwidth and signal fidelity.
7.2.3 Application Performance Plots
Figure 78. Step Response to a 1 VPP Input Signal
Measured across the 75-ΩLoad
Figure 77. Waveform across a 100-ΩLoad
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8 Device and Documentation Support
8.1 Trademarks
All trademarks are the property of their respective owners.
8.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
8.3 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
9 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
26 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM7121IM NRND SOIC D 8 95 Non-RoHS &
Non-Green Call TI Call TI -40 to 85 LM71
21IM
LM7121IM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LM71
21IM
LM7121IM5 NRND SOT-23 DBV 5 1000 Non-RoHS &
Non-Green Call TI Call TI -40 to 85 A03A
LM7121IM5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 A03A
LM7121IM5X/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 A03A
LM7121IMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LM71
21IM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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