AUIRF7309Q
VDSS 30V
RDS(on) max. 0.05
ID 4.7A
-30V
0.10
-3.5A
N-CH P-CH
Description
Specifically designed for Automotive applications, this cellular
design of HEXFET® Power MOSFETs utilizes the latest
processing techniques to achieve low on-resistance per silicon
area. This benefit combined with the fast switching speed and
ruggedized device design that HEXFET power MOSFETs are
well known for, provides the designer with an extremely efficient
and reliable device for use in Automotive and a wide variety of
other applications.
Features
Advanced Planar Technology
Low On-Resistance
Logic Level Gate Drive
Dual N and P Channel MOSFET
Dynamic dv/dt Rating
150°C Operating Temperature
Fast Switching
Lead-Free, RoHS Compliant
Automotive Qualified *
1 2015-9-30
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
AUTOMOTIVE GRADE
Symbol Parameter Max. Units
N-Channel P-Channel
ID @ TA = 25°C 10 Sec. Pulsed Drain Current, VGS @ 10V 4.7 -3.5
A
ID @ TA = 25°C Continuous Drain Current, VGS @ 10V 4.0 -3.0
ID @ TA = 70°C Continuous Drain Current, VGS @ 10V 3.2 -2.4
IDM Pulsed Drain Current 16
-12
PD @TA = 25°C Maximum Power Dissipation 1.4 W
Linear Derating Factor 0.011 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery dv/dt 6.9
-6.0 V/ns
TJ Operating Junction and °C
TSTG Storage Temperature Range -55 to + 150
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Thermal Resistance
Symbol Parameter Typ. Max. Units
°C/W
RJA Junction-to-Ambient ( PCB Mount, steady state) ––– 90
SO-8
AUIRF7309Q
Base part number Package Type Standard Pack Orderable Part Number
Form Quantity
AUIRF7309Q SO-8 Tape and Reel 4000 AUIRF7309QTR
G D S
Gate Drain Source
D1
D1
D2
D2
G1
S2
G2
S1
Top View
8
1
2
3
45
6
7
P-CHANNEL MOSFET
N-CHANNEL MOSFE T
AUIRF7309Q
2 2015-9-30
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage N-Ch 30 ––– ––– V VGS = 0V, ID = 250µA
P-Ch -30 ––– ––– VGS = 0V, ID = -250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient N-Ch ––– 0.032 ––– V/°C Reference to 25°C, ID = 1mA
P-Ch ––– -0.037 ––– Reference to 25°C, ID = -1mA
RDS(on) Static Drain-to-Source On-Resistance
N-Ch ––– ––– 0.050
VGS = 10V, ID = 2.4A
––– ––– 0.080 VGS = 4.5V, ID = 2.0A
P-Ch ––– ––– 0.10 VGS = -10V, ID = -1.8A
––– ––– 0.16 VGS = -4.5V, ID = -1.5A
VGS(th) Gate Threshold Voltage N-Ch 1.0 ––– 3.0 V VDS = VGS, ID = 250µA
P-Ch -1.0 ––– -3.0 VDS = VGS, ID = -250µA
gfs Forward Trans conductance N-Ch 5.2 ––– ––– S VDS = 15V, ID = 2.4A
P-Ch 2.5 ––– ––– VDS = -24V, ID = -1.8A
IDSS Drain-to-Source Leakage Current
N-Ch ––– ––– 1.0
µA
VDS =24V, VGS = 0V
P-Ch ––– ––– -1.0 VDS = -24V,VGS = 0V
N-Ch ––– ––– 25 VDS =24V, VGS = 0V ,TJ =125°C
P-Ch ––– ––– -25 VDS = -24V,VGS = 0V,TJ =125°C
IGSS Gate-to-Source Forward Leakage N-P ––– ––– ± 100 nA VGS = ± 20V
Gate-to-Source Reverse Leakage N-P ––– ––– ± 100 VGS = ± 20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg Total Gate Charge N-Ch ––– ––– 25
nC
N-Channel
P-Ch ––– ––– 25 ID = 2.6A, VDS = 16V,VGS = 4.5V
Qgs Gate-to-Source Charge N-Ch ––– ––– 2.9
P-Ch ––– ––– 2.9 P-Channel
Qgd Gate-to-Drain Charge N-Ch ––– ––– 7.9 ID = -2.2A,VDS = -16V,VGS = -4.5V
P-Ch ––– ––– 9.0
td(on) Turn-On Delay Time N-Ch ––– 6.8 –––
ns
N-Channel
P-Ch ––– 11 ––– VDD = 10V,ID = 2.6A,RG = 6.0
tr Rise Time N-Ch ––– 21 ––– RD = 3.8
P-Ch ––– 17 –––
td(off) Turn-Off Delay Time N-Ch ––– 22 ––– P-Channel
P-Ch ––– 25 ––– VDD = -10V,ID = -2.2A,RG = 6.0
tf Fall Time N-Ch ––– 7.7 ––– RD = 4.5
P-Ch ––– 18 –––
LD Internal Drain Inductance N-P ––– 4.0 ––– nH Between lead, 6mm(0.25n) from
LS Internal Source Inductance N-P ––– 6.0 ––– package and center of die contact
Ciss Input Capacitance N-Ch ––– 520 –––
pF
N-Channel
P-Ch ––– 440 ––– VGS = 0V,VDS = 15V,ƒ = 1.0MHz
Coss Output Capacitance N-Ch ––– 180 –––
P-Ch ––– 200 ––– P-Channel
Crss Reverse Transfer Capacitance N-Ch ––– 72 ––– VGS = 0V,VDS = -15V,ƒ = 1.0MHz
P-Ch 93 –––
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current (Body Diode) N-Ch ––– ––– 1.8
A
P-Ch ––– ––– -1.8
ISM Pulsed Source Current N-Ch ––– ––– 16
(Body Diode) P-Ch ––– ––– -12
VSD Diode Forward Voltage N-Ch ––– ––– 1.0 TJ = 25°C,IS = 1.8A,VGS = 0V
P-Ch ––– ––– -1.0 TJ = 25°C,IS = -1.8A,VGS = 0V
trr Reverse Recovery Time N-Ch ––– 47 71 ns N-Channel
P-Ch ––– 53 80 TJ = 25°C ,IF = 2.6A, di/dt = 100A/µs
Qrr Reverse Recovery Charge N-Ch ––– 56 84 nC P-Channel
P-Ch 66 99 TJ = 25°C,IF = -2.2A, di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
V
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See Fig. 23)
N-Channel ISD 2.4A, di/dt 73A/µs, VDD V(BR)DSS, TJ 150°C.
P-Channel ISD -1.8A, di/dt 90A/µs, VDD V(BR)DSS, TJ 150°C
Pulse width 300µs; duty cycle 2%.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
AUIRF7309Q
3 2015-9-30
Fig. 2 Typical Output Characteristics
TJ = 150°C
Fig. 3 Typical Transfer Characteristics Fig. 4 Normalized On-Resistance
vs. Temperature
Fig. 1 Typical Output Characteristics
TJ = 25°C
N-Channel
AUIRF7309Q
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Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
N-Channel
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
Fig 11a. Gate Charge Test Circuit
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 11b. Basic Gate Charge Waveform
N-Channel
AUIRF7309Q
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P-Channel
Fig. 13 Typical Output Characteristics
TJ = 150°C
Fig. 14 Typical Transfer Characteristics Fig. 15 Normalized On-Resistance
vs. Temperature
Fig. 12 Typical Output Characteristics
TJ = 25°C
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Fig 16. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 17. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 19. Maximum Safe Operating Area
Fig. 18 Typical Source-to-Drain Diode
Forward Voltage
P-Channel
AUIRF7309Q
8 2015-9-30
Fig 20. Maximum Drain Current vs. Case Temperature
Fig 21a. Switching Time Test Circuit Fig 21b. Switching Time Waveforms
Fig 22a. Gate Charge Test Circuit Fig 22b. Basic Gate Charge Waveform
P-Channel
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Fig 24. Peak Diode Recovery dv/dt Test Circuit for N & P-Channel HEXFET® Power MOSFETs
Fig 23. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
N and P-Channel
AUIRF7309Q
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SO-8 Part Marking Information
SO-8 Package Outline (Dimensions are shown in millimeters (inches)
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASIC
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX
MILLIMETERSIN C H ES
MIN MAX
DIM
8°
e
c .0075 .0098 0.19 0.25
.025 BASIC 0.635 BASIC
87
5
65
D B
E
A
e
6X
H
0.25 [.010] A
6
7
K x 45°
8X L 8X c
y
0.25 [.010] C AB
e1
A
A1
8X b
C
0.10 [.004]
4312
FOOTPRINT
8X 0.72 [.028]
6.46 [.255]
3X 1.27 [.050]
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
N O TES:
1. D IM EN SIO N IN G & TO LERAN CIN G PER ASM E Y14.5M -1994.
2. CONTROLLING DIM ENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN M ILLIMETERS [INCHES].
5 DIM EN SIO N D O ES N O T IN CLU D E M O LD PRO TRU SIO N S.
6 DIM EN SIO N D O ES N O T IN CLU D E M O LD PRO TRU SIO N S.
M O LD PRO TRU SIO N S N O T TO EXC EED 0.25 [.010].
7 D IM EN SIO N IS TH E LEN G TH O F LEAD FO R SO LD ER IN G TO
A S U B S T R A T E .
M O LD PRO TRU SIO N S N O T TO EXC EED 0.15 [.006].
8X 1.78 [.070]
AUIRF7309Q
11 2015-9-30
SO-8 Tape and Reel (Dimensions are shown in millimeters (inches)
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
FEED DIRECTION
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
AUIRF7309Q
12 2015-9-30
Qualification Information
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
Moisture Sensitivity Level SO-8 MSL1
ESD
Machine Model
N CH: Class M2 (+/- 150V)†
AEC-Q101-002
Human Body Model
N CH: Class H1A (+/- 500V)†
AEC-Q101-001
Charged Device Model
N CH: Class C5 (+/- 2000V)†
AEC-Q101-005
RoHS Compliant Yes
P CH: Class M2(+/- 150V)†
P CH: Class H0 (+/- 250V)†
P CH: Class C5 (+/- 2000V)†
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
Revision History
Date Comments
9/30/2015 Updated datasheet with corporate template
Corrected ordering table on page 1.
3/28/2014 Added "Logic Level Gate Drive" bullet in the features section on page 1
Updated data sheet with new IR corporate template
† Highest passing voltage.
