DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT PC8179TK UE D 3 V SILICON MMIC LOW CURRENT AMPLIFIER FOR MOBILE COMMUNICATIONS DESCRIPTION The PC8179TK is a silicon monolithic integrated circuit designed as amplifier for mobile communications. This IC can realize low current consumption with external chip inductor which can not be realized on internal 50 wide band matched IC. PC8179TK adopts 6-pin lead-less minimold package using same chip as the conventional PC8179TB in 6-pin super minimold. TK suffix IC which is smaller package than TB suffix IC contributes to reduce mounting space by 50%. FEATURES O NT IN This IC is manufactured using our 30 GHz fmax UHS0 (Ultra High Speed Process) silicon bipolar process. * Low current consumption : ICC = 4.0 mA TYP. @ VCC = 3.0 V * Supply voltage : VCC = 2.4 to 3.3 V * Excellent isolation : ISL = 43.0 dB TYP. @ f = 1.0 GHz ISL = 42.0 dB TYP. @ f = 1.9 GHz ISL = 42.0 dB TYP. @ f = 2.4 GHz * Power gain : GP = 13.5 dB TYP. @ f = 1.0 GHz GP = 15.5 dB TYP. @ f = 1.9 GHz GP = 16.0 dB TYP. @ f = 2.4 GHz * Gain 1 dB compression output power : PO (1 dB) = +2.0 dBm TYP. @ f = 1.0 GHz PO (1 dB) = +0.5 dBm TYP. @ f = 1.9 GHz PO (1 dB) = +0.5 dBm TYP. @ f = 2.4 GHz : 0.1 to 2.4 GHz (Output port LC matching) * High-density surface mounting : 6-pin lead-less minimold package (1.5 1.3 0.55 mm) * Light weight : 3 mg (Standard value) SC * Operating frequency APPLICATION DI * Buffer amplifiers on 0.1 to 2.4 GHz mobile communications system Caution: Observe precautions when handling because these devices are sensitive to electrostatic discharge Document No. PU10059EJ02V0DS (2nd edition) Date Published April 2005 CP(K) The mark shows major revised points. PC8179TK ORDERING INFORMATION Part Number PC8179TK-E2 Order Number PC8179TK-E2-A Package Marking 6-pin lead-less minimold (1511) (Pb-Free) Supplying Form * Embossed tape 8 mm wide 6C Note * Pin 1, 6 face the perforation side of the tape D * Qty 5 kpcs/reel Note With regards to terminal solder (the solder contains lead) plated products (conventionally plated), contact UE your nearby sales office. Remark To order evaluation samples, contact your nearby sales office. Part number for sample order: PC8179TK-A PRODUCT LINE-UP (T A = +25C, VCC = Vout = 3.0 V, ZS = ZL = 50 ) ICC 1.0 GHz output port 1.66 GHz output port matching frequency matching frequency 1.9 GHz output port 2.4 GHz output port matching frequency matching frequency O NT IN Parameter Marking GP ISL PO (1dB) GP ISL PO (1dB) GP ISL PO (1dB) GP ISL PO (1dB) (mA) (dB) (dB) (dBm) (dB) (dB) (dBm) (dB) (dB) (dBm) (dB) (dB) (dBm) PC8178TB 1.9 11.0 39.0 4.0 11.5 40.0 7.0 11.5 38.0 7.5 C3B PC8178TK 1.9 11.0 40.0 5.5 11.0 41.0 8.0 11.0 42.0 8.0 6B PC8179TB 4.0 13.5 44.0 +3.0 15.5 42.0 +1.5 15.5 41.0 +1.0 C3C PC8179TK 4.0 13.5 43.0 +2.0 15.5 42.0 +0.5 16.0 42.0 +0.5 6C PC8128TB 2.8 12.5 39.0 4.0 13.0 39.0 4.0 13.0 37.0 4.0 C2P PC8151TB 4.2 12.5 38.0 +2.5 15.0 36.0 +1.5 15.0 34.0 +0.5 C2U PC8152TB 5.6 23.0 40.0 4.5 19.5 38.0 8.5 17.5 35.0 8.5 C2V Part No. Remarks 1. Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. DI SC 2. To know the associated product, please refer to each latest data sheet. 2 Data Sheet PU10059EJ02V0DS PC8179TK SYSTEM APPLICATION EXAMPLE O NT IN UE D Location examples in digital cellular These ICs can be added to your system around parts, when you need more isolation or gain. The application DI SC herein, however, shows only examples, therefore the application can depend on your kit evaluation. Data Sheet PU10059EJ02V0DS 3 PC8179TK PIN CONNECTIONS Pin Name 1 INPUT 2 GND 3 GND 4 OUTPUT 5 GND 6 VCC PIN EXPLANATION Pin No. Name 1 INPUT Applied Pin Voltage (V) Voltage Note (V) 0.90 Function and Applications Signal input pin. A internal matching circuit, configured with resisters, enables 50 connection over a wide band. This pin must be coupled to signal source with capacitor for DC cut. 2 GND 3 0 Ground pin. This pin should be connected to system ground with 5 minimum inductance. Ground pattern on the board should be formed as wide as possible. All the ground pins must be con- nected together with wide ground pattern to decrease impedance defference. OUTPUT Voltage 6 VCC Signal output pin. This pin is de- as same signed as collector output. Due to as VCC the high impedance output, this pin through should be externally equipped with external LC matching circuit to next stage. inductor For L, a size 1 005 chip inductor can SC 4 2.4 to 3.3 be chosen. Power supply pin. This pin should be externally equipped with bypass capacitor to minimize its impedance. DI Note Pin voltage is measured at VCC = 3.0 V. 4 Internal Equivalent Circuit O NT IN Pin UE D Pin No. Data Sheet PU10059EJ02V0DS PC8179TK ABSOLUTE MAXIMUM RATINGS Parameter Symbol Test Conditions Ratings Unit Supply Voltage VCC TA = +25C, Pin 4, Pin 6 3.6 V Circuit Current ICC TA = +25C 15 mA Power Dissipation PD TA = +85C 232 mW Operating Ambient Temperature TA 40 to +85 C Storage Temperature Tstg 55 to +150 C Input Power Pin +5 dBm UE TA = +25C D Note Note Mounted on double-sided copper-clad 50 50 1.6 mm epoxy glass PWB RECOMMENDED OPERATING RANGE Parameter MIN. TYP. MAX. Unit VCC 2.4 3.0 3.3 V Remarks The same voltage should be applied to O NT IN Supply Voltage Symbol pin 4 and pin 6. Operating Ambient Temperature TA 40 +25 +85 C ELECTRICAL CHARACTERISTICS (Unless otherwise specified, T A = +25C, VCC = Vout = 3.0 V, ZS = ZL = 50 , at LC matched frequency) Parameter Circuit Current Power Gain Gain 1 dB Compression Output DI Input Return Loss MIN. TYP. MAX. Unit No signal 2.9 4.0 5.4 mA GP f = 1.0 GHz, Pin = 30 dBm 11.0 13.5 15.5 dB f = 1.9 GHz, Pin = 30 dBm 13.0 15.5 17.5 f = 2.4 GHz, Pin = 30 dBm 14.0 16.0 18.5 f = 1.0 GHz, Pin = 30 dBm 39.0 43.0 f = 1.9 GHz, Pin = 30 dBm 37.0 42.0 f = 2.4 GHz, Pin = 30 dBm 37.0 42.0 f = 1.0 GHz 0.5 +2.0 f = 1.9 GHz 2.0 +0.5 f = 2.4 GHz 3.0 +0.5 f = 1.0 GHz 5.0 6.5 f = 1.9 GHz 5.0 6.5 f = 2.4 GHz 5.0 6.5 f = 1.0 GHz, Pin = 30 dBm 4.0 7.0 f = 1.9 GHz, Pin = 30 dBm 4.0 7.0 f = 2.4 GHz, Pin = 30 dBm 6.0 9.0 ISL PO (1 dB) Power Noise Figure Test Conditions ICC SC Isolation Symbol NF RLin Data Sheet PU10059EJ02V0DS dB dBm dB dB 5 PC8179TK TEST CIRCUITS <2> f = 1.9 GHz DI SC <3> f = 2.4 GHz O NT IN UE D <1> f = 1.0 GHz 6 Data Sheet PU10059EJ02V0DS PC8179TK ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD O NT IN UE D <1> f = 1.0 GHz Remarks 1. 42 35 0.4 mm double-sided copper-clad polyimide board 2. Back side: GND pattern 3. Gold plated on pattern 4. :Through holes COMPONENT LIST Form Symbol Value Type code Maker C1 , C3 1 000 pF GRM40CH102J50PT murata C2 0.75 pF GRM39CKR75C50PT murata C4 5 pF GRM39CH050C50PT murata C5 8 pF GRM39CH080D50PT murata Feed-though Capacitor C6 1 000 pF DFT301-801 7R102S50 murata Chip inductor L1 12 nH LL1608-FH12N TOKO DI SC Chip capacitor Data Sheet PU10059EJ02V0DS 7 PC8179TK O NT IN UE D <2> f = 1.9 GHz Remarks 1. 42 35 0.4 mm double-sided copper-clad polyimide board 2. Back side: GND pattern 3. Gold plated on pattern 4. :Through holes COMPONENT LIST Form Symbol Value Type code Maker C1 , C3 , C5 , C6 1 000 pF GRM40CH102J50PT murata C2 0.5 pF GRM39CKR5C50PT murata C4 8 pF GRM39CH080D50PT murata Feed-though Capacitor C7 1 000 pF DFT301-801 7R102S50 murata Chip inductor L1 2.7 nH LL1608-FH2N7S TOKO DI SC Chip capacitor 8 Data Sheet PU10059EJ02V0DS PC8179TK O NT IN UE D <3> f = 2.4 GHz Remarks 1. 42 35 0.4 mm double-sided copper-clad polyimide board 2. Back side: GND pattern 3. Gold plated on pattern 4. :Through holes COMPONENT LIST Form Symbol Value Type code Maker C1 , C2 , C4 , C5 1 000 pF GRM40CH102J50PT murata C3 10 pF GRM39CH100D50PT murata Feed-though Capacitor C6 1 000 pF DFT301-801 7R102S50 murata Chip inductor L1 2.7 nH LL1608-FH2N7S TOKO L2 1.8 nH LL1608-FH1N8S TOKO DI SC Chip capacitor Data Sheet PU10059EJ02V0DS 9 PC8179TK DI SC O NT IN Remark The graph indicates nominal characteristics. UE D TYPICAL CHARACTERISTICS (T A = +25C, unless otherwise specified) 10 Data Sheet PU10059EJ02V0DS PC8179TK DI SC O NT IN UE D f = 1.0 GHz MATCHING Remark The graphs indicate nominal characteristics. Data Sheet PU10059EJ02V0DS 11 O NT IN UE D PC8179TK DI SC Remark The graphs indicate nominal characteristics. 12 Data Sheet PU10059EJ02V0DS DI SC O NT IN UE D PC8179TK Remark The graphs indicate nominal characteristics. Data Sheet PU10059EJ02V0DS 13 DI SC O NT IN UE D PC8179TK Remark The graphs indicate nominal characteristics. 14 Data Sheet PU10059EJ02V0DS PC8179TK DI SC O NT IN UE D f = 1.9 GHz MATCHING Remark The graphs indicate nominal characteristics. Data Sheet PU10059EJ02V0DS 15 O NT IN UE D PC8179TK DI SC Remark The graphs indicate nominal characteristics. 16 Data Sheet PU10059EJ02V0DS DI SC O NT IN UE D PC8179TK Remark The graphs indicate nominal characteristics. Data Sheet PU10059EJ02V0DS 17 DI SC O NT IN UE D PC8179TK Remark The graphs indicate nominal characteristics. 18 Data Sheet PU10059EJ02V0DS PC8179TK DI SC O NT IN UE D f = 2.4 GHz MATCHING Remark The graphs indicate nominal characteristics. Data Sheet PU10059EJ02V0DS 19 O NT IN UE D PC8179TK DI SC Remark The graphs indicate nominal characteristics. 20 Data Sheet PU10059EJ02V0DS DI SC O NT IN UE D PC8179TK Remark The graphs indicate nominal characteristics. Data Sheet PU10059EJ02V0DS 21 DI SC O NT IN UE D PC8179TK Remark The graphs indicate nominal characteristics. 22 Data Sheet PU10059EJ02V0DS PC8179TK DI SC O NT IN Remark The graphs indicate nominal characteristics. UE D f = 3.0 GHz MATCHING Data Sheet PU10059EJ02V0DS 23 PC8179TK PACKAGE DIMENSIONS DI SC O NT IN UE D 6-PIN LEAD-LESS MINIMOLD (1511) (UNIT: mm) 24 Data Sheet PU10059EJ02V0DS PC8179TK NOTE ON CORRECT USE (1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation). All the ground pins must be connected together with wide ground pattern to decrease impedance difference. D (3) The bypass capacitor should be attached to VCC line. (4) The inductor (L) should be attached between output and VCC pins. The L and series capacitor (C) values should be adjusted for applied frequency to match impedance to next stage. RECOMMENDED SOLDERING CONDITIONS UE (5) The DC capacitor must be attached to input pin. This product should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your nearby sales office. Soldering Method Wave Soldering Partial Heating Condition Symbol Peak temperature (package surface temperature) : 260C or below Time at peak temperature : 10 seconds or less O NT IN Infrared Reflow Soldering Conditions Time at temperature of 220C or higher : 60 seconds or less Preheating time at 120 to 180C : 12030 seconds Maximum number of reflow processes : 3 times Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or below Peak temperature (molten solder temperature) : 260C or below Time at peak temperature : 10 seconds or less Preheating temperature (package surface temperature) : 120C or below Maximum number of flow processes : 1 time Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or below Peak temperature (terminal temperature) : 350C or below Soldering time (per side of device) : 3 seconds or less Maximum chlorine content of rosin flux (% mass) : 0.2%(Wt.) or below IR260 WS260 HS350 DI SC Caution Do not use different soldering methods together (except for partial heating). Data Sheet PU10059EJ02V0DS 25 NOTICE 5. 6. 7. 8. 9. 10. 11. 12. D UE 4. IN 3. NT 2. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. California Eastern Laboratories and Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. California Eastern Laboratories has used reasonable care in preparing the information included in this document, but California Eastern Laboratories does not warrant that such information is error free. California Eastern Laboratories and Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. 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DI CEL Headquarters * 4590 Patrick Henry Drive, Santa Clara, CA 95054 * Phone (408) 919-2500 * www.cel.com For a complete list of sales offices, representatives and distributors, Please visit our website: www.cel.com/contactus Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: CEL: UPC8179TK-E2-A UPC8179TK-EV19 UPC8179TK-EV09 UPC8179TK-EV24 UPC8179TK-A UPC8112TB-E3-A UPC8106TB-E3-A