Single Wire CAN-Transceiver
Final Data Sheet
TLE 6255 G
Data Sheet Rev. 2.2 1 2001-04-09
P-DSO-14-8; -9
2 Description
The TLE 6255 G is a special featured low speed transceiver for use in single wire
applications.
The device is primarily designed for use in single wire CAN systems operating with
various CSMA/CR (carrier sense multiple access/collision resolution) protocols such as
the BOSCH Controller Area Network (CAN).
The normal communication bitrate in CAN-systems is up to 33 kBit/s. For software or
diagnostic data download a high speed mode is offered that allows transmission rates
up to 100 kBit/s.
With ma ny int egra ted fea tures suc h as s lewrate contro lled o utput, l oss of groun d circ uit,
bi-level wake-up and sleep mode for low power consumption the TLE 6255 G is
optimized for use in automotive applications.
The device is based on Siemens power technology SPT® which allows bipolar and
CMOS control circuitry to be integrated with DMOS power devices on the same
monolithic circuitry.
Additional features like short circuit and overtemperature protection, over- and
undervoltage lockout are integrated. To enhance the reliability and robustness of the
TLE 6255 G the enhanced power SO-14 package is used in order to provide high
thermal capacity and low thermal resistance.
Type Ordering Code Package
TLE 6255 G Q67006-A9352 P-DSO-14-9 (SMD)
1Features
Single wire transceiver for up to 33 kBit/s bus speed
Excellent EMC performance
High speed mode for up to 100 kBit/s bus speed
Ambient operation range 40 °C to 125 °C
Supply voltage operation range 5.5 V to 28 V
•Typ. 30 µA total current consumption in sleep mode
4 kV ESD protection
Short circuit and overtemperature protected
Input bilevel feature for wake-up detection
Output bilevel feature for wake up call
Loss of Ground protection
Bus dominant timeout feature
Programmable slewrate
TLE 6255 G
Data Sheet Rev. 2.2 2 2001-04-09
3 Pin Configuration
(top view)
Figure 1 Pin Configuration
RxD = H indica tes a bus re cessive s tate, RxD = L a bus normal or hig h voltage d ominant
state.
AEP02568
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Chip
Leadframe
GND
TxD
M0
M1
RxD
GND
CC
V
GND
N.C.
CANH
LOAD
RSL
GND
batt
V
TLE 6255 G
Data Sheet Rev. 2.2 3 2001-04-09
4 Pin Definitions and Functions
Pin No. Symbol Function
1, 7, 8, 14 GND Ground; inte rnally connec ted to le adframe
2TxDTransceive-Input; low active, logic command to transmit
on the single wire CAN bus; inverting: TxD = low causes
CANH = dominant (high level); internal 10 k pull up
3M0Mode-Input 0; to program the device operating mode;
internal pull down
4M1Mode-Input 1; to program the device operating mode;
internal pull down
5RxDReceive-Output; open drain, logic data as sensed on the
single wire CAN bus; inverting (RxD = L when CANH is
dominant)
6VCC Supply Voltage; input for 5 V logic supply voltage
9RSLSlewrate-Program-Input; an external resistor to VCC on
this pin is requi red t o program the bus out put slewrate
10 Vbatt Battery Supply Voltage; external blocking capacitor
necessary (see application circuit)
11 LOAD Unit-Load Resistor Input; internal termination to GND
12 CANH CAN Bus Input/Output; single wire bus input and output;
short cir cuit pr otec te d
13 N.C. not conn ecte d
TLE 6255 G
Data Sheet Rev. 2.2 4 2001-04-09
5 Block Diagram
Figure 2 Block Diagram
AEB02565
M1 M0 Mode
L L Sleep
HL High-Speed
LH Wake-up Call
HH Normal
Mode-Logic
Circuit
Time Out
Current
Converter
Voltage
Receive
Comp
BUF
Circuit
Shape-
Wave-
UVLO
OVLO
Biasing
and
Startup-
Control
Protection
Loop
Feedback-
Filter
Input
Control
Ground
Loss of
Driver
Driver
Load
ESD
4 kV
ESD
4 kV
10
Batt
V
6
CC
V
12
CANH
LOAD 11
1, 7, 8, 14
GND 13
N.C.
5RxD
4M1
3M0
TxD
2
RSL
9
TLE 6255G
TLE 6255 G
Data Sheet Rev. 2.2 5 2001-04-09
6 Functional Description and Application Hints
6.1 Mode Control
By use of the two mode control pins M0 and M1 the transceiver can be set in the
following modes.
Sleep-Mode
In the sl eep mode the tot al current consumption of the TLE 6255 G is reduced to typically
30 µA. Nodes no t s et to s lee p m ode c an c omm uni cate withou t di st urbi ng EC Us th at a r e
already set to sleep mode. To achieve a wake-up via the CAN bus a high voltage level
messa ge (wak e-up c all ) is neces sa ry. O nly h ig h v ol tag e l ev el messages are reported to
the RxD pin in sleep mode. A wake-up from sleep mode of the transceiver itself has to
be done by setting the control inputs M0 and M1. If there is no modification on the mode
inputs the device remains in sleep mode after the wake-up signal is removed from the
bus.
The transc eiver’s los s of ground prote ction circuit co nnection to gro und is not interr upted
when in the sleep mode.
High-Speed-Mode
The high-speed mode can be used fo r software or diagnostic data download with bitrates
up to 100 kBit/s. Therefore the slewrate control feature is deactivated to achieve the
required timings. Further an additional external resistor of 100 from CANH to GND is
necessary in this mode.
Wakeup-Call Mode
In this mode the TLE 6255 G sends the message to be transmitted as a high voltage
wake-up message.
The bu s includes a spec ial node w ake up capabili ty whic h allow s normal co mmunic ation
to take pla ce amo ng so me nod es w hi le leav in g the other node s in an un dis turb ed s lee p
state. This is accomplished by controlling the level of the signal voltages such that all
nodes must wake up when they receive a higher voltage message signal waveform.
Communication at the lower, normal voltage levels shall not disturb the sleeping nodes
(Vbatt >9V).
Table 1 Transceiver Modes
#M0M1Mode
1 Low Low Sleep mode
2 High Low High speed mode
3 Low High Wake -up ca ll
4 High High Normal mode
TLE 6255 G
Data Sheet Rev. 2.2 6 2001-04-09
Normal Mode
In the no rma l mo de the TLE 6255 G sends a normal vol tag e me ss ag e w av eform on the
bus. It is possible to run the transceiver up to transmission rates of 33 kBits/s in this
mode.
The waveform as well as the slew rate of the rising edge (recessive to dominant
transition) are controlled by the internal active wave shaping circuit to minimize EME
(electromagnetic emission). For the same reason waveform trailing edge control is
required to assure that high frequency content is minimized at the beginning of the
downward voltage slope (dominant to recessive transition). The remaining fall time
occurs after the bus is inactive wi th drivers of f and is determi ned by the RC time consta nt
of the total bus load.
6.2 Slew-Rate Control
The CANH output voltage and current is controlled by an internal waveshaping circuit.
For optimized adjusting of the slew rate to the system timing, the slew rate is
programmable by an external resistor connected from pin RSL to VCC. Figure 4 shows
the correlation of the slew rate to the resistor RRSL.
6.3 Transmitter
The TLE 6255 G contains a high current fully short circuit and overtemperature protected
highsi de-dr iver (p in CANH) . To m inimi ze sp ectral conten t the C ANH-ou tput wavefor m is
controlled.
Logic lo w (TxD = L) on pin TxD will command the output stage to switch to dominant high
potential; TxD = H to recessive low on the bus.
To avoid the bus to be blocked by a permanent dominant TxD input signal, the
TLE 6255 G incorporates a timeout feature. In case of TxD = L for longer than the
internal fixed timeout the CANH output is switched off automatically. The timeout is
resetted by a H-signal at TxD without a delay.
The loss of an ECU ground may cause the ECU to source current through the various
ECU circuits to the communications bus instead of to the vehicle system ground.
Therefore the unit-load resistor of any ECU is connected to the LOAD-pin. The
TLE 6255 G incorporates a reverse protected switch from LOAD to ground potential.
This switch is automatically switched off in a loss of ground state.
6.4 Receiver
In normal, high speed and wakeup-mode all data on the bus is sensed by the receive
comparator and transmitted to the RxD output. In sleep mode no normal level data is
detected. The receiver threshold is set to the wake-up level. So a wake-up interrupt is
sent only in case of a wake-up call on the bus. An internal fixed filter improves the EMC
susceptibility.
TLE 6255 G
Data Sheet Rev. 2.2 7 2001-04-09
7 Absolute Maximum Ratings
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Parameter Symbol Limit Values Unit Remarks
min. max.
Voltages
Supply voltage Vbatt – 0.3 40 V
CAN bus input/output voltage VCANH – 28 28 V
Load voltage VLOAD – 28 28 V
Logic supply voltage VCC – 0.3 7 V
Logic voltages
(VRxD; VTxD; VM0; VM1; VRSL)Vlogic – 0.3 7 V
Currents
CAN Bus current ICANH mA internally limited
Load current ILOAD mA internally limited
ESD-Protection (Human Body Model; According to MIL STD 833 D)
Pin CANH, Vbatt VESD 4000 4000 V
Other pins VESD 2000 2000 V
Temperatures
Junction temperature Tj– 40 150 °C–
Junction temperature Tj–175°Ct< 1000 h
Junction temperature Tj–200°Ct<10h
Storage temperature Tstg – 50 150 °C–
Thermal Resistances
Junction to pin Rthj-pin 40 K/W junction to pin 1
Junction ambient Rthj-a –65K/W
TLE 6255 G
Data Sheet Rev. 2.2 8 2001-04-09
8 Operating Range
Parameter Symbol Limit Values Unit Remarks
min. max.
Supply voltage Vbatt VUVOFF 28 V After Vbatt rising above
VUV ON
Supply voltage increasing Vbatt – 0.3 VUV ON V Outputs in tristate
Supply voltage decreasing Vbatt – 0.3 VUV OFF V Outputs in tristate
Logic supply voltage VCC VPOROF 5.5 V After VCC rising above
VPORON
Logic supply voltage;
increasing VCC – 0.3 VPORON V Outputs in tristate
Logic supply voltage;
decreasing VCC – 0.3 VPOROF V Outputs in tristate
Junction temperature Tj– 40 150 °C–
RSL resis tanc e RRSL 35 200 k
Thermal Shutdown
Thermal shutdown junction
temperature TjSD 150 200 °C–
Thermal switch-on junction
temperature TjSO 120 170 °C temperature hysteresis
T = 30 K (typ.)
TLE 6255 G
Data Sheet Rev. 2.2 9 2001-04-09
9 Electrical Characteristics
5.5 V < Vbatt < 16 V; 4.75 V < VCC <5.25 V; –40 °C<Tj<150 °C; M0 = M1 = H;
RUL=9.1 k (connected between CANH and LOAD);=RRSL =39k; all voltages with
respect to ground; positive current defined flowing into pin; unless otherwise specified
Parameter Sym-
bol Limit Values Unit Test Condition
min. typ. max.
Current Consumption
Supply current at Vbatt;
sleep mode Ibatt –2040µAM0=M1=L;
Supply current at VCC;
sleep mode ICC –1030µAM0=M1=L;
Supply current at Vbatt Ibatt –36mATxD=L
Supply current at Vbatt Ibatt –1.53mATxD=H
Supply current at Vbatt Ibatt –59mATxD=L; M0=L
Supply current at Vbatt Ibatt –46mATxD=H; M0=L
Supply current at VCC ICC –35mATxD=H or L;
M0 = H or L
Over- and Under Voltage Lockout
UV Switch ON voltage VUVON –5.25.6VVbatt increasing;
VCC = 5 V
UV Swi tch OFF vo ltage VUVOFF 4.00 4.6 5.1 V Vbatt decreasing;
VCC =5 V
UV ON/OFF
Hysteresis VUVHY –0.6–VVUVON VUVOFF
OV Switch OFF
voltage VOVOFF 30 33 38 V Vbatt increasing
OV Switch ON voltage VOVON 28 32 36 V Vbatt decreasing
OV ON/OFF
Hysteresis VOVHY 0.2 2 V VOVOFF VOVON
TLE 6255 G
Data Sheet Rev. 2.2 10 2001-04-09
Power ON/OFF Reset at VCC
Power ON Reset
voltage VPORON 4.00 4.25 4.50 V VCC increasing
Power OFF Reset
voltage VPOROF 3.50 3.75 4.00 V VCC decreasing
POR ON/OFF
Hysteresis VPORHY 0.1 0.5 V VPORON VPOROF
Transceive Input TxD
H-input voltage
threshold VTxDH –2.60.7×
VCC
V–
L-input voltage
threshold VTxDL 0.3 ×
VCC
2.4 V
Hysteresis of input
voltage VTxDHY 50 200 500 mV
Pull up current ITxD –20 –10 –5 µA0 V<VTxD <4 V
Timeout reaction time tTOR 51030ms
Receive Output RxD
Output leakage current IRxDLK – 2 0 10 µAVRxD =5 V
Output low voltage
level VRxDL –0.20.4VIRxDL =2 mA
Falltime tFRxD 80 200 ns CRxD = 25 pF to GND
5.5 V < Vbatt < 16 V; 4.75 V < VCC <5.25 V; –40 °C<Tj<150 °C; M0 = M1 = H;
RUL=9.1 k (connected between CANH and LOAD);=RRSL =39k; all voltages with
respect to ground; positive current defined flowing into pin; unless otherwise specified
Parameter Sym-
bol Limit Values Unit Test Condition
min. typ. max.
TLE 6255 G
Data Sheet Rev. 2.2 11 2001-04-09
Mode Input M0 and M1
H-input voltage
threshold VM0,1H –2.60.7×
VCC
V–
L-input voltage
threshold VM0,1L 0.3 ×
VCC
2.4 V
Hysteresis of input
voltage VM0,1HY 50 200 500 mV
Pull down current IM0,1 52050µA1V<VM0,1 <5V
Mode Change Delaytimes
Normal to high-speed tDNH –530µsM1 H to L;
(guaranteed by design)
Normal to wakeup call tDNW –530µsM0 H to L
(guaranteed by design)
Normal to sleep tDNS –5500µs M0 and M1 H to L
(guaranteed by design)
Sleep to normal tDSN –550µs M0 and M1 L to H
(guaranteed by design)
Slewrate Input RSL
Output voltage VRSL 2.5 3 3.5 V IRSL = 100 µA
5.5 V < Vbatt < 16 V; 4.75 V < VCC <5.25 V; –40 °C<Tj<150 °C; M0 = M1 = H;
RUL=9.1 k (connected between CANH and LOAD);=RRSL =39k; all voltages with
respect to ground; positive current defined flowing into pin; unless otherwise specified
Parameter Sym-
bol Limit Values Unit Test Condition
min. typ. max.
TLE 6255 G
Data Sheet Rev. 2.2 12 2001-04-09
CANH as Bus Input / Receiver
Wake up offset
threshold VIHWUO Vbatt
4.30 Vbatt
3.25 VVbatt = 8 V
see note; see Figure 8
Wake up fixed
threshold VIHWUF 6.15 7.1 8.10 V Vbatt = 14 V
see note; see Figure 8
Wakeup dead time tDWU 10 21 50 µs–
Wake up minima l pulse
time tWUMIN 1510µs–
Receive threshold; in
normal, hig h-s pee d
and wake-up mode
VIH 1.8 2 2.2 V 6 V < Vbatt <16V
Receive h ysteresis VRHY 50 80 200 mV
Receive propagation
time tCRF 0.05 0.3 1 µsVCANH >(VIH + 0.8 V) to
RxD = L; 6 V < Vbatt <16 V
Receive propagation
time; high speed tCRF 0.05 0.25 0.5 µsVCANH >(VIH + 0.8 V) to
RxD = L; M1 = L;
6V<Vbatt <16V;
Tj<125 °C
Receive propagation
time tCRR 0.05 0.3 1 µsVCANH < (VIH 0.8 V) to
RxD = H; RRxD =2.4k
6V<Vbatt <16V
Receive propagation
time; high speed tCRR 0.05 0.25 0.5 µsVCANH < (VIH 0.8 V) to
RxD = H; RRxD =2.4k
M1 = L; 6 V < Vbatt <16V;
Tj<125 °C
Receive blanking time
after CANH H to L
transition
tCRB 1.5 3.0 5.0 µssee Figure 7
Note: The device will send a wake up call to the microcontroller at the minimum of
VIHWUO or VIHWUF.
5.5 V < Vbatt < 16 V; 4.75 V < VCC <5.25 V; –40 °C<Tj<150 °C; M0 = M1 = H;
RUL=9.1 k (connected between CANH and LOAD);=RRSL =39k; all voltages with
respect to ground; positive current defined flowing into pin; unless otherwise specified
Parameter Sym-
bol Limit Values Unit Test Condition
min. typ. max.
TLE 6255 G
Data Sheet Rev. 2.2 13 2001-04-09
CANH as Bus Output / Transmitter
Offset wake up outp ut
high voltage VOHWUO Vbatt
1.5 Vbatt V 220 <RUL <9.1kΩ;
TxD = L; M0 = L;
6V<Vbatt <V
OHWUF
Fixed wakeup output
high voltage VOHWUF 9.7 12 V 220 <RUL <9.1k=
TxD = L; M0 = L
VOHWUF <Vbatt <16V
Bus output high
voltage; normal and
high speed
VOH 3.60 4.0 4.55 V 100 <RUL <9.1 k=
TxD = L; 6 V < Vbatt <16V
Bus output current limit IOLI 200 250 350 mA TxD = L; VCANH =0 V
Bus output leakage
current IOLK – 10 200 µATxD=H; Tj< 125 °C;
Vbatt –28V<VCANH <
Vbatt –1V
Bus output leakage
current (lo ss of ground) IOLK – 50 200 µA0V<Vbatt <VUVOFF;
Vbatt –28 V<VCANH <
Vbatt –1 V
Slew rate rising edge,
normal mo de SCANH –2.0–Vs 20% < VCANH <80%
Slew rate rising edge,
wake-up mode SCANH –4.0–Vs 20% < VCANH <80%
M0 = L; Vbatt =12V
Slew rate rising edge;
high speed; SCANH 51625Vs 20% < VCANH <80%
M1 = L; Tj< 125 °C
Transmit propagation
time; normal mode tTCF 256µsTxD=(HtoL) to
VCANH =(VIH +0.8V)
1.0 µs < τ=< 3.6 µs;
Transmit propagation
time; wake-up mode tTCF 154µsTxD=(HtoL) to
VCANH =(VIH + 0.8 V);
M0 = L; Vbatt = 12 V;
1.0 µs < τ=< 3.6 µs
5.5 V < Vbatt < 16 V; 4.75 V < VCC <5.25 V; –40 °C<Tj<150 °C; M0 = M1 = H;
RUL=9.1 k (connected between CANH and LOAD);=RRSL =39k; all voltages with
respect to ground; positive current defined flowing into pin; unless otherwise specified
Parameter Sym-
bol Limit Values Unit Test Condition
min. typ. max.
TLE 6255 G
Data Sheet Rev. 2.2 14 2001-04-09
Transmit prop agation
time; high speed mode tTCF –0.51.5µsTxD=(HtoL) to
VCANH =(VIH + 0.8 V);
M1 = L;=τ=< 1 µs;
Tj<125 °C
Transmit propagation
time; normal mode tTCR 358µs TxD=(LtoH) to
VCANH =(VIH –0.8V)
1.0 µs < τ=< 3.6 µs;
Transmit propagation
time; wake-up mode tTCR 3–12.7µs TxD=(LtoH) to
VCANH =(VIH 0.8 V);
M0 = L; 1.0 µs < τ=< 3.6 µs;
Transmit propagation
time; high speed tTCRH ––3.0µs TxD=(LtoH) to
VCANH =(VIH 0.8 V);
M1 = L;
τ< 1.6 µs; Tj< 125 °C
Unit-Load Resistor Ground Input LOAD
Output low voltage
level VLOAD –20100mVILOAD =2mA;
8V<Vbatt <16V
Output leakage current
(loss of ground) ILOADLK – 50 50 µA0V<Vbat <VUVOFF
Tj<125=°C; Vbatt –28V
<VCANH <Vbatt –1V
5.5 V < Vbatt < 16 V; 4.75 V < VCC <5.25 V; –40 °C<Tj<150 °C; M0 = M1 = H;
RUL=9.1 k (connected between CANH and LOAD);=RRSL =39k; all voltages with
respect to ground; positive current defined flowing into pin; unless otherwise specified
Parameter Sym-
bol Limit Values Unit Test Condition
min. typ. max.
TLE 6255 G
Data Sheet Rev. 2.2 15 2001-04-09
10 Diagrams
Figure 3 Input/Output-Timing (Pin CANH, TxD and RxD)
AET02566
TxD
V
t
t
CANH
V
50%
80%
20%
TCF
t
TCR
t
V
IH IH
V
t
V
tR
t t
tF
RxD
V
50%
t
CRF
t
CRR
t
Bus Output Slewrate Definition: S
CANH
=V
twith 20% <
CANH
V< 80%
TLE 6255 G
Data Sheet Rev. 2.2 16 2001-04-09
Figure 4 Slewrate SCANH vs. Programming Resistor RRSL (Pin RSL)
Figure 5 Wakeup Deadtime tDWU
R
RSL
S
CANH
µs
V
kOhm
20 50 100 200 500
2.0
1.0
0.5
0.1
5.0
1000
35
0.2
AED02570
AET02571
t
CANH
V
RxD
V
t
IHWU
V
IH
V
p
t
DWU
t
p
t
t
DWU
t
WUMIN
Controller
Wake Up
t
p
t
DWU
No Wake Up
DWUp
t<t
<
TLE 6255 G
Data Sheet Rev. 2.2 17 2001-04-09
Figure 6 Bus Dominant Blanking Time tTOR
AET02572
TxD
V
t
CANH
V
t
t
t
Time Out
Counter
H
L
Active
Passive
Time Out
Status Normal Operation Normal OperationBus Blocked Bus Available
TOR
t
Parasitic dominant "L" on TxD
IH
V
IH
V
TLE 6255 G
Data Sheet Rev. 2.2 18 2001-04-09
Figure 7 RxD Blanking Time tCRB
AET02573
TxD
V
t
CANH
V
t
t
Without Blanking Feature With Blanking Feature
IH
V
VRxD
Bus Ringing Bus Ringing
CRB
t
TLE 6255 G
Data Sheet Rev. 2.2 19 2001-04-09
Figure 8 Wake-up Threshold VIHWU vs. Supply Voltage VS
AED02781
0
0
V
S
IHWU
V
2 4 6 8 10 12 14 16 18 20 22 26
1
2
3
4
5
6
7
8
V
V
24
j
T= 150 ˚C
= 25 ˚CT
j
= -40 ˚C
j
T
TLE 6255 G
Data Sheet Rev. 2.2 20 2001-04-09
11 Application Circuit
Figure 9 Application Circuit
AES02574
WADJ
R2
Watchdog
Adjust
Adjust (optional)
Reset-Threshold 7
Reset Delay 6
C
0
47 nF
91 k
13
GND
3-5, 10-12
8Watchdog Input
Watchdog Output
1
Reset Output
14
9
Q
V
C
S1
220 nF
TLE 4278G
9RSL
3M0
5
4
RxD
M1
2TxD
1, 7, 8, 14
GND
TLE 6255G
CANH 12
Load 11
UL
9.1 k
R
UL
L
47 µH
220 pF
UL
C
R
RSL
100 k2.4 k
R
RxD
10 k
R
TxD
CC
V
6
CC
V
GND
Controller
S3
Cµ4.7 F
1N4001
ECU
Battery
V
Single Wire CAN Bus
C
CC1
22 µF
10
Batt
V
CC2
C
V
Ι
100 nF
S2
C
R
D
TLE 6255 G
Data Sheet Rev. 2.2 21 2001-04-09
12 Package Outlines
P-DSO-14-9
(Plastic Dual Small Outline)
GPS09222
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Pac kage Inform ation”. Dimensions in mm
SMD = Surface Mounted Device
TLE 6255 G
Data Sheet Rev. 2.2 22 2001-04-09
TLE 6255 G
Data Sheet Rev. 2.2 23 2001-04-09
Edition 2001-04-09
Published by Infineon
Technologies AG,
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 2001.
All Rights Reserved.
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Terms of delivery and rights to techni-
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We hereby disclaim any and all war-
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warranties of non-infringement, re-
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charts stated herein.
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proved CECC manufacturer.
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