Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
VC-708
LVPECL, LVDS Crystal Oscillator Data Sheet
Ultra Low Phase Noise
Vectron’s VC-708 Crystal Oscillator is a quartz stabilized, low phase noise, di erential output oscillator which is hermetically sealed
in a 5x7 ceramic package.
47 fs RMS jitter typical, 12kHz-20MHz•
Ultra Low Jitter Performance, 3rd OT Crystal Design•
Di erential Output•
Low Current Consumption•
-10/70°C or -40/85°C Operation•
Hermetically Sealed 5x7 Ceramic Package•
Product is compliant to RoHS directive •
and fully compatible with lead free assembly
Ethernet, GbE, SynchE•
Fiber Channel•
PON•
Driving A/D’s, D/A’s, FPGA’s•
Test and Measurement•
Medical•
Storage Area Networking•
Telecom•
COTS •
Features Applications
Block Diagram
Description
VC-708
Phase Noise Plot
VDD Output
NC Gnd
Oscillator
Crystal
NC
Complementary
Output
Page1
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Performance Speci cations
1. The VC-708 power supply pin should be ltered, e.g., a 10, 0.1, 0.01 and 0.001uf capacitors.
2. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR re ow.
3. Figure 1 de nes these parameters.
4. Duty Cycle is de ned as the On Time/Period, see Figure 1.
5. Measured using an Agilent E5052.
6. Measured using a LeCroy Wavemaster 8600A, 90K samples, no ltering applied.
7. Measured using a Wavecrest SIA3300C, 90K samples.
Table 1. Electrical Performance, LVPECL
Parameter Symbol Min Typical Maximum Units
Supply
Voltage1VDD 3.135
2.375
3.3
2.5
3.465
2.625
V
V
Current (No Load) IDD 50 65 mA
Frequency
Nominal Frequency fNSee Table 8. MHz
Stability2 (Ordering Option) ±25, ±50, ±100 ppm
Outputs
Output Logic Levels, -10/70°C
Output Logic High
Output Logic Low
VOH
VOL
VDD-1.025
VDD-1.810
VDD-0.880
VDD-1.620
V
V
Output Logic Levels, -40/85°C
Output Logic High
Output Logic Low
VOH
VOL
VDD-1.085
VDD-1.830
VDD-0.880
VDD-1.555
V
V
Output Rise and Fall Time3
Rise Time
Fall Time
tR
tF
1.0
1.0
ns
ns
Load 50 ohms into VDD-1.3V
Duty Cycle445 50 55 %
Jitter, 156M2505
12 kHz - 20 MHz
12 kHz - 40 MHz
10 kHz -1 MHz
1 kHz -1 MHz
1.875 MHz-20 MHz
фJ
47
75
20
90
45
100
150
40
180
90
fs
fs
fs
fs
fs
Period Jitter6
RMS
P/P
Deterministic Jitter7
фJ
1.3
12
0
ps
ps
ps
Start-Up Time tSU 10 ms
Operating Temperature
(Ordering Option)
TOP -10/70 or -40/85 °C
Package Size 5.0 x 7.0 x 1.8 mm
Figure 1.
tRtF
VDD*0.8
VDD*0.2
Crossing Point
On Time
Period
Page2
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Performance Speci cations
1. The VC-708 power supply pin should be ltered, eg, a 10, 0.1, 0.01, 0.001uf capacitors.
2. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR re ow.
3. Figure 1 de nes these parameters.
4. Duty Cycle is de ned as the On Time/Period, see Figure1.
5. Measured using an Agilent E5052.
6. Measured using a LeCroy Wavemaster 8600A, 90K samples, no ltering applied.
7. Measured using a Wavecrest SIA3300C, 90K samples.
Table 2. Electrical Performance, LVDS
Parameter Symbol Min Typical Maximum Units
Supply
Voltage1 (Ordering Option) VDD 3.135
2.375
3.3
2.5
3.465
2.625
V
V
Current (No Load) IDD 37 48 mA
Frequency
Nominal Frequency fNSee Table 9. MHz
Stability2 (Ordering Option) ±25, ±50, ±100 ppm
Outputs
Di erential Output Amplitude 247 454 mV
Di erential Output Error -50 50 mV
O set Voltage 1.125 1.250 1.375 V
O set Voltage Error -50 50 mV
Output Rise and Fall Time3
Rise Time
Fall Time
tR
tF
1.0
1.0
ns
ns
Load 100 ohms di erential
Duty Cycle3,4 45 50 55 %
Jitter 156.250MHz5
12 kHz - 20 MHz
12 kHz - 40 MHz
10 kHz -1 MHz
1 kHz - 1 MHz
1.875 MHz-20 MHz
фJ
65
90
35
90
63
130
180
70
180
120
fs
fs
fs
fs
fs
Period Jitter6
RMS
P/P
Deterministic Jitter7
фJ
1.3
12
0
ps
ps
ps
Start-Up Time tSU 10 ms
Operating Temperature
(Ordering Option)
TOP -10/70 or -40/85 °C
Package Size 5.0 x 7.0 x 1.8 mm
Page3
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Package and Pinout
Table 3. Pinout
Pin # Symbol Function
1 NC No Internal Connection is made
2 NC No Internal Connection is made
3 GND Electrical and Lid Ground
4 fOOutput Frequency
5 CfOComplementary Output Frequency
6 VDD Supply Voltage
Figure 3. Package Outline Drawing
7.0±0.15
5.0±0.15
1.40 1.20
3.57
2.54
5.08
1
31
Bottom View
5
2
2 3
6 5 4
6 4
1.8 max
Figure 2. Pad Layout
1.96
3.66
5.08
2.54
1.78
LVPECL Application Diagrams
The VC-708 incorporates a standard PECL output scheme, which are unterminated FET drains. There are numerous application notes on terminating and
interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 4, and a pull-up/pull-down scheme as shown in Figure 5.
AC coupling capacitor are optional, depending on the application and the input logic requirements of the next stage.
1
2
3
6
5
4
NC
NC
VDD
140 140
0.01uF
0.01uF
0.01uF
Figure 4. Single Resistor Termination Scheme
Resistor values are typically 140 ohms for 3.3V operation and
84 ohms for 2.5V operation.
Figure 5. Pull-Up Pull Down Termination
Resistor values shown are typical for 3.3 V opertaion.
For 2.5V operation, the resistor to ground is 62 ohms and
the resistor to supply is 250 ohms
One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left untermi-
nated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching
into account. Load matching and power supply noise are the main contributors to jitter related problems.
Units are mm
VC-708
XXMXXX
YYWW C
Page4
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Environmental and IR Compliance
Table 4. Environmental Compliance
Parameter Condition
Mechanical Shock MIL-STD-883 Method 2002
Mechanical Vibration MIL-STD-883 Method 2007
Temperature Cycle MIL-STD-883 Method 1010
Solderability MIL-STD-883 Method 2003
Fine and Gross Leak MIL-STD-883 Method 1014
Resistance to Solvents MIL-STD-883 Method 2015
Moisture Sensitivity Level MSL1
Contact Pads Gold over Nickel
Gold thickness is 0.3-1.0um
100
LVDS
Driver
LVDS
Receiver
100
LVDS
Driver Receiver
Figure 6. LVDS to LVDS Connection, Internal 100ohm Resistor
Some LVDS structures have an internal 100 ohm resistor on the in-
put and do not need additional components. AC blocking capacitors
can be used if the DC levels are incompatible.
Figure 7. LVDS to LVDS Connection
Some input structures may not have an internal 100 ohm resis-
tor on the input and will need an external 100ohm resistor for
impedance matching. Also, the input may have an internal DC
bias which may not be compatible with LVDS levels, AC block-
ing capacitors can be used.
LVDS Application Diagrams
One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-termi-
nated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching
into account. Load matching and power supply noise are the main contributors to jitter related problems.
IR Compliance
Table 5. Re ow Pro le
Parameter Symbol Value
PreHeat Time ts 200 sec Max
Ramp Up RUP 3°C/sec Max
Time above 217°C tL 150 sec Max
Time to Peak Temperature tAMB-P 480 sec Max
Time at 260°C tP 30 sec Max
Time at 240°C tP2 60 sec Max
Ramp down RDN 6°C/sec Max
Suggested IR Pro le
Devices are built using lead free epoxy and can be subjected to
standard lead free IR re ow conditions shown in Table 5. Contact
pads are gold over nickel and lower maximum temperatures can also
be used, such as 220C.
S
Page5
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Absolute Maximum Ratings and Handling Precautions
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied or any other
excess of conditions represented in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended
periods may adversely a ect device reliability.
Although ESD protection circuitry has been designed into the VC-708, proper precautions should be taken when handling and mounting,
VI employs a Human Body Model and Charged Device Model for ESD susceptibility testing and design evaluation.
ESD thresholds are dependent on the circuit parameters used to de ne the model. Although no industry standard has been adopted for
the CDM a standard resistance of 1.5kOhms and capacitance of 100pF is widely used and therefor can be used for comparison purposes.
S
Table 6. Maximum Ratings
Parameter Symbol Rating Unit
Storage Temperature TSTORE -50/125 °C
Supply Voltage -0.5 to 7.0 V
ESD, Human Body Model 1500 V
ESD, Charged Device Model 1000 V
Maximum Ratings, Tape & Reel
Table 7. Tape and Reel Information
Tape Dimensions (mm) Reel Dimensions (mm)
W F Do Po P1 A B C D N W1 W2 #/Reel
16 7.5 1.5 4 8 180 2 13 21 55 17 21 250
Page6
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
Page7
Disclaimer
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application.
No rights under any patent accompany the sale of any such product(s) or information.
Rev: 02/07/2014
For Additional Information, Please Contact
USA:
Vectron International
267 Lowell Road Unit 102
Hudson, NH 03051
Tel: 1.888.328.7661
Fax: 1.888.329.8328
Europe:
Vectron International
Landstrasse, D-74924
Neckarbischofsheim, Germany
Tel: +49 (0) 3328.4784.17
Fax: +49 (0) 3328.4784.30
Asia:
VI Shanghai
68 Yin Cheng Road (C), 22nd Floor
One LuJiaZui
Pudong, Shanghai 200120, China
Tel: 86.21.6194.6886
Fax: 86.21.6194.6699
Ordering Information
Table 8. Standard Output Frequencies (MHz) LVPECL
32.000 80.000 120.000 125.000 155.520 156.250 156.253906 156.257812
160.000 161.132800 161.132812 167.970 174.220 200.000
Example: VC-708-ECE-KNXN-156M250000
*Note: not all combination of options are available.
Other speci cations may be available upon request.
VC-708- E C E - K N X N - 156M250000
Product
XO
Voltage Options
E: +3.3 Vdc, ±5%
H: +2.5 Vdc, ±5%
Output
C: LVPECL
D: LVDS
Frequency in MHz
Temp Range
W: -10/70°C
E: -40/85°C
Other (Future Use)
N: Standard
Stability
F: ±25ppm
K: ±50ppm
S: ±100ppm
Enable/Disable Pin
X: No Enable/Disable
Package
5x7
Other (Future Use)
N: Standard
Table 9. Standard Output Frequencies (MHz) LVDS
106M250 125M000 153M600 156M250 160M0000 161M1328 200M000
