INTEGRATED CIRCUITS DATA SHEET TDA8793 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter Objective specification File under Integrated Circuits, IC02 1998 May 14 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 FEATURES GENERAL DESCRIPTION * 8-bit low-power ADC (170 mW typical) The TDA8793 is an 8-bit low-power Analog-to-Digital Converter (ADC) which includes a track-and-hold circuit and an internal reference. The device converts an analog input signal, up to 100 MHz, into 8-bit binary codes at a maximum sample rate of 100 Msps. All digital inputs and output are TTL/CMOS compatible. * 2.7 to 3.6 V operation * Sampling rate up to 100 Msps * Track-and-hold circuit * CMOS/TTL compatible digital inputs and outputs * Internal references The power-down mode enables the device power consumption to be reduced to 5 mW. * Power-down mode; 5 mW. APPLICATIONS * Radio communications * Digital data storage read channels * Medical imaging * Digital instrumentation. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCCA analog supply voltage 2.7 3.0 3.6 V VCCD digital supply voltage 2.7 3.0 3.6 V VCCO output stages supply voltage 2.7 3.0 3.6 V ICCA analog supply current - 40 - mA ICCD digital supply current - 16 - mA ICCO output stages supply current - 0.1 - mA INL integral non linearity ramp input; fCLK = 100 MHz; VCCA = VCCD = 3 V - 1 tbf LSB DNL differential non-linearity ramp input; fCLK = 100 MHz; VCCA = VCCD = 3 V - 0.75 tbf LSB fCLK(max) maximum clock input frequency 100 - - MHz Ptot total power dissipation - tbf - mW VCC = 3 V ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8793 LQFP32 1998 May 14 DESCRIPTION plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm 2 VERSION SOT401-1 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 BLOCK DIAGRAM VCCA TEN handbook, full pagewidth 12 VCCD VCCO2 VCCO1 10 22 20 7 26 25 24 INP INN REFOUT REFIN 4 3 23 TRACK-ANDHOLD CMOS OUTPUTS LATCHES ADC STDBY 15 2 32 11 D5 D4 D3 D2 D1 D0 CLK VREFOUT = 1.85 V REFERENCE VSDN = 1.25 V TDA8793 8 31 DEC 6 9 AGND DGND Fig.1 Block diagram. 1998 May 14 17 16 5 CLOCK DRIVER SDN 18 D7 D6 3 19 21 OGND1 ODGND2 MGR016 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 PINNING SYMBOL PIN DESCRIPTION SYMBOL PIN DESCRIPTION n.c. 1 not connected D2 17 data output bit 2 REFIN 2 reference input for ADC D3 18 data output bit 3 INN 3 negative input OGND1 19 output ground 1 INP 4 positive input VCCO1 20 output supply voltage 1 REFOUT 5 reference for AC coupling OGND2 21 output ground 2 AGND 6 analog ground VCCO2 22 output supply voltage 2 VCCA 7 analog supply voltage D4 23 data output bit 4 24 data output bit 5 STDBY 8 standby mode input; (active HIGH) D5 DGND 9 digital ground D6 25 data output bit 6 VCCD 10 digital supply voltage D7 26 data output bit 7 (MSB) 27 not connected not connected n.c. 13 not connected n.c 29 not connected n.c. 14 not connected n.c 30 not connected D0 15 data output bit 0 (LSB) DEC 31 decoupling D1 16 data output bit 1 SDN 32 stabilized decoupling node handbook, full pagewidth 25 D6 28 26 D7 n.c 27 n.c. track enable input; (active LOW) 28 n.c. 12 29 n.c. TEN 30 n.c. clock input 31 DEC 11 32 SDN CLK n.c n.c. 1 24 D5 REFIN 2 23 D4 INN 3 22 VCCO2 INP 4 21 OGND2 TDA8793 18 D2 STDBY 8 17 D3 DGND Fig.2 Pin configuration. 1998 May 14 4 D1 16 7 D0 15 VCCA n.c. 14 19 OGND1 n.c. 13 6 TEN 12 AGND CLK 11 20 VCCO1 VCCD 10 5 9 REFOUT MGR017 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCCA analog supply voltage -0.3 +7.0 V VCCD digital supply voltage -0.3 +7.0 V VCCO output stages supply voltage -0.3 +7.0 V VCC supply voltage differences between: VCCA and VCCD -1.0 +1.0 V VCCO and VCCD -1.0 +1.0 V VCCA and VCCO -1.0 +1.0 V VINP, INN input voltage range -0.3 +7.0 V IO output current - 10 mA Tstg storage temperature -55 +150 C Tamb operating ambient temperature 0 70 C Tj junction temperature - - C referenced to AGND HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth j-a 1998 May 14 PARAMETER CONDITIONS thermal resistance from junction to ambient in free air 5 VALUE UNIT 94 C/W Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 CHARACTERISTICS VCCA = V7 to V6 = 2.7 to 3.6 V; VCCD = V10 to V9 = 2.7 to 3.6 V; VCCO = V20 (or V22) to V19 (or V21) = 2.7 to 3.6 V; AGND to DGND and OGND shorted together; VCCA to VCCD = -0.15 to +0.15 V; VCCD to VCCO = -0.15 to +0.15 V; VCCA to VCCO = -0.15 to +0.15 V; Tamb = 0 to 70 C; typical values measured at VCCA = VCCD = VCCO = 3.0 V and Tamb = 25 C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VCCA analog supply voltage 2.7 3.0 3.6 V VCCD digital supply voltage 2.7 3.0 3.6 V VCCO output stages supply voltage 2.7 3.0 3.6 V ICCA analog supply current - 40 - mA ICCD digital supply current - 16 - mA ICCO output stages supply current fi = ramp input - 0.1 - mA fi = 50 MHz - tbf - mA - 1.25 - V 2.7 < VCCA < 3.6 V - 2 - mV Internal reference (SDN pin); note 1 Vref reference voltage Vreg line regulation voltage TC temperature coefficient - tbf - ppm/K IL load current -500 - - A - 1.85 - V Internal reference (pin REFOUT) Vo(ref) reference voltage Vo(reg) line regulation voltage - 3 - mV TC temperature coefficient - tbf - ppm/K IL load current -500 - - A 2.7 < VCCA < 3.6 V Clock input (pin CLK); note 2 VIL LOW-level input voltage 0 - 0.8 V VIH HIGH-level input voltage 2 - VCCD V IIL LOW-level input current VCLK = 0 -2 - +2 A IIH HIGH-level input current VCLK = VCCD - - 5 A tr clock rise time 0.75 - tbf ns tf clock fall time 0.75 - tbf ns Zi input impedance fCLK = 100 MHz - tbf - k Ci input capacitance fCLK = 100 MHz - 2 - pf Standby input (pin STDBY); see Table 1 VIL LOW-level input voltage 0 - 0.8 V VIH HIGH-level input voltage 2 - VCCD V IIL LOW-level input current VCLK = 0 -5 - - A IIH HIGH-level input current VCLK = VCCD - - 5 A 1998 May 14 6 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter SYMBOL TDA8793 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Track enable input (pin TEN); see Table 2 VIL LOW-level input voltage 0 - 0.8 V VIH HIGH-level input voltage 2 - VCCD V IIL LOW-level input current VCLK = 0 -5 - - A IIH HIGH-level input current VCLK = VCCD - - 5 A Pins INP and INN (analog input voltage referenced to AGND); VREFIN = 1.25 V; see Table 3 Vi = VINP - VINN; Tamb = 25 C Vi(p-p) input voltage range (peak-to-peak value) TCI input voltage range drift Vi(os) input offset voltage output code = 127 tbf tbf tbf mV Zi input impedance fCLK = 50 MHz - tbf - k Ci input capacitance fCLK = 50 MHz - 2 - pf IIL LOW-level input current VINP = VREFOUT - 0.5; VINP = VREFOUT + 0.5 -1 - - A IIH HIGH-level input current VINP = VREFOUT - 0.5; VINP = VREFOUT + 0.5 - - 40 A 0.95 1 1.05 V - tbf - ppm/K Voltage controlled regulator input pin VREFIN (referenced to AGND); see note 3 Vi(ref) reference voltage tbf 1.25 tbf V Ii(ref) input current on pin VREFIN - tbf - A Outputs; ADC data outputs VOL LOW-level output voltage IO = 1 mA - - 0.5 V VOH HIGH-level output voltage IO = -0.4 mA VCC - 0.5 - VCCD V CL output load capacitance - - 10 pF v/t slew rate 10 to 90%; CL = 10 pF - tbf - V/ns track = LOW - - tbf MHz track = HIGH - - tbf kHz Switching characteristics; see note 2 and Table 1 fCLK(min) minimum clock frequency fCLK(max) maximum clock frequency 100 - - MHz tW(CLKH) clock pulse width HIGH 4 - - ns tW(CLKL) clock pulse width LOW 4 - - ns 1998 May 14 7 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter SYMBOL TDA8793 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Analog signal processing; see note 3 INL integral non-linearity ramp input; fCLK = 100 MHz; VCCA = VCCD = 3 V - 1 tbf LSB DNL differential non-linearity ramp input; fCLK = 100 MHz; VCCA = VCCD = 3 V - 0.75 tbf LSB S/N signal-to-noise ratio (full scale) without harmonics; fi = 50 MHz; fCLK = 100 MHz - 44.5 - dB BA(-3dB) -3 dB analog bandwidth - 150 - MHz THD total harmonics distortion fi = 50 MHz; single mode - -55 - dB fi = 50 MHz; differential mode - -55 - dB Hfund(FS) full scale fundamental harmonics fi = 50 MHz; fCLK = 100 MHz - - 0 dB HD2(FS) full scale second harmonic distortion all components fi = 50 MHz; fCLK = 100 MHz - tbf - dB HD3(FS) full scale third harmonic distortion all components fi = 50 MHz; fCLK = 100 MHz; single mode - tbf - dB fi = 50 MHz; fCLK = 100 MHz; differential mode - tbf - dB fCLK = 100 MHz; note 4 - - - fi = 20 MHz; note 4 - 7.2 - bits fi = 50 MHz; note 4 - 7.0 - bits EB effective bits Data timing; fCLK = 100 MHz; CL = 10 pF; (see Fig.7) tds sampling delay - - 1.5 ns th output hold time 3 - - ns td output delay time - 5 tbf ns Notes 1. It is possible to use the reference output voltage (pin SDN) to drive other analog circuits under the limits indicated in Chapter "Characteristics". 2. In addition to a good layout of the digital and analog grounds, it is recommended that the rise and fall times of the clock must be not less than 0.75 ns. 3. It is possible with an external reference connected to REFIN pin to adjust the ADC input range. The input range variation will be fixed. 4. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 k acquisition points per equivalent fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = 6.02 x EB + 1.76 dB. 1998 May 14 8 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter Table 1 Table 2 Table 3 TDA8793 Standby selection STDBY S0 TO D7 ICCA + ICCD 0 inactive 56 mA 1 active; output logic state LOW 1.5 mA Track-and-hold selection TEN TRACK-AND-HOLD 0 active 1 inactive; tracking mode Output coding and input voltage (typical values; referenced to AGND); VREFIN = 1.25 V BINARY OUTPUT BITS STEP VINP (V) VINN (V) Underflow <1.6 >2.1 0 0 0 0 0 0 0 0 0 1.6 2.1 0 0 0 0 0 0 0 0 1 ... ... 0 0 0 0 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0 ... ... ... ... ... ... ... ... ... ... ... 127 1.85 1.85 ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... 254 ... ... 1 1 1 1 1 1 1 0 255 2.1 1.6 1 1 1 1 1 1 1 1 Overflow >2.1 <1.6 1 1 1 1 1 1 1 1 1998 May 14 9 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 APPLICATION INFORMATION handbook, full pagewidth 100 nF SND 100 nF REFIN 10 nF INN 220 nF INP input 50 32 DEC 31 2 3 4 TDA8793 50 REFOUT 5 100 nF MGR019 Fig.3 Application diagram for single input mode with internal reference. handbook, full pagewidth EXTERNAL REFERENCE 1.25 V 100 nF DEC 100 nF 10 nF 220 nF REFIN INN INP input 50 31 2 3 4 TDA8793 50 REFOUT 5 100 nF MGR020 Fig.4 Application diagram for single input mode with external reference. 1998 May 14 10 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 handbook, full pagewidth 100 nF SND 100 nF REFIN 220 nF input 2 INN 50 DEC 32 31 2 3 TDA8793 220 nF input 1 50 INP REFOUT 4 5 100 nF MGR021 Fig.5 Application diagram for differential input mode with internal reference. handbook, full pagewidth 100 nF SND 100 nF 220 nF input REFIN INN 1:1 32 DEC 31 2 3 100 nF 100 100 INP REFOUT TDA8793 4 5 100 nF MGR022 Fig.6 Application diagram for differential input mode using transformer. 1998 May 14 11 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 tCPL handbook, full pagewidth tCPH HIGH 50 % CLK LOW sample N sample N + 1 sample N + 2 Vl th tds HIGH DATA D0 to D7 DATA N-2 DATA N-1 DATA N DATA N+1 50 % LOW td MGR018 Fig.7 Timing diagram. 1998 May 14 12 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 PACKAGE OUTLINE SOT401-1 LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm c y X A 17 24 ZE 16 25 e A A2 E HE (A 3) A1 w M pin 1 index bp 32 Lp 9 L 1 8 detail X ZD e v M A w M bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 1.60 0.15 0.05 1.5 1.3 0.25 0.27 0.17 0.18 0.12 5.1 4.9 5.1 4.9 0.5 7.15 6.85 7.15 6.85 1.0 0.75 0.45 0.2 0.12 0.1 Z D (1) Z E (1) 0.95 0.55 7 0o 0.95 0.55 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-12-19 97-08-04 SOT401-1 1998 May 14 EUROPEAN PROJECTION 13 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 If wave soldering cannot be avoided, for LQFP packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: SOLDERING Introduction * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. * The footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. Reflow soldering Reflow soldering techniques are suitable for all LQFP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. Wave soldering Wave soldering is not recommended for LQFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. CAUTION Wave soldering is NOT applicable for all LQFP packages with a pitch (e) equal or less than 0.5 mm. 1998 May 14 14 Philips Semiconductors Objective specification 8-bit, low-power, 3 V, 100 Msps, analog-to-digital converter TDA8793 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 May 14 15 Philips Semiconductors - a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com (c) Philips Electronics N.V. 1998 SCA60 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545104/1200/01/pp16 Date of release: 1998 May 14 Document order number: 9397 750 03675