DEMO MANUAL DC1751A LTM9011-14, LTM9010-14, LTM9009-14, LTM9008-14, LTM9007-14, LTM9006-14: 14-Bit, 125/105/80/65/40/25Msps Octal ADC Family Description DC1751 supports the LTM(R)9011 high speed, octal ADC family. frequencies from DC to 70MHz. Refer to the data sheet for proper input networks for different input frequencies. The versions of the 1751A demo board are listed in Table 1. Depending on the required resolution and sample rate, the DC1751 is supplied with the appropriate ADC. The circuitry on the analog inputs is optimized for analog input Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Table 1. DC1751 Variants DC1751 Variants ADC Part Number Resolution Maximum Sample Rate Input Frequency 1751A-A LTM9011-14 14-Bit 125Msps DC-70MHz 1751A-B LTM9010-14 14-Bit 105Msps DC-70MHz 1751A-C LTM9009-14 14-Bit 80Msps DC-70MHz 1751A-D LTM9008-14 14-Bit 65Msps DC-70MHz 1751A-E LTM9007-14 14-Bit 40Msps DC-70MHz 1751A-F LTM9006-14 14-Bit 25Msps DC-70MHz Performance Summary (TA = 25C) PARAMETER CONDITION VALUE Supply Voltage - DC1751A Depending on Sampling Rate and the A/D Converter Provided, This Supply Must Provide Up to 700mA Optimized for 3.5V [3.0V to 6V Minimum/Maximum] Analog Input Range Depending on SENSE Pin Voltage 1VP-P to 2VP-P Logic Input Voltages Minimum Logic High 1.3V Maximum Logic Low 0.6V Logic Output Voltages (Differential) Nominal Logic Levels (100 Load, 3.5mA Mode) 350mV/1.25V Common Mode Minimum Logic Levels (100 Load, 3.5mA Mode) 247mV/1.25V Common Mode Encode Clock Level Single-Ended Encode Mode (ENC- Tied to GND) 0V to 3.6V Encode Clock Level Differential Encode Mode (ENC- Not Tied to GND) 0.2V to 3.6V Sampling Frequency (Convert Clock Frequency) See Table 1 Resolution See Table 1 Input Frequency Range See Table 1 SFDR See Applicable Data Sheet SNR See Applicable Data Sheet dc1751afc 1 DEMO MANUAL DC1751A Quick Start Procedure DC1751 is easy to set up to evaluate the performance of the LTM9011 A/D converters. For proper measurement equipment setup, refer to Figure 1 and follow the procedure explained in the following sections. Figure 2 shows the pinout of the analog input header. 3.0-6V PROGRAMMING OPTIONS (SERIAL PROGRAMMING DEFAULT) TO PROVIDED POWER SUPPLY TO PROVIDED USB CABLE ANALOG INPUT HEADER DC1751A F01 SINGLE-ENDED ENCODE CLOCK (USE A LOW JITTER SIGNAL GENERATOR WITH PROPER FILTERING) Figure 1. Test Setup of DC1751 2 dc1751afc DEMO MANUAL DC1751A quick start procedure J3 HDR-2X50-2MM-THTH 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 GND IN1+ IN1- IN2+ IN2- GND IN3+ IN3- IN4+ IN4- GND IN5+ IN5- IN6+ IN6- GND IN7+ IN7- IN8+ IN8- GND R98 100 R99 100 R100 100 R101 100 VCM14 VCM23 VCM67 VCM58 DC1751A F02 Figure 2. Pinout for Analog Input Header (J3) dc1751afc 3 DEMO MANUAL DC1751A quick start procedure Setup If a DC1371 data acquisition and collection system was supplied with the DC1751, follow the DC1371 Quick Start Guide to install the required software and to connect the DC1371 to the DC1751 and to a PC. The DC1751 demonstration circuit requires up to 700mA depending on the sampling rate and the A/D converter supplied. The DC1751 should not be removed or connected to the DC1371 while power is applied. DC1751 Board Jumpers Analog Input Network The DC1751 board should have the following jumper settings as default positions (as per Figure 1): For optimal distortion and noise performance, the RC network on the analog inputs may need to be optimized for different analog input frequencies. For input frequencies above 70MHz, refer to the LTM9011 data sheet for a proper input network. JP4: PAR/SER: Selects Parallel or Serial Programming Mode. (Default: Serial) Optional Jumpers JP3 and JP6: Term: Enables/Disable Optional Output Termination. (Default: Removed) JP5: ILVDS: Selects Either 1.75mA or 3.5mA of Output Current for the LVDS Drivers. (Default: Removed) JP1 and JP2: Lane: Selects Either 1-Lane or 2-Lane Output Modes (Default: Removed) Note: The DC1371 does not support 1-Lane operation. In almost all cases, filters will be required on both analog input and encode clock to provide data sheet SNR. The filters should be located close to the inputs to avoid reflections from impedance discontinuities at the driven end of a long transmission line. Most filters do not present 50 outside the passband. In some cases, 3dB to 10dB pads may be required to obtain low distortion. Applying Power and Signals to the DC1751 If your generator cannot deliver full-scale signals without distortion, you may benefit from a medium power amplifier based on a gallium arsenide gain block prior to the final filter. This is particularly true at higher frequencies where IC based operational amplifiers may be unable to deliver the combination of low noise figure and high IP3 point required. A high order filter can be used prior to this final amplifier, and a relatively lower Q filter used between the amplifier and the demonstration circuit. The DC1371 is used to acquire data from the DC1751. The DC1371 must first be connected to a powered USB port and have 5V applied power before applying 3.5V across the pins marked V+ and GND on the DC1751. DC1751 requires 3.5V for proper operation. Apply the analog input signals of interest to the header on the DC1751 board marked "JP7." There is access to the eight analog inputs, as well as the four common mode voltages. For a pinout of this header, see Figure 2 or the Schematic Diagrams. JP9: SHDN: Enables and Disables the LTM9011. (Default: Removed) JP8: WP: Enable/Disables Write Protect for the EEPROM. (Default: Removed) Note: Optional jumper should be left open to ensure proper serial configuration. 4 dc1751afc DEMO MANUAL DC1751A quick start procedure Encode Clock Digital Outputs Note: Apply an encode clock to the SMA connector on the DC1751 demonstration circuit board marked "J2 CLK+." As a default, the DC1751 is populated to have a single-ended input. Data outputs, data clock, and frame clock signals are available on J3 of the DC1751. This connector follows the VITA-57/FMC standard, but all signals should be verified when using an FMC carrier card other than the DC1371. For the best noise performance, the ENCODE input must be driven with a very low jitter, square wave source. The amplitude should be large, up to 3VP-P or 13dBm. When using a sinusoidal signal generator, a squaring circuit can be used. Linear Technology also provides demo board DC1075A that divides a high frequency sine wave by four, producing a low jitter square wave for best results with the LTM9011. Software Using bandpass filters on the clock and the analog input will improve the noise performance by reducing the wideband noise power of the signals. In the case of the DC1751 a bandpass filter used for the clock should be used prior to the DC1075A. Data sheet FFT plots are taken with 10 pole LC filters made by TTE (Los Angeles, CA) to suppress signal generator harmonics, non harmonically related spurs and broadband noise. Low phase noise Agilent 8644B generators are used for both the clock input and the analog input. The DC1371 is controlled by the PScope system software that can be downloaded from the Linear Technology website at http://www.linear.com/software/. To start the data collection software, "PScope.exe," which is installed by default to \Program Files\LTC\PScope\, double click the PScope icon or bring up the run window under the start menu, and browse to the PScope directory and select "PScope." If the DC1751 is properly connected to the DC1371, PScope should automatically detect the DC1751 and configure itself accordingly. If everything is hooked up properly and a powered and suitable convert clock is present, clicking the "Collect" button should result in time and frequency plots displayed in the PScope window. Additional information and help for PScope is available in the DC1371 Quick Start Guide, and in the online help feature within the PScope program itself. dc1751afc 5 DEMO MANUAL DC1751A quick start procedure Serial Programming PScope has the ability to program the DC1751 serially through the DC1371. There are several options available in the LTM9011 family that are only available through serially programming. PScope allows all of these features to be tested. These options are available by first clicking on the "Set Demo Bd Options" icon on the PScope toolbar (Figure 3). This will bring up the menu shown in Figure 4. This menu allows any of the options available for the LTM9011 family to be programmed serially. The LTM9011 family has the following options: Randomizer: Enables Data Output Randomizer. * Off (Default): Disables data output randomizer. * On: Enables data output randomizer. Two's Complement: Enables Two's Complement Mode. * Off (Default): Selects offset binary mode. * On: Selects two's complement mode. Sleep Mode: Selects Between Normal Operation and Sleep Mode. Figure 3. PScope Toolbar * Off (Default): Entire ADC is powered and active. * On: The entire ADC is powered down. Channels 1 and 2 Nap: Selects Between Normal Operation and Putting Channels 1 and 2 in Nap Mode. * Off (Default): Channels 1 and 2 is active. * On: Channels 1 and 2 is in nap mode. Channels 3 and 4 Nap: Selects Between Normal Operation and Putting Channels 3 and 4 in Nap Mode. * Off (Default): Channels 3 and 4 is active. * On: Channels 3 and 4 is in nap mode. Channels 5 and 6 Nap: Selects Between Normal Operation and Putting Channels 5 and 6 in Nap Mode. * Off (Default): Channels 5 and 6 is active. * On: Channels 5 and 6 is in nap mode. Channels 7 and 8 Nap: Selects Between Normal Operation and Putting Channels 7 and 8 in Nap Mode. * Off (Default): Channels 7 and 8 is active. * On: Channels 7 and 8 is in nap mode. Figure 4. Demo Board Configuration Options 6 dc1751afc DEMO MANUAL DC1751A quick start procedure Output Current: Selects the LVDS Output Drive Current. Outputs: Enables Digital Outputs. * 1.75mA: LVDS output driver current. * Enabled (Default): Enables digital outputs. * 2.1mA: LVDS output driver current. * Disabled: Disables digital outputs. * 2.5mA: LVDS output driver current. Test Pattern: Selects Digital Output Test Patterns. The desired test pattern can be entered into the text boxes provided. * 3.0mA: LVDS output driver current. * 3.5mA (Default): LVDS output driver current. * 4.0mA: LVDS output driver current. * 4.5mA: LVDS output driver current. Internal Termination: Enables LVDS Internal Termination. * Off (Default): Disables internal termination. * Off (Default): ADC input data is displayed. * On: Test pattern is displayed. Once the desired settings are selected, click "OK" and PScope will automatically update the register of the device on the DC1751 demo board. * On: Enables internal termination. dc1751afc 7 DEMO MANUAL DC1751A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manFacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright (c) 2004, Linear Technology Corporation 8 dc1751afc Linear Technology Corporation LT 0117 REV C * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 2011