LTC3526L-2/LTC3526LB-2
1
3526lb2fa
Typical applicaTion
DescripTion
FeaTures
applicaTions
550mA 2MHz Synchronous
Step-Up DC/DC Converters
in 2mm × 2mm DFN
The LTC
®
3526L-2/LTC3526LB-2 are synchronous, fixed
frequency step-up DC/DC converters with output discon-
nect. Synchronous rectification enables high efficiency in
the low profile 2mm × 2mm DFN package. Battery life in
single AA/AAA powered products is extended further with
a 680mV start-up voltage and operation down to 500mV
once started.
A switching frequency of 2MHz minimizes solution foot-
print by allowing the use of tiny, low profile inductors
and ceramic capacitors. The current mode PWM design
is internally compensated, reducing external parts count.
The LTC3526L-2 features Burst Mode operation at light
load conditions allowing it to maintain high efficiency over
a wide range of load. The LTC3526LB-2 features fixed
frequency operation for low noise applications. Anti-ring
circuitry reduces EMI by damping the inductor in discon-
tinuous mode. Additional features include a low shutdown
current of under 1µA and thermal shutdown.
The LTC3526L-2/LTC3526LB-2 are housed in a 2mm ×
2mm × 0.75mm DFN package.
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Patents pending.
n Medical Instruments
n Noise Canceling Headphones
n Wireless Mice
n Bluetooth Headsets
n Delivers 3.3V at 100mA from a Single Alkaline/
NiMH Cell or 3.3V at 200mA from Two Cells
n VIN Start-Up Voltage: 680mV
n 1.5V to 5.25V VOUT Range
n Up to 94% Efficiency
n Output Disconnect
n 2MHz Fixed Frequency Operation
n VIN > VOUT Operation
n Integrated Soft-Start
n Current Mode Control with Internal Compensation
n Burst Mode
®
Operation with 9µA IQ (LTC3526L-2)
n Low Noise PWM Operation (LTC3526LB-2)
n Internal Synchronous Rectifier
n Logic Controlled Shutdown (IQ < 1µA)
n Anti-Ring Control
n Low Profile (2mm × 2mm × 0.75mm) 6-Lead
DFN Package
SW
VIN
1.78M
1M
3526lb2 TA01a
LTC3526L-2
SHDN
VOUT
FB
VIN
1.6V TO 3.2V
VOUT
3.3V
200mA
OFF ON
2.2µH
4.7µF
4.7µF
33pF
GND
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
POWER LOSS (mW)
50
60
70
80
0.1 1 10 100 1000
3526lb2 TA01b
30
20
10
0
90
100
1
10
100
0.1
0.01
1000
EFFICIENCY
POWER LOSS
VIN = 2.4V
Efficiency and Power Loss vs Load Current
LTC3526L-2/LTC3526LB-2
2
3526lb2fa
elecTrical characTerisTics
The l denotes the specifications which apply over the specified operating
temperature range of –40°C to 85°C, otherwise specifications are at TA = 25°C. VIN = 1.2V, VOUT = 3.3V unless otherwise noted.
pin conFiguraTionabsoluTe MaxiMuM raTings
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3526LEDC-2#PBF LTC3526LEDC-2#TRPBF LFFC 6-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C
LTC3526LBEDC-2#PBF LTC3526LBEDC-2#TRPBF LFFD 6-Lead (2mm × 2mm) Plastic DFN –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
VIN Voltage ................................................... –0.3V to 6V
SW Voltage
DC ............................................................ –0.3V to 6V
Pulsed <100ns ......................................... –0.3V to 7V
SHDN, FB Voltage ........................................ –0.3V to 6V
VOUT ............................................................. –0.3V to 6V
Operating Temperature Range
(Notes 2, 5) ..............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
(Note 1)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Start-Up Input Voltage ILOAD = 1mA 0.68 0.8 V
Input Voltage Range After Start-Up. (Minimum Voltage is Load Dependent) l0.5 5 V
Output Voltage Adjust Range l1.5 5.25 V
Feedback Pin Voltage l1.165 1.195 1.225 V
Feedback Pin Input Current VFB = 1.30V 1 50 nA
Quiescent Current—Shutdown VSHDN = 0V, Not Including Switch Leakage, VOUT = 0V 0.01 1 µA
Quiescent Current—Active Measured on VOUT
, Nonswitching 250 500 µA
Quiescent Current—Burst Measured on VOUT
, FB > 1.230V (LTC3526L-2 Only) 9 18 µA
N-Channel MOSFET Switch Leakage Current VSW = 5V 0.1 5 µA
P-Channel MOSFET Switch Leakage Current VSW = 5V, VOUT = 0V 0.1 10 µA
N-Channel MOSFET Switch On Resistance VOUT = 3.3V 0.4 Ω
P-Channel MOSFET Switch On Resistance VOUT = 3.3V 0.6 Ω
N-Channel MOSFET Current Limit l550 750 mA
Current Limit Delay to Output (Note 3) 60 ns
Maximum Duty Cycle VFB = 1.15V, VOUT = 5V l87 90 %
Minimum Duty Cycle VFB = 1.3V l0 %
Switching Frequency l1.8 2 2.4 MHz
SHDN Pin Input High Voltage 0.8 V
SHDN Pin Input Low Voltage 0.3 V
TOP VIEW
VOUT
FB
SHDN
SW
GND
VIN
DC PACKAGE
6-LEAD (2mm s 2mm) PLASTIC DFN
7
1
2
3
6
5
4
TJMAX = 125°C, θJA = 102°C/W (NOTE 6)
EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PC BOARD
LTC3526L-2/LTC3526LB-2
3
3526lb2fa
Typical perForMance characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3526LE-2/LTC3526LBE-2 are guaranteed to meet
performance specifications from 0°C to 85°C. Specifications over –40°C to
85°C operating temperature range are assured by design, characterization
and correlation with statistical process controls.
Note 3: Specification is guaranteed by design and not 100% tested in
production.
Note 4: Current measurements are made when the output is not switching.
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
Note 6: Failure to solder the exposed backside of the package to the PC
board ground plane will result in a thermal resistance much higher than
102°C/W.
Efficiency vs Load Current and VIN
for VOUT = 1.8V (LTC3526L-2)
Efficiency vs Load Current and VIN
for VOUT = 3.3V (LTC3526L-2)
Efficiency vs Load Current and VIN
for VOUT = 5V (LTC3526L-2)
No-Load Input Current vs VIN
(LTC3526L-2)
Maximum Output Current vs VIN
Minimum Load Resistance
During Start-Up vs VIN
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
POWER LOSS (mW)
50
60
70
80
0.1 1 10 100 1000
3526lb2 G01
30
20
10
0
90
100
1
10
100
0.1
0.01
1000
VIN = 0.9V
VIN = 1.2V
VIN = 1.5V
PLOSS AT VIN = 0.9V
PLOSS AT VIN = 1.2V
PLOSS AT VIN = 1.5V
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
POWER LOSS (mW)
50
60
70
80
0.1 1 10 100 1000
3526lb2 G02
30
20
10
0
90
100
1
10
100
0.1
0.01
1000
VIN = 1.2V
VIN = 1.8V
VIN = 2.4V
VIN = 3.0V
PLOSS AT VIN = 1.2V
PLOSS AT VIN = 1.8V
PLOSS AT VIN = 2.4V
PLOSS AT VIN = 3.0V
VIN (V)
0.5
IIN (µA)
60
70
80
4.5
3526lb2 G03
50
40
10
1.5 2.5 3.5
1.0 2.0 3.0 4.0
30
20
100
90
VOUT = 3.3V
VOUT = 5V
VOUT = 2.5V
VOUT = 1.8V
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
POWER LOSS (mW)
50
60
70
80
0.1 1 10 100 1000
3526lb2 G04
30
20
10
0
90
100
1
10
100
0.1
1000
VIN = 1.2V
VIN = 2.4V
VIN = 3.6V
VIN = 4.2V
PLOSS AT VIN = 1.2V
PLOSS AT VIN = 2.4V
PLOSS AT VIN = 3.6V
PLOSS AT VIN = 4.2V
VIN (V)
0.5
IOUT (mA)
200
300
4.5
3526lb2 G05
100
01.5 2.5 3.5
1.0 2.0 3.0 4.0
400
150
250
50
350
VOUT = 3.3V
VOUT = 5V
VOUT = 2.5V
VOUT = 1.8V
L = 2.2µH
elecTrical characTerisTics
TA = 25°C, unless otherwise noted.
LTC3526L-2/LTC3526LB-2
4
3526lb2fa
–50 –30 –10 10 30 50 70 90
TEMPERATURE (°C)
NORMALIZED RDS(ON)
1.0
1.1
1.2
3526lb2 G12
0.8
0.7
1.3
0.9
NORMALIZED TO 25°C
Start-Up Delay Time vs VIN
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
Oscillator Frequency Change
vs VOUT
RDS(ON) vs VOUT
Oscillator Frequency Change
vs Temperature RDS(ON) Change vs Temperature
VIN (V)
1.0
0
DELAY (µs)
10
30
40
50
100
70
2.0 3.0 3.5
3526lb2 G07
20
80
90
60
1.5 2.5 4.0 4.5
VIN (V)
1.0
0
LOAD CURRENT (mA)
5
10
15
20
25
35
30
1.61.51.41.31.21.1
3526lb2 G08a
ENTER BURST
LEAVE BURST
VOUT = 1.8V
COUT = 10µF
L = 2.2µH
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
VIN (V)
LOAD CURRENT (mA)
15
20
25
3526lb2 G08b
10
5
0
30
35
40
ENTER BURST
LEAVE BURST
VOUT = 2.5V
COUT = 10µF
L = 2.2µH
1.0 2.22.01.6 1.81.41.2
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
Burst Mode Threshold Current
vs VIN (LTC3526L-2)
VIN (V)
1.0
0
LOAD CURRENT (mA)
20
60
50
1.6 2.0
3526lb2 G08c
10
40
30
2.6
1.4 2.4
1.2 2.2
1.8 2.8 3.0
ENTER BURST
LEAVE BURST
VOUT = 3.3V
COUT = 10µF
L = 2.2µH
VIN (V)
1.0
LOAD CURRENT (mA)
40
50
70
60
2.5 3.5
3526lb2 G08d
30
20
1.5 2.0 3.0 4.0 4.5
10
0
ENTER BURST
LEAVE BURST
VOUT = 5V
COUT = 10µF
L = 2.2µH
VOUT (V)
1.5
FREQUENCY CHANGE (%)
1
2
4
3
3.0 4.0
3526lb2 G09
0
–1
2.0 2.5 3.5 4.5 5.0
–2
–4
–3
NORMALIZED TO VOUT = 3.3V
VOUT (V)
1.5
RDS(ON) (Ω)
0.50
0.45
0.80
0.85
0.90
2.5 3.5 4.0
3526lb2 G10
0.35
0.70
0.60
0.40
0.75
0.30
0.65
0.55
2.0 3.0 4.5 5.0
PMOS
NMOS
–50 –30 –10 10 30 50 70 90
TEMPERATURE (°C)
FREQUECNY CHANGE (%)
4
6
8
3526lb2 G11
0
–10
–8
–6
10
2
–2
–4
NORMALIZED TO 25°C
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
LTC3526L-2/LTC3526LB-2
5
3526lb2fa
TEMPERATURE (°C)
–50
0.50
VIN (V)
0.55
0.60
0.65
0.70
0.80
25 0 25 50
3526lb2 G14
75 100
0.75
1mA LOAD
NO LOAD
VFB vs Temperature Start-Up Voltage vs Temperature
Load Regulation
Load Regulation
Load Regulation
Burst Mode Quiesent Current
vs VOUT (LTC3526L-2)
TEMPERATURE (°C)
–60
–1.00
CHANGE IN VFB (%)
–0.75
–0.50
–0.25
0
–20 20 60 100
3526lb2 G13
0.25
0.50
–40 0 40 80
NORMALIZED TO 25°C
VOUT (V)
1.5
10.0
9.5
9.0
8.5
8.0
7.5
7.0 3.0 4.0 4.5
3526lb2 G15
2.0 2.5 3.5 5.0
IQ (µA)
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
Fixed Frequency Switching
Waveform and VOUT Ripple
Burst Mode Waveforms
(LTC3526L-2) VOUT and IIN During Soft-Start
SW PIN
2V/DIV
200ns/DIVVIN = 1.2V
VOUT = 3.3V AT 100mA
COUT = 4.7µF
3526lb2 G16
VOUT
20mV/DIV
AC-COUPLED
SW PIN
2V/DIV
20µs/DIVVIN = 1.2V
VOUT = 3.3V AT 5mA
COUT = 10µF
3526lb2 G17
VOUT
20mV/DIV
AC-COUPLED
SHDN PIN
1V/DIV
INPUT
CURRENT
0.2A/DIV
200µs/DIVVOUT = 3.3V
COUT = 4.7µF
3526lb2 G18
VOUT
1V/DIV
LOAD (mA)
0.01
CHANGE IN VOUT (%)
0.1 1 10 100 1000
3526lb2 G23
–0.5
–0.4
–0.3
–0.2
–0.1
0.5
0.4
0.3
0.2
0.1
0
VIN = 0.9V
VIN = 1.2V
VIN = 1.5V
VOUT = 1.8V
LOAD (mA)
0.01
CHANGE IN VOUT (%)
0.1 1 10 100 1000
3526lb2 G24
–0.5
–0.4
–0.3
–0.2
–0.1
0.5
0.4
0.3
0.2
0.1
0
VIN = 1.2V
VIN = 1.8V
VIN = 2.4V
VOUT = 3.3V
LOAD (mA)
0.01
CHANGE IN VOUT (%)
0.1 1 10 100 1000
3526lb2 G25
–0.5
–0.4
–0.3
–0.2
–0.1
0.5
0.4
0.3
0.2
0.1
0
VIN = 1.2V
VIN = 2.4V
VIN = 3.6V
VIN = 4.2V
VOUT = 5V
LTC3526L-2/LTC3526LB-2
6
3526lb2fa
pin FuncTions
SW (Pin 1): Switch Pin. Connect inductor between SW and
VIN. Keep PCB trace lengths as short and wide as possible
to reduce EMI. If the inductor current falls to zero or SHDN
is low, an internal anti-ringing switch is connected from
SW to VIN to minimize EMI.
GND (Pin 2, Exposed Pad Pin 7): Signal and Power Ground.
Provide a short direct PCB path between GND and the
(–) side of the input and output capacitors. The Exposed
Pad must be soldered to the PCB ground plane. It serves
as an additional ground connection and as a means of
conducting heat away from the package.
VIN (Pin 3): Input Supply Pin. Connect a minimum of 1µF
ceramic decoupling capacitor from this pin to ground
using short direct PCB traces.
SHDN (Pin 4): Logic Controlled Shutdown Input. There
is an internal 4MΩ pull-down on this pin.
• SHDN = High: Normal operation
• SHDN = Low: Shutdown, quiescent current < 1µA
FB (Pin 5): Feedback Input to the gm Error Amplifier. Con-
nect resistor divider tap to this pin. The top of the divider
connects to the output capacitor, the bottom of the divider
connects to GND. Referring to the Block Diagram, the output
voltage can be adjusted from 1.5V to 5.25V by:
V V R
R
OUT = +
1 195 1 2
1
. •
VOUT (Pin 6): Output voltage sense and drain of the internal
synchronous rectifier. PCB trace from VOUT to the output
filter capacitor (4.7µF minimum) should be as short and
wide as possible.
Load Step Response (from Burst
Mode Operation) (LTC3526L-2)
Load Step Response
(Fixed Frequency)
LOAD
CURRENT
50mA/DIV
100µs/DIVVIN = 1.2V
VOUT = 3.3V
50mA TO 100mA STEP
COUT = 4.7µF
3526lb2 G21
VOUT
100mV/DIV
AC-COUPLED
LOAD
CURRENT
50mA/DIV
50µs/DIVVIN = 1.2V
VOUT = 3.3V
5mA TO 100mA STEP
COUT = 10µF
3526lb2 G22
VOUT
100mV/DIV
AC-COUPLED
Typical perForMance characTerisTics
TA = 25°C, unless otherwise noted.
Load Step Response (from Burst
Mode Operation) (LTC3526L-2)
LOAD
CURRENT
50mA/DIV
100µs/DIVVIN = 3.6V
VOUT = 5V
20mA TO 170mA STEP
COUT = 10µF
3526lb2 G19
VOUT
100mV/DIV
AC-COUPLED
Load Step Response
(Fixed Frequency)
LOAD
CURRENT
50mA/DIV
100µs/DIVVIN = 3.6V
VOUT = 5V
50mA TO 150mA STEP
COUT = 4.7µF
3526lb2 G20
VOUT
100mV/DIV
AC-COUPLED
LTC3526L-2/LTC3526LB-2
7
3526lb2fa
block DiagraM
3
3
+
–
+
–
GATE DRIVERS
AND
ANTI-CROSS
CONDUCTION
LOGIC
CLK
IPK
IPK
COMP
SLOPE
COMP
IZERO
COMP
ERROR AMP
SLEEP COMP
IZERO
WAKE
EXPOSED
PAD
+
–
WELL
SWITCH
MODE
CONTROL
UVLO
VREF VREF
4M
SHDN
VBEST
START-UP
2MHz
OSC
TSD
THERMAL
SHUTDOWN
SHUTDOWN
ANTI-RING
VSEL
VIN
1
6
SW
VOUT
L1
2.2µH
VB
SHUTDOWN
CLAMP
CSS
VREF
VOUT
5
7
GND
3526lb2 BD
2
FB
R2
COUT
4.7µF
VOUT
1.5V
TO 5.25V
R1
4
CIN
2.2µF
VIN
0.8V
TO 5V
(Refer to Block Diagram)
operaTion
The LTC3526L-2/LTC3526LB-2 are 2MHz synchronous
boost converters housed in a 6-lead 2mm × 2mm DFN
package. With a guaranteed ability to start up and oper-
ate from inputs less than 0.8V, this device features fixed
frequency, current mode PWM control for exceptional line
and load regulation. The current mode architecture with
adaptive slope compensation provides excellent transient
load response, requiring minimal output filtering. Internal
soft-start and internal loop compensation simplifies the
design process while minimizing the number of external
components.
With its low RDS(ON) and low gate charge internal N-channel
MOSFET switch and P-channel MOSFET synchronous recti-
fier, the LTC3526L-2 achieves high efficiency over a wide
range of load currents. Burst Mode operation maintains
high efficiency at very light loads, reducing the quiescent
current to just 9µA. Operation can be best understood by
referring to the Block Diagram.
LOW VOLTAGE START-UP
The LTC3526L-2/LTC3526LB-2 include an independent
start-up oscillator designed to start up at an input voltage
of 0.68V (typical). Soft-start and inrush current limiting
are provided during start-up, as well as normal mode.
When either VIN or VOUT exceeds 1.3V typical, the IC
enters normal operating mode. When the output voltage
LTC3526L-2/LTC3526LB-2
8
3526lb2fa
exceeds the input by 0.24V, the IC powers itself from
VOUT instead of VIN. At this point the internal circuitry has
no dependency on the VIN input voltage, eliminating the
requirement for a large input capacitor. The input voltage
can drop as low as 0.5V. The limiting factor for the ap-
plication becomes the availability of the power source to
supply sufficient energy to the output at low voltages, and
maximum duty cycle, which is clamped at 90% typical.
Note that at low input voltages, small voltage drops due
to series resistance become critical, and greatly limit the
power delivery capability of the converter.
LOW NOISE FIXED FREQUENCY OPERATION
Soft-Start
The LTC3526L-2/LTC3526LB-2 contain internal circuitry
to provide soft-start operation. The soft-start circuitry
slowly ramps the peak inductor current from zero to its
peak value of 750mA (typical) in approximately 0.5ms,
allowing start-up into heavy loads. The soft-start circuitry
is reset in the event of a shutdown command or a thermal
shutdown.
Oscillator
An internal oscillator sets the switching frequency to
2MHz.
Shutdown
Shutdown is accomplished by pulling the SHDN pin
below 0.3V and enabled by pulling the SHDN pin above
0.8V. Although SHDN can be driven above VIN or VOUT
(up to the absolute maximum rating) without damage,
the LTC3526L-2/LTC3526LB-2 have a proprietary test
mode that may be engaged if SHDN is held in the range
of 0.5V to 1V higher than the greater of VIN or VOUT. If
the test mode is engaged, normal PWM switching action
is interrupted, which can cause undesirable operation
in some applications. Therefore, in applications where
SHDN may be driven above VIN, a resistor divider or other
means must be employed to keep the SHDN voltage below
(VIN + 0.4V) to prevent the possibility of the test mode
being engaged. Please refer to Figure 1 for two possible
implementations.
Error Amplifier
The positive input of the transconductance error amplifier
is internally connected to the 1.195V reference and the
negative input is connected to FB. Clamps limit the mini-
mum and maximum error amp output voltage for improved
large-signal transient response. Power converter control
loop compensation is provided internally. An external
resistive voltage divider from VOUT to ground programs
the output voltage via FB from 1.5V to 5.25V.
V V R
R
OUT = +
1 195 1 2
1
. •
Current Sensing
Lossless current sensing converts the peak current signal of
the N-channel MOSFET switch into a voltage that is summed
with the internal slope compensation. The summed signal
is compared to the error amplifier output to provide a peak
current control command for the PWM.
Current Limit
The current limit comparator shuts off the N-channel
MOSFET switch once its threshold is reached. The cur-
rent limit comparator delay to output is typically 60ns.
Peak switch current is limited to approximately 750mA,
independent of input or output voltage, unless VOUT falls
below 0.7V, in which case the current limit is cut in half.
(Refer to Block Diagram)
operaTion
ZETEX ZC2811E
3526lb2 F01
LTC3526L-2/LTC3526LB-2
SHDN
VIN
VCNTRL
4M
±30%
LTC3526L-2/LTC3526LB-2
SHDN
4M
±30%
1M
R
VCNTRL 1M
R > (VCNTRL/(VIN + 0.4) – 1)MΩ
Figure 1. Recommended Shutdown Circuits when Driving
SHDN above VIN
LTC3526L-2/LTC3526LB-2
9
3526lb2fa
Zero Current Comparator
The zero current comparator monitors the inductor cur-
rent to the output and shuts off the synchronous rectifier
when this current reduces to approximately 30mA. This
prevents the inductor current from reversing in polarity,
improving efficiency at light loads.
Synchronous Rectifier
To control inrush current and to prevent the inductor
current from running away when VOUT is close to VIN, the
P-channel MOSFET synchronous rectifier is only enabled
when VOUT > (VIN + 0.24V).
Anti-Ringing Control
The anti-ring circuit connects a resistor across the in-
ductor to prevent high frequency ringing on the SW pin
during discontinuous current mode operation. Although
the ringing of the resonant circuit formed by L and CSW
(capacitance on SW pin) is low energy, it can cause EMI
radiation.
Output Disconnect
The LTC3526L-2/LTC3526LB-2 are designed to allow true
output disconnect by eliminating body diode conduction
of the internal P-channel MOSFET rectifier. This allows for
VOUT to go to zero volts during shutdown, drawing no cur-
rent from the input source. It also allows for inrush current
limiting at turn-on, minimizing surge currents seen by the
input supply. Note that to obtain the advantages of output
disconnect, there must not be an external Schottky diode
connected between SW and VOUT
. The output disconnect
feature also allows VOUT to be pulled high, without any
reverse current into a battery connected to VIN.
Thermal Shutdown
If the die temperature exceeds 160°C, the LTC3526L-2/
LTC3526LB-2 will go into thermal shutdown. All switches
will be off and the soft-start capacitor will be discharged.
The device will be enabled again when the die temperature
drops by about 15°C.
Burst Mode OPERATION
The LTC3526L-2 will enter Burst Mode operation at light
load current and return to fixed frequency PWM mode
when the load increases. Refer to the Typical Performance
Characteristics to see the output load Burst Mode thresh-
old current vs VIN. The load current at which Burst Mode
operation is entered can be changed by adjusting the
inductor value. Raising the inductor value will lower the
load current at which Burst Mode operation is entered.
In Burst Mode operation, the LTC3526L-2 still switches at
a fixed frequency of 2MHz, using the same error amplifier
and loop compensation for peak current mode control.
This control method eliminates any output transient
when switching between modes. In Burst Mode opera-
tion, energy is delivered to the output until it reaches the
nominal regulation value, then the LTC3526L-2 transi-
tions to sleep mode where the outputs are off and the
LTC3526L-2 consumes only 9µA of quiescent current from
VOUT
. When the output voltage droops slightly, switching
resumes. This maximizes efficiency at very light loads by
minimizing switching and quiescent losses. Burst Mode
output voltage ripple, which is typically 1% peak-to-peak,
can be reduced by using more output capacitance (10µF
or greater), or with a small capacitor (10pF to 50pF) con-
nected between VOUT and FB.
As the load current increases, the LTC3526L-2 will au-
tomatically leave Burst Mode operation. Note that larger
output capacitor values may cause this transition to oc-
cur at lighter loads. Once the LTC3526L-2 has left Burst
Mode operation and returned to normal operation, it will
remain there until the output load is reduced below the
burst threshold current.
Burst Mode operation is inhibited during start-up and soft-
start and until VOUT is at least 0.24V greater than VIN.
The LTC3526LB-2 features continuous PWM operation at
2MHz. At very light loads, the LTC3526LB-2 will exhibit
pulse-skipping operation.
(Refer to Block Diagram)
operaTion
LTC3526L-2/LTC3526LB-2
10
3526lb2fa
VIN > VOUT OPERATION
The LTC3526L-2/LTC3526LB-2 will maintain voltage regu-
lation even when the input voltage is above the desired
output voltage. Note that the efficiency is much lower in this
mode, and the maximum output current capability will be
less. Refer to the Typical Performance Characteristics.
SHORT-CIRCUIT PROTECTION
The LTC3526L-2/LTC3526LB-2 output disconnect feature
allows output short circuit while maintaining a maximum
internally set current limit. To reduce power dissipation
under short-circuit conditions, the peak switch current
limit is reduced to 400mA (typical).
SCHOTTKY DIODE
Although not recommended, adding a Schottky diode from
SW to VOUT will improve efficiency by about 2%. Note
that this defeats the output disconnect and short-circuit
protection features.
PCB LAYOUT GUIDELINES
The high speed operation of the LTC3526L-2/LTC3526LB-2
demands careful attention to board layout. A careless
layout will result in reduced performance. Figure 2 shows
the recommended component placement. A large ground
pin copper area will help to lower the die temperature. A
multilayer board with a separate ground plane is ideal, but
not absolutely necessary.
COMPONENT SELECTION
Inductor Selection
The LTC3526L-2/LTC3526LB-2 can utilize small surface
mount chip inductors due to their fast 2MHz switching
frequency. Inductor values between 1.5µH and 4.7µH are
suitable for most applications. Larger values of inductance
will allow slightly greater output current capability (and
lower the Burst Mode threshold) by reducing the inductor
ripple current. Increasing the inductance above 6.8µH will
increase component size while providing little improvement
in output current capability.
The minimum inductance value is given by:
LV V V
Ripple V
IN MIN OUT MAX IN MIN
OU
>
( )
( ) ( ) ( )
• –
• •2 TT MAX( )
where:
Ripple = Allowable inductor current ripple (amps peak-
peak)
VIN(MIN) = Minimum input voltage
VOUT(MAX) = Maximum output voltage
The inductor current ripple is typically set for 20% to
40% of the maximum inductor current. High frequency
ferrite core inductor materials reduce frequency depen-
dent power losses compared to cheaper powdered iron
types, improving efficiency. The inductor should have
low ESR (series resistance of the windings) to reduce the
I2R power losses, and must be able to support the peak
Figure 2. Recommended Component Placement for Single Layer Board
+
SW
LTC3526L-2
1
GND
MINIMIZE
TRACE ON FB
AND SW
2
VIN
MULTIPLE VIAS
TO GROUND PLANE
VIN
VOUT
FB
SHDN
3526lb2 F02
3
6
5
4
applicaTions inForMaTion
LTC3526L-2/LTC3526LB-2
11
3526lb2fa
inductor current without saturating. Molded chokes and
some chip inductors usually do not have enough core
area to support the peak inductor current of 750mA seen
on the LTC3526L-2
/LTC3526LB-2
. To minimize radiated
noise, use a shielded inductor. See Table 1 for suggested
components and suppliers.
Table 1. Recommended Inductors
VENDOR PART/STYLE
Coilcraft
(847) 639-6400
www.coilcraft.com
LPO4815
LPS4012,
LPS3314
MSS4020
ME3220
Coiltronics
www.cooperet.com
SD10, SD12, SD3114, SD3118
FDK
(408) 432-8331
www.fdk.com
MIP3226D
MIPF2520D
MIPWT3226D
MIPSZ2012D
MIPS2520D
Murata
(714) 852-2001
www.murata.com
LQH3NP
LQH32P
LQM2MPN
Sumida
(847) 956-0666
www.sumida.com
CDRH2D14
CDRH2D11
CDRH3D11
Taiyo-Yuden
www.t-yuden.com
NR3010T
NR3015T
NR3012T
TDK
(847) 803-6100
www.component.tdk.com
VLP
VLF, VLCF
Toko
(408) 432-8282
www.tokoam.com
D412C
Würth
(201) 785-8800
www.we-online.com
WE-TPC type S, M, TH, XS
Output and Input Capacitor Selection
Low ESR (equivalent series resistance) capacitors should
be used to minimize the output voltage ripple. Multilayer
ceramic capacitors are an excellent choice as they have
extremely low ESR and are available in small footprints. A
4.7µF to 10µF output capacitor is sufficient for most ap-
plications. Larger values may be used to obtain extremely
low output voltage ripple and improve transient response.
X5R and X7R dielectric materials are preferred for their
ability to maintain capacitance over wide voltage and
temperature ranges. Y5V types should not be used.
The internal loop compensation of the LTC3526L-2/
LTC3526LB-2 are designed to be stable with output ca-
pacitor values of 4.7µF or greater (without the need for
any external series resistor). Although ceramic capacitors
are recommended, low ESR tantalum capacitors may be
used as well.
A small ceramic capacitor in parallel with a larger tantalum
capacitor may be used in demanding applications that have
large load transients. Another method of improving the
transient response is to add a small feed-forward capacitor
across the top resistor of the feedback divider (from VOUT
to FB). A typical value of 22pF will generally suffice.
Low ESR input capacitors reduce input switching noise
and reduce the peak current drawn from the battery. It
follows that ceramic capacitors are also a good choice
for input decoupling and should be located as close as
possible to the device. A 2.2µF input capacitor is sufficient
for most applications, although larger values may be
used without limitations. Table 2 shows a list of several
ceramic capacitor manufacturers. Consult the manufactur-
ers directly for detailed information on their selection of
ceramic capacitors.
Table 2. Capacitor Vendor Information
SUPPLIER PHONE WEBSITE
AVX (803) 448-9411 www.avxcorp.com
Murata (714) 852-2001 www.murata.com
Taiyo-Yuden (408) 573-4150 www.t-yuden.com
TDK (847) 803-6100 www.component.tdk.com
Samsung (408) 544-5200 www.sem.samsung.com
applicaTions inForMaTion
LTC3526L-2/LTC3526LB-2
12
3526lb2fa
1-Cell to 1.8V Converter with <1mm Maximum Height
Fixed Frequency 1-Cell to 2.85V Low Noise Converter
1-Cell to 3.3V
SW
VIN
511k
FDK MIPWT3226D2R2
MURATA GRM219R60J106KE19D
*
**
1M
2.2µH*
1µF
10µF**
68pF
3526lb2 TA02a
LTC3526L-2
SHDN
VOUT
FB
VIN
0.8V TO 1.6V
VOUT
1.8V
150mA
OFF ON
GND
SW
VIN
1.4M
1M
*SUMIDA CDRH2D11NP-2R2N
3526lb2 TA03a
LTC3526LB-2
SHDN
VOUT
FB
VIN
0.8V TO 1.6V
VOUT
2.85V
100mA
OFF ON
GND
2.2µH*
1µF
4.7µF
SW
VIN
1.78M
1M
*TAIYO-YUDEN NR3015T2R2M
33pF
3526lb2 TA04a
LTC3526L-2
SHDN
VOUT
FB
VIN
0.8V TO 1.6V
VOUT
3.3V
75mA
OFF ON
GND
2.2µH*
1µF
10µF
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
50
60
70
80
0.1 1 10 100 1000
3526lb2 TA02b
30
20
10
0
90
100
VIN = 1.5V
VIN = 1.2V
VIN = 0.9V
VOUT = 1.8V
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
50
60
70
80
0.1 1 10 100 1000
3526lb2 TA03b
30
20
10
0
90
100
VIN = 1.5V
VIN = 1.2V
VIN = 0.9V
VOUT = 2.85V
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
50
60
70
80
0.1 1 10 100 1000
3526lb2 TA04b
30
20
10
0
90
100
VIN = 1.5V
VIN = 1.2V
VIN = 0.9V
VOUT = 3.3V
Typical applicaTions
LTC3526L-2/LTC3526LB-2
13
3526lb2fa
2-Cell to 3.3V
SW
VIN
1.78M
1M
*COILCRAFT LPS3314-222ML
3526lb2 TA05a
LTC3526L-2
SHDN
VOUT
FB
VIN
1.6V TO 3.2V
VOUT
3.3V
200mA
OFF ON
GND
2.2µH*
1µF
4.7µF
33pF
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
50
60
70
80
0.1 1 10 100 1000
3526lb2 TA05b
30
20
10
0
90
100
VIN = 3.0V
VIN = 2.4V
VIN = 1.8V
VOUT = 3.3V
Typical applicaTions
2-Cell to 5V
SW
VIN
3.24M
1.02M
*COILCRAFT LPS4018-332ML
33pF
3526lb2 TA06a
LTC3526L-2
SHDN
VOUT
FB
VIN
1.6V TO 3.2V
VOUT
5V
150mA
OFF ON
GND
3.3µH*
1µF
10µF
Li-Ion to 5V
SW
VIN
3.24M
1.02M
*WURTH 744031003
22pF
3526lb2 TA08a
LTC3526L-2
SHDN
VOUT
FB
VIN
2.7V TO 4.3V
VOUT
5V
200mA
OFF ON
GND
3.6µH*
1µF
10µF
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
50
60
70
80
0.1 1 10 100 1000
3526lb2 TA06b
30
20
10
0
90
100
VIN = 3.0V
VIN = 2.4V
VIN = 1.8V
VOUT = 5V
LOAD CURRENT (mA)
0.01
40
EFFICIENCY (%)
50
60
70
80
0.1 1 10 100 1000
3526lb2 TA08b
30
20
10
0
90
100
VIN = 4.2V
VIN = 3.6V
VIN = 3.0V
VOUT = 5V
LTC3526L-2/LTC3526LB-2
14
3526lb2fa
2.00 p0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 p 0.10
BOTTOM VIEW—EXPOSED PAD
0.56 p 0.05
(2 SIDES)
0.75 p0.05
R = 0.125
TYP
R = 0.05
TYP
1.37 p0.05
(2 SIDES)
1
3
64
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DC6) DFN REV B 1309
0.25 p 0.05
0.50 BSC
0.25 p 0.05
1.42 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 p0.05
(2 SIDES)
1.15 p0.05
0.70 p0.05
2.55 p0.05
PACKAGE
OUTLINE
0.50 BSC
PIN 1 NOTCH
R = 0.20 OR
0.25 s 45o
CHAMFER
package DescripTion
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703 Rev B)
LTC3526L-2/LTC3526LB-2
15
3526lb2fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 9/10 Changed 60°C/W to 102°C/W in Note 6
Updated Pin 2 text in Pin Functions
Updated Shutdown section
Updated Related Parts
3
6
8
16
LTC3526L-2/LTC3526LB-2
16
3526lb2fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
LINEAR TECHNOLOGY CORPORATION 2009
LT 0910 REV A • PRINTED IN USA
3.3V Converter with Output OR’d with 5V USB Input
SW
VIN
1.78M
1M
MBR120ESFT
3526lb2 TA07a
LTC3526L-2
SHDN
VOUT
FB
VBATT
1.8V TO 3.2V
5V USB
VOUT
3.3V/5V
USB
OFF ON
GND
LDO
DC/DC
2.2µH*
1µF
10µF
*MURATA LQH3NPN2R2NM0
33pF
relaTeD parTs
PART NUMBER DESCRIPTION COMMENTS
LTC3526/LTC3526B
LTC3526-2/LTC3526B-2
LTC3526L/LTC3526LB
500mA, 1MHz/2.2MHz, Synchronous Step-Up DC/DC
Converters with Output Disconnect
94% Efficiency VIN: 0.85V to 5V, VOUT(MAX) = 5.25V, IQ = 9µA,
ISD < 1µA, 2mm × 2mm DFN-6 Package
LTC3525L-3 400mA Micropower Synchronous Step-Up DC/DC
Converter with Output Disconnect
93% Efficiency VIN: 0.88V to 4.5V, VOUT = 3V, IQ = 7µA,
ISD < 1µA, SC-70 Package
LTC3525-3
LTC3525-3.3
LTC3525-5
400mA Micropower Synchronous Step-Up DC/DC
Converter with Output Disconnect
95% Efficiency VIN: 1V to 4.5V, VOUT(MAX) = 3.3V or 5V, IQ = 7µA,
ISD < 1µA, SC-70 Package
LTC3427 500mA ISW, 1.2MHZ, Synchronous Step-Up DC/DC
Converter with Output Disconnect
93% Efficiency VIN: 1.8V to 4.5V, VOUT(MAX) = 5V,
2mm × 2mm DFN Package
LTC3400/LTC3400B 600mA ISW, 1.2MHz, Synchronous Step-Up
DC/DC Converters
92% Efficiency VIN: 1V to 5V, VOUT(MAX) = 5V, IQ = 19µA/300µA,
ISD < 1µA, ThinSOT™ Package
LTC3527/LTC3527-1 Dual 600mA/400mA ISW, 1.2MHz/2.2MHz Synchronous
Step-Up DC/DC Converters
94% Efficiency VIN: 0.7V to 5V, VOUT(MAX) = 5.25V, IQ = 12µA,
ISD < 1µA, 3mm × 3mm QFN-16 Package
Typical applicaTion