AO4807
30V Dual P-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=-10V) -6A
R
DS(ON)
(at V
GS
=-10V) < 35mΩ
R
DS(ON)
(at V
GS
= -4.5V) < 58mΩ
100% UIS Tested
100% R
g
Tested
Symbol
V
DS
The AO4807 uses advanced trench technology to provide
excellent R
DS(ON)
, and ultra-low low gate charge. This
device is suitable for use as a load switch or in PWM
applications.
V
Maximum UnitsParameter
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
-30V
Drain-Source Voltage
-30
G1
D1
S1
G1
S1
G2
S2
D1
D1
D2
D2
2
4 5
1
3
8
6
7
Top View
SOIC-8
Top View Bottom
Pin1
G2
D2
S2
V
DS
V
GS
I
DM
I
AS
, I
AR
E
AS
, E
AR
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJL
40
Maximum Junction-to-Ambient
T
A
=25°C
Avalanche Current
C
W
2
Maximum Junction-to-Lead °C/W
°C/W
Maximum Junction-to-Ambient
A D
32 90
26 A23
T
A
=25°C
T
A
=70°C
°C/W
R
θJA
48
Power Dissipation
B
P
D
Avalanche energy L=0.1mH
C
Pulsed Drain Current
C
Continuous Drain
Current
T
A
=70°C
V
Drain-Source Voltage
-30
1.3
74 62.5
A
I
D
-6
Units
V±20Gate-Source Voltage
-5
-30
mJ
Junction and Storage Temperature Range -55 to 150 °C
Thermal Characteristics
Parameter Typ Max
G1
D1
S1
G1
S1
G2
S2
D1
D1
D2
D2
2
4 5
1
3
8
6
7
Top View
SOIC-8
Top View Bottom
Pin1
G2
D2
S2
Rev 6: Nov 2011
www.aosmd.com Page 1 of 6
AO4807
Symbol Min Typ Max Units
BV
DSS
-30 V
V
DS
=-30V, V
GS
=0V -1
T
J
=55°C -5
I
GSS
±100 nA
V
GS(th)
Gate Threshold Voltage -1.3 -1.85 -2.4 V
I
D(ON)
-30 A
21 35
T
J
=125°C 31.5 45
33 58 mΩ
g
FS
19 S
V
SD
-0.8 -1 V
I
S
-3.5 A
C
iss
760 pF
C
oss
140 pF
C
rss
95 pF
R
g
1.5 3.2 5.0 Ω
Q
g
(10V) 13.6 16 nC
Q
g
(4.5V) 6.7 8 nC
Q
gs
2.5 nC
Q
gd
3.2 nC
t
D(on)
8 ns
t
6
ns
Drain-Source Breakdown Voltage
On state drain current
I
D
=-250µA, V
GS
=0V
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-6A
Reverse Transfer Capacitance V
GS
=0V, V
DS
=-15V, f=1MHz
SWITCHING PARAMETERS
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
I
DSS
µA
V
DS
=V
GS
I
D
=-250µA
V
DS
=0V, V
GS
= ±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Forward Transconductance
Diode Forward Voltage
R
DS(ON)
Static Drain-Source On-Resistance mΩ
I
S
=-1A,V
GS
=0V
V
DS
=-5V, I
D
=-6A
V
GS
=-4.5V, I
D
=-5A
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge
V
GS
=-10V, V
DS
=-15V, I
D
=-6A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
V
=-10V, V
=-15V, R
=2.7
Ω
,
t
r
6
ns
t
D(off)
17 ns
t
f
5 ns
t
rr
15 ns
Q
rr
9.7 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time I
F
=-6A, dI/dt=100A/µs
Turn-Off Fall Time
Body Diode Reverse Recovery Charge I
F
=-6A, dI/dt=100A/µs
Turn-On Rise Time
Turn-Off DelayTime V
GS
=-10V, V
DS
=-15V, R
L
=2.7
Ω
,
R
GEN
=3Ω
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PDis based on TJ(MAX)=150°C, using ≤10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
Rev 6: Nov 2011 www.aosmd.com Page 2 of 6
AO4807
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
5
10
15
20
25
30
1 1.5 2 2.5 3 3.5 4 4.5 5
-ID(A)
-VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
10
15
20
25
30
35
40
45
50
0 5 10 15 20
RDS(ON) (mΩ
Ω
Ω
Ω)
-ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1
1.2
1.4
1.6
1.8
0 25 50 75 100 125 150 175
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=-4.5V
ID=-5A
VGS=-10V
ID=-6A
25°C
125°C
V
DS
=-5V
VGS=-4.5V
V
GS
=
-
10V
0
5
10
15
20
25
30
35
40
012345
-ID(A)
-VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=
-
3V
-3.5V
-
6V
-
5V
-10V
-
4.5V
-
4V
40
0
5
10
15
20
25
30
1 1.5 2 2.5 3 3.5 4 4.5 5
-ID(A)
-VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
10
15
20
25
30
35
40
45
50
0 5 10 15 20
RDS(ON) (mΩ
Ω
Ω
Ω)
-ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
0.0 0.2 0.4 0.6 0.8 1.0 1.2
-IS(A)
-VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25
°
C
125°C
0.8
1
1.2
1.4
1.6
1.8
0 25 50 75 100 125 150 175
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=-4.5V
ID=-5A
VGS=-10V
ID=-6A
0
20
40
60
80
2 4 6 8 10
RDS(ON) (mΩ
Ω
Ω
Ω)
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
25°C
125°C
V
DS
=-5V
VGS=-4.5V
V
GS
=
-
10V
ID=-6A
25°C
125
°
C
0
5
10
15
20
25
30
35
40
012345
-ID(A)
-VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=
-
3V
-3.5V
-
6V
-
5V
-10V
-
4.5V
-
4V
Rev 6: Nov 2011 www.aosmd.com Page 3 of 6
AO4807
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
0 2 4 6 8 10 12 14
-VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
200
400
600
800
1000
1200
0 5 10 15 20 25 30
Capacitance (pF)
-VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
Coss
C
rss
VDS=-15V
ID=-6A
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100
-ID(Amps)
-VDS (Volts)
Figure 10: Maximum Forward Biased Safe
Operating Area (Note F)
10
µ
10s
1ms
DC
RDS(ON)
limited
TJ(Max)=150°C
T
A
=25°C
100
µ
10ms
10.0
100.0
1 10 100 1000
-IAR (A) Peak Avalanche Current
Time in avalanche, tA(µ
µµ
µs)
Figure 9: Single Pulse Avalanche capability (Note C)
TA=25°C
TA=150°C
TA=100°C
T
A
=125°C
0
2
4
6
8
10
0 2 4 6 8 10 12 14
-VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
200
400
600
800
1000
1200
0 5 10 15 20 25 30
Capacitance (pF)
-VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
Coss
C
rss
VDS=-15V
ID=-6A
1
10
100
1000
10000
0.00001 0.001 0.1 10 1000
Power (W)
Pulse Width (s)
Figure 11: Single Pulse Power Rating Junction-to-Ambient (Note F)
TA=25°C
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100
-ID(Amps)
-VDS (Volts)
Figure 10: Maximum Forward Biased Safe
Operating Area (Note F)
10
µ
10s
1ms
DC
RDS(ON)
limited
TJ(Max)=150°C
T
A
=25°C
100
µ
10ms
10.0
100.0
1 10 100 1000
-IAR (A) Peak Avalanche Current
Time in avalanche, tA(µ
µµ
µs)
Figure 9: Single Pulse Avalanche capability (Note C)
TA=25°C
TA=150°C
TA=100°C
T
A
=125°C
Rev 6: Nov 2011 www.aosmd.com Page 4 of 6
AO4807
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0.001
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=90°C/W
0.001
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=90°C/W
Rev 6: Nov 2011 www.aosmd.com Page 5 of 6
AO4807
VDC
Ig
Vds
DUT
VDC
Vgs
Vgs Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
-
+
-10V
Vdd
Vgs
Id
Vgs
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds L
-
2
E = 1/2 LI
AR
AR
BV
DSS
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Resistive Switching Test Circuit & Waveforms
-
+
Vgs
Vds
t t
t
tt
t
90%
10%
r
on
d(off)
f
off
d(on)
VDC
Ig
Vds
DUT
VDC
Vgs
Vgs Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
-
+
-10V
Vdd
Vgs
Id
Vgs
Rg
DUT
VDC
Vgs
Vds
Id
Vgs
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds L
-
+
2
E = 1/2 LI
AR
AR
BV
DSS
I
AR
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
dI/dt
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
-Isd
-Vds
F
-I
-I
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Resistive Switching Test Circuit & Waveforms
-
+
Vgs
Vds
t t
t
tt
t
90%
10%
r
on
d(off)
f
off
d(on)
Rev 6: Nov 2011
www.aosmd.com
Page 6 of 6