QT1101 lQ SNS5K SNS6 SNS6K SNS7 SNS7K " Ten independent QT sensing fields (keys) VSS DETECT " Patented charge-transfer (`QT') design SYNC/LP 10 KEY QTOUCHTM SENSOR IC " 2.8V ~ 5.5V single supply operation 24 23 22 21 20 19 18 17 " 40A current typ @ 3V in 360ms LP mode " 100% autocal for life - no adjustments required " Serial one or two wire interface with auto baud rate " Fully debounced results " Patented AKSTM Adjacent Key Suppression SNS8 25 16 SNS5 SNS8K 26 15 SNS4K SNS9 27 14 SNS4 SNS9K 28 13 SNS3K N.C. 29 12 SNS3 /CHANGE 30 11 SNS2K QT1101 32-QFN 1 2 3 4 5 6 7 8 SNS0K SNS1 " RoHS compliant 32-QFN, 48-SSOP packages SNS0 " `Fast mode' for use in slider type applications N.C. " Sync pin for excellent LF noise rejection 9 OSC 10 32 VDD 31 RX SS 1W /RST " Spread spectrum bursts for superior noise rejection SNS2 SNS1K APPLICATIONS ! ! ! ! MP3 players Mobile phones PC peripherals Television controls ! ! Pointing devices Remote controls QT1101 charge-transfer (`QT') QTouchTM IC is a self-contained, patented digital controller capable of detecting near-proximity or touch on up to ten electrodes. It allows electrodes to project independent sense fields through any dielectric such as glass or plastic. This capability coupled with its continuous self-calibration feature can lead to entirely new product concepts, adding high value to product designs. The devices are designed specifically for human interfaces, like control panels, appliances, gaming devices, lighting controls, or anywhere a mechanical switch or button may be found; they may also be used for some material sensing and control applications. Each of the channels operates independently of the others, and each can be tuned for a unique sensitivity level by simply changing a corresponding external Cs capacitor. Patented AKSTM Adjacent Key Suppression suppresses touch from weaker responding keys and allows only a dominant key to detect, for example to solve the problem of large fingers on tightly spaced keys. Spread spectrum burst technology provides superior noise rejection. These devices also have a SYNC/LP pin which allows for synchronization with additional similar parts and/or to an external source to suppress interference, or, an LP (low power) mode which conserves power. By using the charge transfer principle, this device delivers a level of performance clearly superior to older technologies yet is highly cost-effective. TA AVAILABLE OPTIONS 32-QFN 48-SSOP -400C to +850C QT1101-ISG QT1101-IS48G LQ CCopyright (c) 2005-2006 QRG Ltd QT1101 R4.06/0806 1 Overview Spread Spectrum operation: The bursts operate over a spread of frequencies, so that external fields will have minimal effect on key operation and emissions are very weak. Spread spectrum operation works with the DI mechanism to dramatically reduce the probability of false detection due to noise. The QT1101 is an easy to use, ten touch-key sensor IC based on Quantum's patented charge-transfer (`QT') principles for robust operation and ease of design. This device has many advanced features which provide for reliable, trouble-free operation over the life of the product. Sync Mode: The QT1101 features a Sync mode to allow the device to slave to an external signal source, such as a mains signal (50/60Hz), to limit interference effects. This is performed using the SYNC/LP pin. Sync mode operates by triggering three sequential acquire bursts, in sequence A-B-C from the Sync signal. Thus, each Sync pulse causes all ten keys to be acquired. Burst operation: The device operates in `burst mode'. Each key is acquired using a burst of charge-transfer sensing pulses whose count varies depending on the value of the reference capacitor Cs and the load capacitance Cx. In LP mode, the device sleeps in an ultra-low current state between bursts to conserve power. The keys signals are acquired using three successive bursts of pulses: Low Power (LP) Mode: The device features an LP mode for microamp levels of current drain with a slower response time, to allow use in battery operated devices. On detection of touch, the device automatically reverts to its normal mode and asserts the DETECT pin active to wake up a host controller. The device remains in normal, full acquire speed mode until another pulse is seen on its SYNC/LP pin, upon which it goes back to LP mode. Burst A: Keys 0, 1, 4, 5 Burst B: Keys 2, 3, 6, 7 Burst C: Keys 8, 9 Bursts always operate in A-B-C sequence. Self-calibration: On power-up, all ten keys are self-calibrated within 450ms typical to provide reliable operation under almost any conditions. AKSTM Adjacent Key Suppression is a patented feature that can be enabled via jumper resistors. AKS works to prevent multiple keys from responding to a single touch, a common complaint about capacitive touch panels. This can happen with closely spaced keys, or with control surfaces that have water films on them. Auto-recalibration: The device can time out and recalibrate each key independently after a fixed interval of continuous touch detection, so that the keys can never become `stuck on' due to foreign objects or other sudden influences. After recalibration the key will continue to function normally. The delay is selectable to be either 10s, 60s, or infinite (disabled). AKS operates by comparing signal strengths from keys within a group of keys to suppress touch detections from those that have a weaker signal change than the dominant one. The device also auto-recalibrates a key when its signal reflects a sufficient decrease in capacitance. I n this case the device recalibrates after ~2 seconds so as to recover normal operation quickly. The QT1101 has two different AKS groupings of keys, selectable via option resistors. These groupings are: Drift compensation operates to correct the reference level of each key slowly but automatically over time, to suppress false detections caused by changes in temperature, humidity, dirt and other environmental effects. AKS operates in three groups of keys. AKS operates over all ten keys. These two modes allow the designer to provide AKS while also providing for shift or function operations. The drift compensation is asymmetric. In the increasing capacitive load direction the device drifts more slowly than in the decreasing direction. In the increasing direction, the rate of compensation is one count of signal per two seconds. In the opposing direction, it is one count every 500ms. If AKS is disabled, all keys can operate simultaneously. Outputs: The QT1101 has a serial output using one or two wires, RS-232 data format, and automatic baud rate detection. A simple protocol is employed. Detection Integrator (DI) confirmation reduces the effects of noise on the QT1101 outputs. The DI mechanism requires consecutive detections over a number of measurement bursts for a touch to be confirmed and indicated on the outputs. In a like manner, the end of a touch (loss of signal) has to be confirmed over a number of measurement bursts. This process acts as a type of ` debounce' against noise. The QT1101 operates in slave mode, i.e. it only sends data to the host after receiving a request from the host. An additional /CHANGE (state changed) signal allows the use of the serial interface to be optimised, rather than being polled continuously. Simplified Mode: To reduce the need for option resistors, the simplified operating mode places the part into fixed settings with only the AKS feature being selectable. LP mode is also possible in this configuration. Simplified mode is suitable for most applications. In normal operation, both the start and end of a touch must be confirmed for six measurement bursts. In a special `Fast Detect` mode (available via jumper resistors) (Tables 1.2 and 1.6), confirmation of the start of a touch requires only two sequential detections, but confirmation of the end of a touch is still six bursts. Fast detect is only available when AKS is disabled. Lq 2 QT1101 R4.06/0806 1.1 Wiring Table 1.1 Pinlist 32-QFN 48 SSOP Pin Pin Name Type Function Notes If Unused 33 34 35 36 SS n/c /RST Vdd OD I Pwr Spread spectrum Reset input Power 100K resistor to Vss Open Vdd - 4 37 OSC I Oscillator 5 38 39, 40, 41, 42 n/c - - Spread spectrum drive Active low reset +2.8 ~ +5.0V Resistor to Vdd and optional spread spectrum RC network Leave open n/c - - - Open Sense pin and option select Sense pin Sense pin and option select Sense pin Sense pin and option select Sense pin Sense pin and option select Sense pin Sense pin Sense pin Sense pin and option select Sense pin Sense pin and option select Sense pin and mode select To Cs0 and/or option resistor To Cs0 + Key To Cs1 and/or option resistor* To Cs1 + Key To Cs2 and/or option resistor* To Cs2 + Key To Cs3 and/or option resistor* To Cs3 + Key To Cs4 To Cs4 + Key To Cs5 and/or option resistor * To Cs5 + Key To Cs6 and/or option resistor* To Cs6 + Key and/or mode resistor 1 2 3 - - 9 46 SNS1K I/O 10 47 SNS2 I/O 11 48 SNS2K I/O 12 1 SNS3 I/O 13 14 15 2 3 4 SNS3K SNS4 SNS4K I/O I/O I/O 16 5 SNS5 I/O 17 6 SNS5K I/O 18 7 SNS6 I/O 19 8 SNS6K I/O 20 9 SNS7 I/O Sense pin and mode or option select To Cs7 and/or mode resistor or option resistor* 21 SNS7K I/O Sense pin To Cs7 + Key n/c - - - Open 22 23 24 25 26 27 28 29 10 11, 12, 13, 14, 15, 16 17 18, 19, 20 21 22 23, 24 25 26 27 28 29 Open or option resistor* Open Open or option resistor* Open Open or option resistor* Open Open or option resistor* Open Open Open Open or option resistor* Open Open or option resistor* Open or mode resistor Open or mode resistor or option resistor* Open Vss n/c SYNC/LP DETECT n/c SNS8 SNS8K SNS9 SNS9K n/c Pwr I O/OD I/O I/O I/O I/O - Ground Sync In or LP In Detect Status Sense pin Sense pin Sense pin Sense pin - Open Vdd or Vss** Open Open Open Open Open Open Open 30 30 /CHANGE OD State changed 31 32 31 32 1W RX I/OD I 1W mode serial I/O 2W Receive 0V Rising edge sync or LP pulse See Table 1.4 To Cs8 To Cs8 + Key To Cs9 To Cs9 + Key 0 = a key state has changed Requires pull-up Requires pull-up to Vdd Input for 2W mode 6 43 SNS0 I/O 7 44 SNS0K I/O 8 45 SNS1 I/O - Pin Type I I/O OD I/OD O/OD Pwr 100K resistor to Vss Vdd CMOS input only CMOS I/O CMOS open drain output CMOS input or open drain output CMOS push pull or open-drain output (option selected) Power / ground Notes Mode resistor is required only in Simplif ied mode (see Figure 1.2) * Option resistor is required only in Full Options mode (see Figure 1.1) Pin is either Sync or LP depending on options selected (functions SL_0, SL_1, see Figure 1.1) ** See text Lq 3 QT1101 R4.06/0806 Figure 1.1 Connection Diagram - Full Options (32-QFN Package) VDD +2.8 ~ +5V Voltage Reg Vunreg 4.7uF 4.7uF *100nF 3 12 RSNS3 4.7nF KEY 3 4.7nF KEY 4 4.7nF KEY 5 4.7nF KEY 6 4.7nF KEY 7 4.7nF KEY 8 11 SNS2 10 4.7nF MOD_0 Vdd / Vss 1M 15 SNS4K 16 SNS5 SNS1K 9 SNS1 8 CS5 RS5 OUT_D Vdd / Vss SNS0K 7 1M 17 SNS5K SNS0 6 SL_0 CS6 R S6 Vdd / Vss 18 SNS6 1M SL_1 CS7 RS7 Vdd / Vss 1M CS8 R S8 RS2 CS2 2.2K AKS_1 Vdd / Vss 1M 4.7nF RS1 CS1 2.2K AKS_0 Vdd / Vss 1M 4.7nF 4.7nF KEY 9 CS9 RS9 RSNS2 KEY 2 10K RSNS1 KEY 1 10K RSNS0 KEY 0 RS0 CS0 10K 2.2K 19 SNS6K 20 SNS7 21 SNS7K 25 SNS8 26 SNS8K 27 SNS9 28 SNS9K VDD QT1101 32-QFN Recommended Rb1, Rb2 Values With Spread-Spectrum Vdd Range Rb1 Rb2 2.8 ~ 2.99V 12K 27K 3.0 ~ 3.59V 12K 22K 3.6 ~ 5V 15K 27K Rb1 OSC 4 Rb2 No Spread-Spectrum Vdd Range Rb1 Rb2 2.8 ~ 2.99V 15K dni 3.0 ~ 3.59V 18K dni 3.6 ~ 5V 20K dni 2.2K 10K RSNS9 CS4 RS4 2.2K 10K RSNS8 SNS4 2.2K 10K RSNS7 SNS3K SNS2K 2.2K 10K RSNS6 13 SNS3 2.2K 10K RSNS5 1M /RST 2.2K 10K RSNS4 CS3 R S3 MOD_1 Vdd / Vss 2 VDD 2.2K Css SS 10K 1 100nF No Spread-spectrum: Replace Css with 100K resistor dni = do not install 100K 23 SYNC or LP DETECT OUT Pullup not required for push-pull mode See Detect pin mode table below 100K Vdd 24 RX 32 1W 31 /CHANGE 30 N.C. 29 N.C. 5 SYNC/LP DETECT Vdd 100K 2W DATA Vdd DATA Vdd /CHANGE 100K VSS 22 Table 1.2 AKS / Fast-Detect Options AKS_1 Vss Vss Vdd Vdd AKS_0 Vss Vdd Vss Vdd Table 1.3 Max On-Duration MOD_1 Vss Vss Vdd Vdd MOD_0 Vss Vdd Vss Vdd Table 1.4 Detect Pin Drive OUT_D Vss Vdd Table 1.5 SYNC/LP Function Lq SL_1 Vss Vss Vdd Vdd AKS MODE Off Off On, in 3 groups On, global FAST-DETECT Off Enabled Off Off MAX ON-DURATION MODE 10 seconds to recalibrate 60 seconds to recalibrate Infinite (disabled) (reserved) DETECT PIN MODE Open drain, active low Push-pull, active high SL_0 Vss Vdd Vss Vdd SYNC/LP PIN MODE Sync LP mode: 120ms response time LP mode: 200ms response time LP mode: 360ms response time 4 QT1101 R4.06/0806 Figure 1.2 Connection Diagram - Simplified Mode (32-QFN Package) SMR resistor installed between SNS6K, SNS7 VDD +2.8 ~ +5V Voltage Reg Vunreg 4.7uF 4.7uF *100nF 3 RS3 12 RSNS3 4.7nF CS3 KEY 3 4.7nF KEY 4 CS5 KEY 5 4.7nF SNS4K 16 SNS5 17 SNS5K 18 SNS6 2.2K CS7 SNS6K 20 SNS7 21 SNS7K 25 SNS8 26 SNS8K 27 SNS9 28 SNS9K RS8 10K 4.7nF CS8 KEY 8 2.2K RS9 10K 4.7nF CS9 2.2K KEY 9 SNS2K 11 SNS2 10 4.7nF SNS1K 9 SNS1 8 SNS0K 7 SNS0 6 CS2 2.2K 4.7nF RS1 CS1 2.2K AKS_0 Vdd / Vss 1M RSNS2 KEY 2 RS2 4.7nF 10K RSNS1 KEY 1 10K RSNS0 KEY 0 RS0 CS0 10K 2.2K 19 SMR 1M 4.7nF KEY 7 RSNS9 2.2K RS7 10K RSNS8 2.2K CS6 KEY 6 RSNS7 /RST SNS3K 15 RS6 10K RSNS6 2.2K CS4 RS5 4.7nF VDD SNS3 SNS4 10K RSNS5 13 RS4 10K RSNS4 2.2K 2 VDD QT1101 32-QFN Recommended Rb1, Rb2 Values With Spread-Spectrum Vdd Range Rb1 Rb2 2.8 ~ 2.99V 12K 27K 3.0 ~ 3.59V 12K 22K 3.6 ~ 5V 15K 27K Rb1 OSC 4 Rb2 No Spread-Spectrum Vdd Range Rb1 Rb2 2.8 ~ 2.99V 15K dni 3.0 ~ 3.59V 18K dni 3.6 ~ 5V 20K dni Css SS 10K 1 100nF No Spread-spectrum: Replace Css with 100K resistor dni = do not install 100K 23 LP IN 24 DETECT OUT SYNC/LP DETECT RX 32 1W 31 /CHANGE 30 N.C. 29 N.C. Vdd 2W DATA Vdd DATA Vdd /CHANGE 100K 100K 5 VSS 22 Table 1.6 AKS Resistor Options AKS_0 Vss Vdd AKS MODE Off On, global FAST-DETECT Enabled Off Table 1.7 Functions in Simplified Mode SYNC/LP pin Max on-duration delay Detect Pin Lq 200ms LP function; sync not available 60 seconds Push-pull, active high 5 QT1101 R4.06/0806 2 Device Operation A trigger pulse on SYNC will cause the device to fire three acquire bursts in A-B-C sequence: Burst A: Keys 0, 1, 4, 5 Burst B: Keys 2, 3, 6, 7 Burst C: Keys 8, 9 2.1 Startup Time After a reset or power-up event, the device requires 450ms to initialize, calibrate, and start operating normally. Keys will work properly once all keys have been calibrated after reset. Low Power (LP) Mode: This allows the device to enter a slow mode with very low power consumption, in one of three response time settings - 120ms, 200ms, and 360ms nominal. 2.2 Option Resistors The option resistors are read on power-up only. There are two primary option mode configurations: f ull, and simplified. LP mode is entered by a positive pulse on the SYNC/LP pin. Once the LP pulse is detected , the device will enter and remain in this microamp mode until it senses and confirms a touch, upon which it will switch back to normal (full speed) mode on its own, with a response time of < 40ms typical (burst length dependent). The device will go back to LP mode again if SYNC/LP is held high or after another LP pulse is received. In full options mode, seven 1M option resistors are required as shown in Figure 1.1. All seven resistors are mandatory. To obtain simplified mode, a 1M resistor should be connected from SNS6K to SNS7. In simplified mode, only one additional 1M option resistor is required for the AKS feature (Figure 1.2). The response time setting is determined by option resistors SL_1 and SL_0 (see Table 1.5). Slower response times result in lower power drain. Note that the presence and connection of option resistors will influence the required values of Cs; this effect will be especially noticeable if the Cs values are under 22nF. Cs values should be adjusted for optimal sensitivity after the option resistors are connected. The SYNC/LP pulse should be >150s in duration. If the SYNC/LP pin is held high permanently, the device will go into normal mode during a key touch, and return to low-current mode after the detection has ceased and the key state has been read by the host. 2.3 DETECT Pin DETECT represents the functional logical-OR of all ten keys. DETECT can be used to wake up a battery-operated product upon human touch. If the SYNC/LP pin is held low constantly, the device will remain in normal full speed mode continuously. The output polarity and drive of DETECT are governed according to Table 1.4, page 4. 2.6 AKSTM Function Pins 2.4 /CHANGE Pin The QT1101 features an adjacent key suppression ( AKSTM) function with two modes. Option resistors act to set this feature according to Tables 1.2 and 1.6. AKS can be disabled, allowing any combination of keys to become active at the same time. When operating, the modes are: The /CHANGE pin can be used to tell the host that a change in touch state has been detected (i.e. a key has been touched or released), and that the host should read the new key states over the serial interface . /CHANGE is pulled low when a key state change has occurred. Global: The AKS function operates across all ten keys. This means that only one key can be active at any one time. /CHANGE is very useful to prevent transmissions with duplicate data. If /CHANGE is not used, the host would need to keep polling the QT1101 constantly, even if there are no changes in touch. Upon detection of a key, /CHANGE will pull low and stay low until the serial interface has been polled by the host. /CHANGE will then be released and return high until the next change of key state, either on or off , on any key (Figures 2.1, 2.4). Groups: The AKS function operates among t hree groups of keys: 0-1-4-5, 2-3-6-7, and 8-9. This means that up to three keys can be active at any one time. The /CHANGE pin is open-drain, and requires a ~100K pullup resistor to Vdd in order to function properly. 2.7 MOD_0, MOD_1 Inputs In Group mode, keys in one group have no AKS interaction with keys in any other group. Note that in Fast Detect mode, AKS can only be off. In full option mode, the MOD_0 and MOD_1 resistors are used to set the 'Max On-Duration' recalibration timeouts. If a key becomes stuck on for a lengthy duration of time, this feature will cause an automatic recalibration event of that specific key only once the specified on-time has been exceeded. Settings of 10s, 60s, and infinite are available. 2.5 SYNC/LP Pin The SYNC / LP pin function is configured according to the SL_0 and SL_1 resistor connections to either Vdd or Vss , according to the Table 1.5. The Max On-Duration feature operates on a key -by-key basis; when one key is stuck on, its recalibration has no effect on other keys. Sync mode: Sync mode allows the designer to synchronize acquire bursts to an external signal source, such as mains frequency (50/60Hz), to suppress interference. It can also be used to synchronize two QT parts which operate near each other, so that they will not cross-interfere if two or more of the keys (or associated wiring) of the two parts are near each other. The logic combination on the MOD option pins sets the timeout delay; see Table 1.3. Simplified mode MOD timing: In simplified mode, the max on-duration is fixed at 60 seconds. The SYNC input is positive pulse triggered. If the SYNC input does not change, the device will free-run at its own rate after ~150ms. Lq 6 QT1101 R4.06/0806 2.8 Fast Detect Mode 2.10 Unused Keys In many applications, it is desirable to sense touch at high speed. Examples include scrolling `slider' strips or `Off' buttons. It is possible to place the device into a `Fast Detect' mode that usually requires under 15 ms to respond. This is accomplished internally by setting the Detect Integrator to only two counts, i.e. only two successive detections are required to detect touch. Unused keys should be disabled by removing the corresponding Cs, Rs, and Rsns components and connecting SNS pins as shown in the `Unused' column of Table 1.1. Unused keys are ignored and do not factor into the AKS function (Section 2.6). In LP mode, `Fast' detection will not speed up the initial delay (which could be up to 360ms typical depending on the option setting). However, once a key is detected the device is forced back into normal speed mode . It will remain in this faster mode until another LP pulse is received. The 1W serial interface is an RS-232 based auto baud rate serial asynchronous interface that requires only one wire between the host MCU and the QT1101. The serial data are extremely short and simple to interpret. 2.11 Serial 1W Interface Auto baud rate detection takes place by having the host device send a specific character to the QT 1101, which allows the QT1101 to set its baud rate to match that of the host. When used in a `slider' application, it is normally desirable to run the keys without AKS. In both normal and `Fast' modes, the time required to process a key release is the same: it takes six sequential confirmations of non-detection to turn a key off. One feature of this method is that the baud rate can be any rate between 8,000 and 38,400 bits per second. Neither the QT1101 nor the host device has to be accurate in their transmission rates, i.e. crystal control is not required. Fast Detect mode can be enabled as shown in Tables 1.2 and 1.6. Depending on the timing of a 1W host transmission, the QT1101 device may need to abort an acquisition burst, and rerun it after the transmission is complete and a reply has been sent. As a consequence, each host request can potentially result in a small, unnoticeable increase in detection delay. 2.9 Simplified Mode A simplified operating mode which does not require the majority of option resistors is available. This mode is set by connecting a resistor labeled SMR between pins SNS6K and SNS7. (see Figure 1.2). 1W Connection: The 1W pin should be pulled high with a resistor. When not in use it floats high, hence this causes no increase in supply current. In this mode there is only one option available - AKS enable or disable. When AKS is disabled, Fast Detect mode is enabled; when AKS is enabled, Fast Detect mode is off. During transmission from the host, the host may drive the 1W line with either an open-drain or a push-pull driver. However, if the host uses push-pull driving, it must release the 1W line as soon as it is done with its stop bit so that there is no drive conflict when the QT1101 sends its reply. AKS in this mode is global only (i.e. operates across all functioning keys). The other option features are fixed as follows: DETECT Pin: Push-pull, active high SYNC/LP Function: LP mode, ~200ms response time Max On-Duration: 60 seconds See also Tables 1.6 and 1.7. If open-drain transmission is used by the host, the value of the pull-up resistor should be optimized for the desired baud rate: faster rates require a lower value of resistor to prevent rise-time problems. A typical value for 19,200 baud might be 100K. An oscilloscope should be used to confirm that the resistor is not causing excessive timing skew that might cause bit errors. Figure 2.1 Basic 1W Sequence 1W /CHANGE driven reply from QT1101 (2 bytes)* request from host (1 byte) key state change floating floating floating The QT1101 uses push-pull drive to transmit data out on the 1W line back to the host. When the stop bit level is established, 1W is floated; for this reason, a pull-up resistor should always be used on the 1W pin to prevent the signal from drifting to an undefined state. A 100K pull-up resistor on 1W is recommended, unless the host uses open-drain drive to the QT1101, in which case a lower value may be required (see prior paragraph). floating 1 ~ 3 bit periods *See Figure 2.3 Figure 2.2 1W UART Host Pattern 2.11.1 Basic 1W Operation The basic sequence of 1W serial operation is shown in Figure 2.1. The 1W line is bi-directional and must be pulled high with a resistor to prevent a floating, undefined state (see previous section). 1W (from host) Serial bits S 0 1 2 3 4 5 6 7 S Lq 7 QT1101 R4.06/0806 Oscillator Tolerance: While Figure 2.3 UART Response Pattern on 1W Pin the auto baud rate detection floating mechanism has a wide tolerance for oscillator error, floating floating 1W the QT's oscillator should still (from QT1101) not vary by more than 20% from the recommended value. Serial bits S 0 1 2 3 4 5 6 7 S S 0 1 2 3 4 5 6 7 S Beyond a 20% error, communications at either the Associated key # 0 1 2 3 4 5 * * 6 7 8 9 U U * * lower or upper stated limits (Shown with keys 0, 2 and 7 detecting) * Fixed bit values could fail. The oscillator U - Unused bits frequency can be checked with an oscilloscope by probing the pulse width on QT1101 will be at full speed, and hence will always respond the SNS lines; these should ideally be 2.15s in width each to `P' requests. at the beginning of a burst with the recommended Note that when sleeping in LP mode, there are by definition spread-spectrum circuit, or 2s wide if no spread-spectrum no keys active, so there should not be a reason for the host circuit is used. to send the `P' query command in the first place. Host Request Byte: The host requests the key state from Three strategies are available to the host to ensure that LP the QT1101 by sending an ASCII "P" character (ASCII mode operates correctly: decimal code 80, hex 0x50) over the 1W line. The character # /CHANGE used. The host monitors /CHANGE, and only is formatted according to conventional RS-232: sends a `P' request when it is low. The part is awake by 8 data bits definition when /CHANGE is low. If /CHANGE is high, no parity key states are known to be unchanged since the last 1 stop bit reply received from the QT1101, and so additional `P' baud rate: 8,000 - 38,400 requests are not needed. Before triggering LP mode the host should wait for /CHANGE to go high after all keys Figure 2.2 shows the bit pattern of the host request byte have become inactive. (`P'). The first bit labeled `S' is the start bit, the last `S' is the stop bit. This bit pattern should never be changed. The # DETECT used. The host monitors DETECT, and if it is QT1101 will respond at the same baud rate as the received active (i.e. the part is awake) it polls the device regularly `P' character. to obtain key status. When DETECT is inactive (the part After sending the `P' character the host must immediately may be sleeping) no requests are sent because it is float the 1W signal to prevent a drive conflict between the known that no keys are active. Before triggering LP host and the QT1101 (see Figure 2.1). The delay from the mode the host should wait for DETECT to become received stop bit to the QT1101 driving the 1W pin is in the inactive, and then send one additional 'P' request to range 1-3 bit periods, so the host should float the pin within ensure /CHANGE is also made inactive. one bit period to prevent a drive conflict. # Neither /CHANGE nor DETECT used. The host polls Data Reply: Before sending a reply, the QT1101 returns the the device regularly to obtain key status, with a timeout /CHANGE signal to its inactive (float-high) state. in operation when awaiting the reply to each `P' request. Not receiving a reply within the timeout period only The QT1101 then replies by sending two eight-bit characters occurs when the part is sleeping, and hence when no to the host over the 1W line using the same baud rate as the keys are active. Before triggering LP mode the host request. With no keys pressed, both repl y bytes are ASCII should wait for all keys to become inactive and then `@' (0x40) characters; any keys that are pressed at the time send an additional 'P' request to the QT1101 to ensure of the reply result in their associated bits being set in the /CHANGE is also inactive. reply. Figure 2.3 shows the reply bytes when keys 0, 2 and 7 are pressed - 0x45, 0x42, and the associations between keys and bits in the reply. 2.11.3 2W Operation 1W operation, as described above, requires that the host float the 1W line while awaiting a reply from the QT1101; this is not always possible. The QT1101 floats the 1W pin again after establishing the level of the stop bit. 2.11.2 LP Mode Effects on 1W The use of low power (LP) mode presents some additional 1W timing requirements. In LP mode (Section 2.5), the QT1101 will only respond to a request from the host when it is making one of its infrequent checks for a key press. Hence, in that condition most requests from the host to the QT1101 will be ignored, since the QT1101 will be sleeping and unresponsive. However, if either /CHANGE or DETECT are active the Figure 2.4 2W Operation request from host (1 byte) key state change driven reply from QT1101 (2 bytes) RX (from host) 1W floating (from QT1101) /CHANGE floating floating floating 1 ~ 3 bit periods Lq 8 QT1101 R4.06/0806 The spread-spectrum circuit can be eliminated if it is not desired (see Section 3.1). Non spread-spectrum mode consumes significantly less current in one of the LP modes. To solve this problem, the QT1101 can also receive the `P' character from the host on its `Rx' pin separately from the 1W pin (Figure 2.4). The host need not float the Rx line since the QT1101 will never try to drive it. The spread-spectrum RC network might need to be modified slightly with longer burst lengths. The sawtooth waveform observed on SS should reach a crest height as follows: Following a `P' on Rx, the QT1101 will send the same response pattern (Figure 2.3) over the 1W line as in pure 1W mode. Vdd >= 3.6V: 17% of Vdd Vdd < 3.6V: 20% of Vdd All other comments and timings given for 1W operation are applicable for 2W operation. LP operation is the same for 2W mode as for 1W. The Css capacitor connected to SS (Figures 1.1 and 1.2) should be adjusted so that the wavefor m approximates the above amplitude, 10%, during normal operation in the target circuit. If this is done, the circuit will give a spectral modulation of 12-15%. If the Rx pin is not used, it must be tied to Vdd. 3 Design Notes 3.3 Cs Sample Capacitors - Sensitivity The Cs sample capacitors accumulate the charge from the key electrodes and determine sensitivity. Higher values of Cs make the corresponding sensing channel more sensitive. The values of Cs can differ for each channel, permitting differences in sensitivity from key to key or to balance unequal sensitivities. Unequal sensitivities can occur due to key size and placement differences and stray wiring capacitances. More stray capacitance on a sense trace will desensitize the corresponding key; increasing the Cs for that key will compensate for the loss of sensitivity. 3.1 Oscillator Frequency The QT1101's internal oscillator runs from an external network connected to the OSC and SS pins as shown in Figures 1.1 and 1.2. The charts in these figures show the recommended values to use depending on nominal operating voltage and spread spectrum mode. If spread spectrum mode is not used, only resistor Rb1 should be used, the Css capacitor eliminated, and the SS pin pulled to Vss with a 100K resistor. The Cs capacitors can be virtually any plastic film or low to medium-K ceramic capacitor. The `normal' Cs range is 2 .2nF to 50nF depending on the sensitivity required; larger values of Cs require better quality to ensure reliable sensing. Acceptable capacitor types for most uses include PPS film, polypropylene film, and NP0 and X7R ceramics. Lower grades than X7R are not advised. An out-of-spec oscillator can induce timing problems such as large variations in Max On-Duration times and response times as well as on the serial port. Effect on serial communications: The oscillator frequency has no nominal effect on serial communications since the baud rate is set by an auto-sensing mechanism. However, if the oscillator is too far outside the recommended settings, the possible range of serial communications can shrink. For example, if the oscillator is too slow, the upper baud rate range can be reduced. The required values of Cs can be noticeably affected by the presence and connection of the option resistors. 3.4 Power Supply The burst pulses should always be in the range of 1.8 -2.4s at the start of a burst to allow the serial port to operate at its specified limits; in spread-spectrum mode, the first pulses of a burst should ideally be 2.15s. In non spread-spectrum mode, the target value is 2s. If in doubt, make the pulses on the narrower side (i.e. a faster oscillator) when using the higher baud rates, and conversely on the wider side when using the lowest baud rates. The power supply can range from 2.8V to 5.0V. If this fluctuates slowly with temperature, the device will track and compensate for these changes automatically with only minor changes in sensitivity. If the supply voltage drifts or shifts quickly, the drift compensation mechanism will not be able to keep up, causing sensitivity anomalies or false detections. The power supply should be locally regulated using a three-terminal device, to between 2.8V and 5 .0V. If the supply is shared with another electronic system, care should be taken to ensure that the supply is free of digital spikes, sags, and surges which can cause adverse effects. 3.2 Spread Spectrum Circuit The QT1101 offers the ability to spectrally spread its frequency of operation to heavily reduce susceptibility to external noise sources and to limit RF emissions. The SS pin is used to modulate an external passive RC netw ork that modulates the OSC pin. OSC is the main oscillator current input. The circuits and recommended values are shown in Figures 1.1 and 1.2. For proper operation a 0.1F or greater bypass capacitor must be used between Vdd and Vss . The bypass capacitor should be routed with very short tracks to the device's Vss and Vdd pins. 3.5 PCB Layout and Construction The resistors Rb1 and Rb2 should be changed depending on Vdd. As shown in Figures 1.1 and 1.2, three sets of values are recommended for these resistors depending on Vdd. The power curves in Section 4.6 also show the effect of these resistors. Lq Refer to Quantum application note AN-KD02 for information related to layout and construction matters. 9 QT1101 R4.06/0806 4 Specifications 4.1 Absolute Maximum Specifications Operating temperature, Ta. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 ~ +85C Storage temp, Ts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 ~ +125C Vdd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 ~ +6.0V Max continuous pin current, any control or drive pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Short circuit duration to ground or Vdd, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite Voltage forced onto any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V ~ (Vdd + 0.3) Volts 4.2 Recommended Operating Conditions Operating temperature, Ta. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 ~ +85C VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.8 ~ +5.0V Short-term supply ripple+noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mV/s Long-term supply stability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mV Cs range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 ~ 100nF Cx range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 ~ 50pF 4.3 AC Specifications Vdd = 5.0V, Ta = recommended, Cx = 5pF, Cs = 4.7nF; circuit of Figure 1.1 Parameter Description Min Typ Max Units Trc Recalibration time 300 ms kHz Notes Fc Burst center frequency 124 Fm Burst modulation, percent 15 % Tpc Sample pulse duration 2 s Tsu Startup time from cold start 450 ms Tbd Burst duration 6.5 ms Tdf Response time - Fast mode 15 ms Tdn Response time - normal mode 40 ms Tdl Response time - LP mode 200 ms 200ms LP setting Tdr Release time - all modes 40 ms End of touch bps Serial communications speed 8,000 38,400 Total deviation All 3 bursts baud 4.4 DC Specifications Vdd = 5.0V, Ta = recommended, Cx = 5pF, Cs = 4.7nF, Ta = recommended range; circuit of Figure 1.1 unless noted Parameter Description Min Typ Max Units 8 mA @ Vdd = 5.0 @ Vdd = 4.0 @ Vdd = 3.6 @ Vdd = 3.3 @ Vdd = 2.8 A @ Vdd = 3.0; 200ms LP mode V/s Req'd for startup, w/o external reset ckt Iddn Average supply current, normal mode* 4.5 2.7 2.1 1.9 1.5 Iddl Average supply current, LP mode* 75 Vdds Average supply turn-on slope Vil Low input logic level Vhl High input logic level Vol Low output voltage Voh High output voltage Iil 100 0.7 3.5 Lq V V 0.5 V 7mA sink V 2.5mA source 1 A Vdd-0.5 Input leakage current Ar Acquisition resolution *No spread spectrum circuit Notes 8 10 bits QT1101 R4.06/0806 4.5 Signal Processing Vdd = 5.0V, Ta = recommended, Cx = 5pF, Cs = 4.7nF, 2s QT Pulses Description Value Units Notes Threshold for increase in Cx load Detection threshold 10 counts Detection hysteresis 2 counts Anti-detection threshold 6 counts Anti-detection recalibration delay 2 secs Detect Integrator filter, normal mode 6 samples Must be consecutive or detection fails Detect Integrator filter, Fast mode 2 samples Must be consecutive or detection fails Max On-Duration Normal drift compensation rate Anti drift compensation rate Lq Threshold for decrease of Cx load Time to recalibrate if Cx load has exceeded anti-detection threshold 10, 60, inf secs 2,000 ms/level Towards increasing Cx load Option pin selected 500 ms/level Towards decreasing Cx load 11 QT1101 R4.06/0806 4.6 Idd Curves Cx = 5pF, Cs = 4.7nF, Ta = 20oC, Spread spectrum circuit (see Fig. 1.1). QT1101 Idd (norm al m ode) m A QT1101 Idd (120m s response) A 5.0 700 600 4.0 Rb1=12K Rb2=22K Rb1=15K Rb2=27K Idd(A) Idd(mA) 500 3.0 2.0 400 Rb1=12K Rb2=22K 300 Rb1=15K Rb2=27K 200 1.0 Rb1=12K Rb2=27K Rb1=12K Rb2=27K 100 0.0 0 2.5 3 3.5 4 4.5 Vdd(V) 5 5.5 2.5 QT1101 Idd (200m s response) A 3 3.5 4 4.5 Vdd(V) 5 5.5 QT1101 Idd (360m s response) A 400 300 250 Rb1=12K Rb2=22K 200 200 Rb1=15K Rb2=27K Idd(A) Idd(A) 300 Rb1=12K Rb2=22K 150 Rb1=15K Rb2=27K 100 100 Rb1=12K Rb2=27K Rb1=12K Rb2=27K 50 0 0 2.5 3 3.5 4 4.5 Vdd(V) 5 5.5 2.5 3 3.5 4 4.5 Vdd(V) 5 5.5 Cx = 5pF, Cs = 4.7nF, Ta = 20oC, No spread spectrum circuit (see Fig. 1.1). QT1101 Idd (norm al m ode) m A QT1101 Idd (120m s response) A 5.0 600 500 4.0 Idd(A) Idd(mA) 400 3.0 Rb1=20K 2.0 Rb1=20K 200 Rb1=18K 1.0 300 Rb1=15K Rb1=18K 100 Rb1=15K 0.0 0 2.5 3 3.5 4 4.5 Vdd(V) 5 5.5 2.5 150 250 125 200 100 Rb1=20K 150 3.5 4 4.5 Vdd(V) 5 5.5 QT1101 Idd (360m s response) A 300 Idd(A) Idd(A) QT1101 Idd (200m s response) A 3 100 Rb1=20K 75 50 Rb1=18K Rb1=18K 50 25 Rb1=15K 0 Rb1=15K 0 2.5 3 lQ 3.5 4 4.5 Vdd(V) 5 5.5 2.5 12 3 3.5 4 4.5 Vdd(V) 5 5.5 QT1101 R4.06/0806 4.7 LP Mode Typical Response Times Response Time vs Vdd - 120ms Setting Response Time vs Vdd - 200ms Setting 240 Actual Response Time, ms Actual Response Time, ms 130 125 120 115 110 105 100 95 90 230 220 210 200 190 180 170 160 2.5 3 3.5 4 4.5 5 5.5 2.5 3 3.5 Vdd 4 4.5 5 5.5 Vdd Response Time vs Vdd - 360ms Setting Actual Response Time, ms 430 410 390 370 350 330 310 290 2.5 3 3.5 4 4.5 5 5.5 Vdd lQ 13 QT1101 R4.06/0806 4.8 Mechanical - 32-QFN Package Dimensions In Millimeters Symbol Minimum Nominal Maximum A 0.70 0.90 A1 0.00 0.02 0.05 b 0.18 0.25 0.32 C 0.20 REF D 4.90 5.00 5.10 D2 3.05 3.65 E 4.90 5.00 5.10 E2 3.05 3.65 e 0.50 L 0.30 0.40 0.50 y 0.00 0.075 Note that there is no functional requirement for the large pad on the underside of the 32-QFN package to be soldered to the substrate. If the final application does require this area to be soldered for mechanical reasons, the pad(s) to which it is soldered to must be isolated and contained under the 32-QFN footprint only. Lq 14 QT1101 R4.06/0806 4.9 Mechanical - 48-SSOP Package A B C G J H D a F E All dimensions in millimeters Min Max A 10.03 10.67 B 7.39 7.59 C 0.20 0.30 D 2.16 2.51 E 0.64 Typ F 0.10 0.25 G 15.57 16.18 H 0.10 0.30 J 0.64 0.89 a 0o 8o 4.10 Part Marking 32-QFN 48-SSOP QRG Part No. QT1101 (c)QRG 4 YYWWG run nr. QT1101-IS48G; 48 SSOP QRG Revision Code QT1101-IS48G (c) QRG 1976 R4 QProxTM <datecode#> DIMPLE 'YY' = Year of manufacture: 'WW' = Week of manufacture: 'G' = Green/RoHS Compliant. Pin 1 Pin 1 Identification Lq 'run nr.' = 6 Digit Run Number 15 QT1101 R4.06/0806 LQ Copyright (c) 2005-2006 QRG Ltd. All rights reserved. Patented and patents pending Corporate Headquarters 1 Mitchell Point Ensign Way, Hamble SO31 4RF Great Britain Tel: +44 (0)23 8056 5600 Fax: +44 (0)23 8045 3939 www.qprox.com North America 651 Holiday Drive Bldg. 5 / 300 Pittsburgh, PA 15220 USA Tel: 412-391-7367 Fax: 412-291-1015 This device is covered under one or more United States and corresponding international patents. QRG patent numbers can be found online at www.qprox.com. Numerous further patents are pending, which may apply to this device or the applications thereof. The specifications set out in this document are subject to change without notice. All products sold and services supplied by QRG are subject to our Terms and Conditions of sale and supply of services which are available online at www.qprox.com and are supplied with every order acknowledgement. QRG trademarks can be found online at www.qprox.com. QRG products are not suitable for medical (including lifesaving equipment), safety or mission critical applications or other similar purposes. Except as expressly set out in QRG's Terms and Conditions, no licenses to patents or other intellectual property of QRG (express or implied) are granted by QRG in connection with the sale of QRG products or provision of QRG services. QRG will not be liable for customer product design and customers are entirely responsible for their products and applications which incorporate QRG's products. Development Team: John Dubery, Alan Bowens, Matthew Trend