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SINGLE and QUAD 3 Amp & 4 Amp
POL REGULATORS
T4-LDS-0117 Rev. 9 (110370) Page 1 of 17
DEVICES LEVELS AVAILABLE
MHP Series COTS
(Formerly SAT8564 / SAT8565 / SAT8566 Series) CLASS H
(Consult Table 3 for Part Number Designations) CLASS K
FEATURES
¾ Smallest footprint in the Space Industry
¾ Single 3 Amp and Single & Quad 4 Amp product (Note 1)
¾ Efficiencies to 85%
¾ Radiation Hard to 300K rad TID (Note 9)
¾ SE results show no significant output transients through an LET of 58 MeV/(mg/cm2)
¾ Both tabbed and tabless packages available
¾ Optimized for 5V input. Consult factory for inputs up to 16V (Note 2)
¾ Operates down to 4.3 Volts
¾ Current Mode Control
¾ Adjustable output Voltage between 0V and 4V (depends on model, see table 3)
¾ Parallelable models available (See Table 3)
¾ Synchronizable models available (See Table 3)
¾ Enable function available
¾ Soft start capable (See Figure 16)
¾ Operates at a nominal frequency of 500KHz
DESCRIPTION
The MHPS series are non-isolated Point of Load switching regulators for high reliability, military, and Space
distributed power applications. Fully integrated, these include a buck controller, inductor, and input / output capacitors
combined in a single package. They operate from an input voltage of +4.5V to +16V, providing step down power
conversion to output voltages as low as 0V. Operating features include output voltage adjust, output current limit,
enable, external synchronization and soft start. Some models can also be setup in a parallel configuration to increase
output current capability and reduce noise on the input supply. Careful design and layout ensure excellent stability,
transient response, and low noise operation. Packaged in compact metal cases, they operate over the full -55°C to
+125°C temperature range.
TECHNICAL DATA SHEET
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SINGLE and QUAD 3 Amp & 4 Amp
POL REGULATORS
T4-LDS-0117 Rev. 9 (110370) Page 2 of 17
Table 1 – ABSOLUTE MAXIMUM RATINGS (Tc = +25°C unless otherwise note)
Parameters / Test Conditions Symbol Value Unit
Input Voltage (Note 2) Vin 16 Vdc
Enable Input Voltage Ven 7 Vdc
Sync Input Voltage Vsync 7 Vdc
Tabless
MO-078 8 Grams
Approximate Weight MO-078 10 Grams
SIP 11 Grams
Flat Pack 75 Grams
Operating Temperature Range, Base of Package Tc -55 to +125 °C
Storage Temperature Range (<100 hrs cumulative) Tstg -65 to 150 °C
Storage Temperature Range Tstg -65 to 125 °C
THERMAL CHARACTERISTICS
Parameters / Test Conditions Symbol Value Unit
Thermal Resistance, Junction-to-Case, MO-078 package RθJC 2.5 °C/W
Thermal Resistance, Junction-to-Case, SIP RθJC 5 °C/W
Thermal Resistance, Junction-to-Case Flat Pack RθJC 4.5 °C/W
TECHNICAL DATA SHEET
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SINGLE and QUAD 3 Amp & 4 Amp
POL REGULATORS
T4-LDS-0117 Rev. 9 (110370) Page 3 of 17
Table 2 – ELECTRICAL CHARACTERISTICS (See notes on page 4)
(TA = -55°C to +125°C unless otherwise noted)
Parameters / Test Conditions Symbol Value Unit
Min. Nom Max.
Minimum input Voltage
Io = 2.5A Vin(min) 4.5 V
Output Voltage Accuracy (Note 5)
Vo = 1.21V Vout -1.65 +1.65 %
Line regulation (Note 5)
4.5V < Vin < 6V
Vo = 1.21V Kvi -0.5 +0.5 %
Load regulation (Notes 5, 10)
1A < Iout < 3A (2A for MHP8565) Kvo -1 +1 %
Synchronizing range (Note 6)
10% < Duty cycle < 90% Fsync 580 1000 KHz
Sync threshold (Note 6) Vsync 1.5 2.2 V
Short Circuit Current Limit
Vo = 2.5V Isc 6 A
Ripple Rejection (Note 7)
F = 120Hz, Iout = 50mA rr 55 dB
Enable pin current in shutdown mode
Venable = 0V Ishdn -75 uA
Input Voltage on Enable pin to guarantee shutdown
(Note 4) Vshdn 0.13 0.40 0.60 V
Operating Frequency
Singles
f
500 KHz
Quad 667
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T4-LDS-0117 Rev. 9 (110370) Page 4 of 17
Table 3 – MODEL NUMBER FUNCTIONALITY CHART
MODEL NUMBER NOTES
PACKAGE TYPE OUTPUT TYPE OTHER FUNCTIONALLTY FORMER P/N
MO-078
SIP
Flat
Pack
Adj
Fixed
Note C
Remote
Sense
Note C
Enable
Pin
Parallelable
Note A
Output
Volt
Range
P
ackage
Body
Internal
Compen-
sation
MHP8565A$& 3 Amp Series 9 9 9 1.21–4V 9 SAT8565A-3$T-ADJ
MHP8565P$& 3 Amp Series 9 9 NO 9 1.21–4V Ground 9 SAT8565P-3$T-ADJ
MHP8564A$& 4 Amp Series 9 9 9 Note D 1.21–4V 9 SAT8564A-4$F-ADJ
MHP8564F$& 4 Amp Series 9 9 9 Note D 1.21–4V 9 SAT8564F-4$F-x.y
MHP8564R$& 4 Amp Series 9 9 9 Note D 1.21–4V 9 SAT8564R-4$F-x.y
MHP8564S$& 4 Am p Series 9 9 9 9 1.21–4V NO SAT8564S-4$F-ADJ
MHP8566A$& Quad 4 Amp 9 9 9 9 0–4V 9 SAT8566A-15$F-ADJ
Replace “$” with letter to denote required screening level
C = COTS NOTE A: Parallelable devices have a synchronizing pin so
that units can be driven out of phase from each other for the
purpose of input and output Voltage Bus ripple reduction.
Other functions necessary for Paralleling are also available
H = CLASS H
K = CLASS K
Replace “&” with lead lend option
= No lead bend NOTE C: Fixed and remote sense part numbers must be
appendaged wi t h fi xed value of outp ut Vol t age. Example:
MHP8564F$&-1.8 for a 1.8V fixed output.
-1 = SMT lead bend
-2 = lead bend down
-3 = lead bend up
NOTE D: Sync PIN is available. Other functions necessary
for Paralleling are not available.
Products in shaded areas of the main chart are under development
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T4-LDS-0117 Rev. 9 (110370) Page 5 of 17
Table 4 – SCREENING OPTIONS
TEST
C H K
MIL-STD-
883
Method
Cots Equivalent MIL-PRF-38534
(Note 3)
Element Evaluation N/A Class H Class K
Non-Destruct Wirebond Pull N/A Sample 100% 2023
Pre-Cap Visual N/A 100% 100% 2017
Temperature Cycle N/A 100% 100% 1010
Constant Acceleration N/A 100% 100% 2001
PIND N/A 100% 2020
Pre-Burn In Electrical N/A 100% 100%
Burn-In N/A
100%
(160 Hours) 100%
(320 Hours) 1015
Final Electrical Tests 100% (25°C) 100% 100%
Hermeticity (Fine and Gross Leak) 100% 100% 100% 1014
X-Ray N/A N/A Yes 2012
External Visual Sample 100% 100% 2009
Certified N/A Yes Yes
NOTES:
1. Internal series switch is self protected and is rated to conduct 4.5 Amps minimum. However, limitations on
internal components plus the characteristics of PWM operation conspire to reduce further the minimum output
current available, especially at output Voltages above Vin/2. Minimum available output current is guaranteed
to be as specified (3 Amps or 4 Amps, depending on model number) at output Voltages of 2.5V and below,
assuming a clean layout. At 3.3V output with a 5V input, reduce available minimum output current by 0.5
Amp.
2. Internal components are rated at +16 Volts maximum, and are therefore properly derated for operation at an
input of +5 Volts (minimum of 4.3V). For use at inputs as high as +12 – 15 Volts, please consult factory about
your derating requirements for a possible component change to allow properly derated operation.
3. Microsemi does not at this time have a MIL-PRF-38534 qualified radiation hardness assurance program.
4. If not used, or when on, Enable pin should be pulled up to a logic one (2.5V min, 7V max) through a resistor
of no more than 5K Ohms. Voltage on this pin to disable operation needs to be less than 0.4V.
5. Dynamic testing is accomplished at an output load of 1A, and at an output Voltage of 2.5, UOS.
6. Synchronizing pin, if available (see model chart) must be grounded if not used. Consult factory when
contemplating use of frequencies above 700 kHz. Pin input impedance is 40K Ohms.
7. Guaranteed by design.
8. All package outline dimensions are in inches.
9. Sequencer section of the Quad Device is rated at 100K RAD. POLs still operate without sequencer.
10. Output Voltage of 1.21V for MHP8566.
TECHNICAL DATA SHEET
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SINGLE and QUAD 3 Amp & 4 Amp
POL REGULATORS
T4-LDS-0117 Rev. 9 (110370) Page 6 of 17
APPLICATION CIRCUIT, 3Amp PRODUCT
Figure 1 – 3A Adjustable Configuration
Table 5 – Commonly Available 1% Resistor Values for Various Output Voltage for 3A & 4A Product
Vout (V) Radj (Ω) Vout (V) Radj (Ω)
1.21 0 2.8 3240
1.5 590 3.0 3650
1.8 1210 3.3 4320
2.0 1620 3.5 4750
2.2 2050 3.8 5360
2.5 2670 4.0 5760
Vout = Vref x (1+Radj / 2490), with Vref ~ 1.21 Volts
8565
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T4-LDS-0117 Rev. 9 (110370) Page 7 of 17
APPLICATION CIRCUITS, 4Amp PRODUCT
Figure 2 – Basic Fixed Regulator Version
Vout = Vref x (1 + Radj / 2490), with Vref ~ 1.21 Volts
Figure 3 – Adjustable Regulator Version
Figure 4 – Remote Sense Version
8564
8564
8564
8564
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T4-LDS-0117 Rev. 9 (110370) Page 8 of 17
Figure 5 – Parallel Configuration
* When employing only electrolytic output capacitors, the simplest compensation is a capacitor whose value is
1.5nF times the number of paralleled units. However, a slightly more complex compensation of a resistor of
value 1.6 kOhms divided by the number of units in parallel, in series with a capacitor of value 3900pF times the
number of units in parallel, generally leads to smoother output transitions with less overshoot. Output
capacitors should be as shown in Figure 2, one ea CWR29FC227 per regulator.
When employing ceramic output capacitors, the simplest compensation is a capacitor whose value is 22nF times
the number of units in parallel. This may, however produce an overshoot at turn on. User should check to see
that output turn-on, steady state, and transient behavior is acceptable.
GND IN SAT8564P
ENABLE IN MHP8564S
*
*
*
*
8564
8564
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T4-LDS-0117 Rev. 9 (110370) Page 9 of 17
APPLICATION CIRCUITS, QUAD REGULATOR
Figure 6 – Adjustable Regulators
Vout = Vref x (1 + Radj / 2490), with Vref ~ 1.21 Volts
8566
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T4-LDS-0117 Rev. 9 (110370) Page 10 of 17
Figure 7 – Parallel Operation – Triple Output
Vout = Vref x (1 + Radj / 2490), with Vref ~ 1.21 Volts
8566
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T4-LDS-0117 Rev. 9 (110370) Page 11 of 17
Figure 8 – Parallel Operation – Single Output
Vout = Vref x (1 + Radj / 2490), with Vref ~ 1.21 Volts
8566
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T4-LDS-0117 Rev. 9 (110370) Page 12 of 17
PACKAGE OUTLINES, 3Amp PRODUCT (8565)
* Some product now in the design Stage may use the case as a ground connection instead of PIN 2.
Pin No Pin Name Pin Description
1 Vin Input Voltage
2 GND Ground
3 Vout Output Voltage
4 Enable Enable Pin
5 Adjust Adjust pin for Adjustable Output
Case Isolated- No connection *
12345
Figure 9 - Standard Straight Package
12345
Figure 10 - Surface Mount Lead-Bend
12345
Figure 11 - Right angle Lead-Bend
Table 6 – Pin Assignments for 3Amp Product
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T4-LDS-0117 Rev. 9 (110370) Page 13 of 17
PACKAGE OUTLINES, 4Amp PRODUCT (8564)
Figure 12 - Standard Straight Leads Package
Table 7 – Normal Configurations
Figure 13 - Surface – Mount Lead-Bend
Table 8 – Parallelable Configuration
PIN # DESCRIPTION
1-4 Vin
5-9 GND
10 Shutdown
11 Sync
12 Adjust/ Sense*
13-16 Vout
* No connection for Fixed. Adjust pin
for adjustable configuration. Sense pin
for remote sense version.
PIN # DESCRIPTION
1-4 Vin
5 Enable
6-9 GND
10 Vcomp
11 Synch
12 Feedback (FB)
13-16 Vout
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T4-LDS-0117 Rev. 9 (110370) Page 14 of 17
Figure 14 - Right Angle Lead-Bend
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T4-LDS-0117 Rev. 9 (110370) Page 15 of 17
Figure 15 - Package Outline, Including Lead Bend Options and Pinout Configurations (8566)
Tolerances
.xxx is + / -0.005
.xx is + / -0.010
.140 MIN
.060 MIN
FOOT LENGHTH
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T4-LDS-0117 Rev. 9 (110370) Page 16 of 17
Table 9 - PIN ASSIGNMENTS (8566)
Note: All N/C pins should be connected to ground. The case should be connected to ground. VC1 through VC4 are
not ground pins, and are not to be connected to ground. These pins are used only during paralleling operation.
Please see application diagrams.
Pin No Pin Name Pin Description
1 N/C No Connection
2 +5V Sequencer supply voltage
3 ENABLE 1 Enable input- ch 1
4 FB1 Feedback pin ch1
5 Vin1 Input Voltage- ch1
6 Vin1 Input Voltage- ch1
7 GND1 Ground pin- ch1
8 GND1 Ground pin- ch1
9 OUT1 Output Voltage- ch1
10 OUT1 Output Voltage- ch1
11 VC1 Compensation- ch1
12 N/C No Connection
13 ENABLE 2 Enable input- ch 2
14 FB2 Feedback pin ch2
15 IN2 Input Voltage- ch2
16 IN2 Input Voltage- ch2
17 GND2 Ground pin- ch2
18 GND2 Ground pin- ch2
19 OUT2 Output Voltage- ch2
20 OUT2 Output Voltage- ch2
21 VC2 Compensation- ch2
Pin No Pin Name Pin Description
22 N/C No Connection
23 N/C No Connection
24 ENABLE 3 Enable ch 3
25 FB3 Feedback pin ch3
26 Vin3 Input Voltage- ch3
27 Vin3 Input Voltage- ch3
28 GND3 Ground pin- ch3
29 GND3 Ground pin- ch3
30 OUT3 Output Voltage- ch3
31 OUT3 Output Voltage- ch3
32 VC3 Compensation- ch3
33 N/C No Connection
34 ENABLE 4 Enable ch 4
35 FB4 Feedback pin ch4
36 Vin4 Input Voltage- ch4
37 Vin4 Input Voltage- ch4
38 GND4 Ground pin- ch4
39 GND4 Ground pin- ch4
40 OUT4 Output Voltage- ch4
41 OUT4 Output Voltage- ch4
42 VC4 Compensation- ch4
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T4-LDS-0117 Rev. 9 (110370) Page 17 of 17
Figure 16 – Soft Start Implementation
(Rss)(Css)(Vout)
Rise Time =
0.7
Example: with Rss = 47K and Css = 15nF, Rinse Time = 2.5ms
GND IN SAT8564P
ENABLE IN
MHP8564S
*
*
*
*
RH2222
A
RSS
2K CSS
8564
8564
