LMX2594EVM - TEXAS INSTRUMENTS

May, 2018 − Rev. 0

1Publication Order Number:

FAN48615/D

FAN48615

Fixed-Output Synchronous

TinyBoost) Regulator

Description

The FAN48615 is a low−power PWM only boost regulator

designed to provide a minimum voltage−regulated rail from a standard

single−cell Li−Ion battery and advanced battery chemistries. Even

below the minimum system battery voltage, the device maintains the

output voltage regulation for an output load current of 1000 mA. The

combination of built−in power transistors, synchronous rectification,

and low supply current suit the FAN48615 for battery−powered

applications.

The FAN48615 is available in a 9−bump, 0.4 mm pitch, (1.215 x

1.215 mm) Wafer−Level Chip−Scale Package (WLCSP).

Features

•Input Voltage Range: 2.7 V to 5.5 V

•Output Voltage: 5.25 V and 5.4 V

•1000 mA Max. Load Capability

•PWM Only

•Up to 97% Efficient

•Forced Pass−Through Operation via EN Pin

•Internal Synchronous Rectification

•True Load Disconnect

•Short−Circuit Protection

•Three External Components: 2016 (Metric) 0.47 mH Inductor,

0402 Input and 0603 Output Capacitors

•This is a Pb−Free Device

Applications

•Class−D Audio Amplifier

•Boost for Low−Voltage Li−Ion Batteries

•Smart Phones, Tablets, Portable Devices

•RF Applications

•NFC Applications

Figure 1. Typical Application

VOUT

PGND

OUT

VIN

CIN

SYS

TEM

LOAD

AGND

FAN48615 10 mF

10 mF

0.47 mH

Battery

ORDERING INFORMATION

Part Number VOUT Operating Temperature Package Packing Device Marking

FAN48615UC08X 5.25 V −40°C to 85°C 9−Bump, 0.4 mm Pitch,

WLCSP Package

3000 / Tape & Reel KY

FAN48615UC11X 5.40 V KZ

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WLCSP9

CASE 567QW

MARKING DIAGRAM

(Note: Microdot may be in either location)

AWLYYWWG

KY / KZ = Specific Device Code

F = Fab Indicator

A = Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

G= Pb−Free Package

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Block Diagram

Figure 2. IC Block Diagram

Q2B Q2A

COUT

VOUT

Modulator

Logic & Control

VIN

CIN

Synchronous

Rectifier

Control

PGND

AGND

Table 1. RECOMMENDED COMPONENTS

Component Description Vendor Parameter Typical Value Unit

L1 20%, 5.3 A, 2016, 1.0 mm Height DFE201610E−R47M

TOKO

Inductance 470 nH

DCR (Series R) 26 mW

CIN 20%, 6.3 V, X5R, 0402 (1005) C1005X5R0J106M050BC

TDK

Capacitance 10 mF

COUT 20%, 10 V, X5R, 0603 (1608) C1608X5R1A106K080AC

TDK

Capacitance 10 mF

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Pin Configuration

Figure 3. Pin Assignment

Top View

(Bumps Down)

VOUT

VIN

PGND

AGND

VOUT

VIN

PGND

AGND

Bottom View

(Bumps Up)

Pin Definitions

Table 2. PIN DEFINITIONS

Pin # Name Description

A1 VOUT Output Voltage. This pin is the output voltage terminal; connect directly to COUT

A3 VIN Input Voltage. Connect to Li−Ion battery input power source and CIN.

B1 SW Switching Node. Connect to inductor.

B3 EN Enable. When this pin is HIGH, the circuit is enabled. After part is engaged, pin forces

part into Forced−Pass−Through Mode when EN pin is pulled LOW.

C1 PGND Power Ground. This is the power return for the IC. COUT capacitor should be returned

with the shortest path possible to these pins.

C3 AGND Analog Ground. This is the signal ground reference for the IC. All voltage levels are

measured with respect to this pin − connect to PGND at a single point.

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Table 3. ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Min Max Unit

VIN Voltage on VIN Pin −0.3 6.0 V

VOUT Voltage on VOUT Pin 6.0 V

VSW SW Node DC −0.3 6.0 V

Transient: 10 ns, 3 MHz −1.0 8.0

VCC Voltage on Other Pins −0.3 6.0(1) V

ESD Electrostatic Discharge Protection Level Human Body Model, ANSI/ESDA/

JEDEC JS−001−2012

2.0 kV

Charged Device Model, JESD22−C101 1.0

TJJunction Temperature −40 150 °C

TSTG Storage Temperature −65 150 °C

TLLead Soldering Temperature, 10 Seconds 260 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Lesser of 6.0 V or VIN + 0.3 V.

Table 4. RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

VIN Supply Voltage for Boost & Auto Pass Through Operation (2) 2.7 5.5 V

IOUT Maximum Output Current 1000 mA

TAAmbient Temperature −40 85 °C

TJJunction Temperature −40 125 °C

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

2. When VIN nears VOUT the part will automatically go into pass through mode, depending on load current.

Table 5. THERMAL PROPERTIES

Symbol Parameter Typical Unit

qJA Junction−to−Ambient Thermal Resistance 50 °C/W

NOTE: Junction−to−ambient thermal resistance is a function of application and board layout. This data is measured with four−layer 2s2p

boards with vias in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed junction temperature,

TJ(max), at a given ambient temperature, TA.

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Table 6. ELECTRICAL CHARACTERISTICS

Recommended operating conditions, unless otherwise noted, circuit per Figure 1, VOUT = 5.40 V. Typical, minimum and maximum values

are given at VIN = 3.6 V, TA = 25°C, −40°C and +85°C.

Symbol Parameter Conditions Min Typ Max Unit

Power Supply

IQVIN Quiescent Current IOUT = 0 mA, EN = 1.8 V, No Switching 95 mA

Forced Pass−Through EN = 0 V, VOUT = VIN 3.5

VUVLO Under−Voltage Lockout VIN Rising 2.20 V

VUVLO_HYS Under−Voltage Lockout Hysteresis 150 mV

Inputs

VIH Enable HIGH Voltage 1.05 V

VIL Enable LOW Voltage 0.4 V

Outputs

VREG Output Voltage Accuracy DC (3) 2.7 V ≤ VIN ≤ 4.5 V −2 +2 %

Timing

fSW Switching Frequency IOUT = 300 mA 1.8 2.3 2.8 MHz

tSS (4) EN HIGH to 95% of Regulation IOUT = 150 mA 440 ms

tRST (4) FAULT Restart Timer 20 ms

Power Stage

RDS(ON)N N−Channel Boost Switch RDS(ON) 63 mW

RDS(ON)P P−Channel Sync. Rectifier RDS(ON) 52 mW

3. DC ILOAD from 0 to 1 A. VOUT measured from mid−point of output voltage ripple. Effective capacitance of COUT ≥ 2.2 mF.

4. Guaranteed by design and characterization; not tested in production.

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Typical Performance Characteristics

Unless otherwise specified; VIN = 3.8 V, VOUT = 5.40 V,

TA = 25°C, and circuit according to Figure 1.

Components: CIN =10mF (0402, X5R, 6.3 V,

C1005X5R0J106M050BC), COUT = 10 mF (0603, X5R,

10 V, C1608X5R1A106K080AC), L1 = 470 nH (2016,

26 mW, DFE201610E−R47M ).

Figure 4. Quiescent Current (Switching) vs. Input

Voltage and Temperature

Figure 5. Pass−Through Current vs. Input Voltage

and Temperature

Figure 6. Efficiency vs. Load Current and Input Voltage Figure 7. Efficiency vs. Load Current and Temperature

Figure 8. Switching Frequency vs. Load Current and

Input Voltage

Figure 9. Switching Frequency vs. Load Current and

Temperature

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Typical Performance Characteristics

Unless otherwise specified; VIN = 3.8 V, VOUT = 5.40 V,

TA = 25°C, and circuit according to Figure 1.

Components: CIN =10mF (0402, X5R, 6.3 V,

C1005X5R0J106M050BC), COUT = 10 mF (0603, X5R,

10 V, C1608X5R1A106K080AC), L1 = 470 nH (2016,

26 mW, DFE201610E−R47M ).

Figure 10. Output Regulation vs. Load Current and

Input Voltage

Figure 11. Output Regulation vs. Load Current and

Temperature

Figure 12. Output Ripple vs. Load Current and Input

Voltage

Figure 13. Output Ripple vs. Load Current and

Temperature

Figure 14. Load Transient, 3.6 VIN, 100 e 200 mA,

1 ms Edge

Figure 15. Line Transient, 50 mA, 3.2 V e 3.9 V,

10 ms Edge

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Typical Performance Characteristics

Unless otherwise specified; VIN = 3.8 V, VOUT = 5.40 V,

TA = 25°C, and circuit according to Figure 1.

Components: CIN =10mF (0402, X5R, 6.3 V,

C1005X5R0J106M050BC), COUT = 10 mF (0603, X5R,

10 V, C1608X5R1A106K080AC), L1 = 470 nH (2016,

26 mW, DFE201610E−R47M ).

Figure 16. Startup, 150 mA Load Figure 17. Fault Restart

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CIRCUIT DESCRIPTION

FAN48615 is a synchronous PWM Only boost regulator.

The regulator’s Pass−Through Mode automatically

activates when VIN is above the boost regulator’s set point.

Table 7. OPERATING MODES

Mode Description Invoked When:

LIN Linear Startup VIN > VOUT

SS Boost Soft−Start VIN < VOUT < VOUT(TARGET)

BST Boost Operating Mode VOUT = VOUT(TARGET)

PT Pass−Through Mode VIN > VOUT(TARGET) or

when EN is pulled LOW

after initial startup

Boost Mode Regulation

The FAN48615 uses a current−mode modulator to

achieve excellent transient response.

Table 8. BOOST STARTUP SEQUENCE

Start

Mode Entry Exit

End

Mode

Timeout

(ms)

LIN1 VIN >

VUVLO,

EN = 1

VOUT > VIN − 300 mV SS

Timeout LIN2 512

LIN2 LIN1 Exit VOUT > VIN − 300 mV SS

Timeout FAULT 1024

SS LIN1 or

LIN2 Exit

VOUT =

VOUT(TARGET)

BST

Overload Timeout FAULT 64

LIN Mode

When EN is HIGH and VIN > VUVLO, the regulator first

attempts to bring VOUT within 300 mV of VIN by using the

internal fixed−current source from VIN (Q2). The current is

limited to the LIN1 set point.

If VOUT reaches VIN−300 mV during LIN1 Mode, the SS

Mode is initiated. Otherwise, LIN1 times out after 512 ms

and LIN2 Mode is entered.

In LIN2 Mode, the current source is incremented. If VOUT

fails to reach VIN−300 mV after 1024 ms, a fault condition

is declared and the device waits 20 ms to attempt an

automatic restart.

Soft−Start (SS) Mode

Upon the successful completion of LIN Mode (VOUT ≥

VIN− 300 mV), the regulator begins switching with boost

pulses current limited to 50% of nominal level.

During SS Mode, if VOUT fails to reach regulation during

the SS ramp sequence for more than 64 ms, a fault is declared.

If large COUT is used, the reference is automatically stepped

slower to avoid excessive input current draw.

Boost (BST) Mode

This is a normal operating mode of the regulator.

Pass−Through Mode

The device allows the user to force the device in Forced

Pass−Through Mode through the EN pin. If the EN pin is

pulled HIGH, the device starts operating in Boost Mode.

Once the EN pin is pulled LOW, the device is forced into

Pass−Through Mode. To disable the device, the input supply

voltage must be removed. The device cannot startup in

Forced Pass−Through Mode (see Figure 18). During

startup, keep the EN pulled HIGH for at least 350 ms before

pulling it LOW in order to make sure that the device enters

Pass− Through Mode reliably.

In normal operation, the device automatically transitions

from Boost Mode to Pass−Through Mode if VIN goes above

the target VOUT. In Pass−Through Mode, the device fully

enhances Q2 to provide a very low impedance path from

VIN to VOUT. Entry to the Pass−Through Mode is triggered

by condition where VIN > VOUT and no switching has

occurred during the past 5 ms. To soften the entry into

Pass−Through Mode, Q2 is driven as a linear current source

for the first 5 ms. Pass−Through Mode exit is triggered when

VOUT reaches the target VOUT voltage. During Automatic

Pass−Through Mode, the device is short−circuit protected

by a voltage comparator tracking the voltage drop from VIN

to VOUT; if the drop exceeds 300 mV, a fault is declared.

Figure 18. Pass−Through Profile

VOUT VIN

Force Pass−Through

mode

VIN 0V

VEN 0V

tSS

Boost mode

Part Shuts

down

VBOOST

Current Limit Protection

The FAN48615 has valley current limit protection in case

of overload situations. The valley current limit will prevent

high current from causing damage to the IC and the inductor.

The current limit is halved during soft−start.

When starting into a fault condition, the input current will

be limited by LIN1 and LIN2 current threshold.

Fault State

The regulator enters Fault State under any of the following

conditions:

•VOUT fails to achieve the voltage required to advance

from LIN Mode to SS Mode.

•VOUT fails to achieve the voltage required to advance

from SS Mode to BST Mode.

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•Boost current limit triggers for 2 ms during BST Mode.

•VIN − VOUT > 300 mV; this fault can occur only after

successful completion of the soft−start sequence.

•VIN < VUVLO

Once a fault is triggered, the regulator stops switching and

presents a high−impedance path between VIN and VOUT.

After waiting 20 ms, an automatic restart is attempted.

Over−Temperature

The regulator shuts down if the die temperature exceeds

150°C and restarts when the IC cools by ~20°C.

Layout Recommendation

The layout recommendations below highlight various

top−copper pours by using different colors.

To minimize spikes at VOUT, COUT must be placed as

close as possible to PGND and VOUT, as shown in

Figure 19.

For best thermal performance, maximize the pour area for

all planes other than SW. The ground pour, especially,

should fill all available PCB surface area and be tied to

internal layers with a cluster of thermal vias.

Figure 19. Recommended Layout

Table 9. PRODUCT−SPECIFIC PACKAGE DIMENSIONS

The following information applies to the WLCSP package dimensions on the next page.

Product D (mm) E (mm) X (mm) Y (mm)

FAN48615UC08X 1.215 ± 0.030 1.215 ± 0.030 0.2075 0.2075

All other brand names and product names appearing in this document are registered trademarks or trademarks of their respective holders.

WLCSP9 1.215x1.215x0.581

CASE 567QW

ISSUE O DATE 31 OCT 201

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

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