Page 1 of 8
Document No. 70-0106-03 www.psemi.com ©2005 Peregrine Semic onduct or Corp. All ri ghts res erved.
VDD = 3.0 V, -40° C TA 85° C, unless otherwise specified
The PE3511 is a high-performance static UltraCMOS™
prescaler with a fixed divide ratio of 2. Its operating frequency
range is DC to 1500 MHz. The PE3511 operates on a nominal
3 V supply and draws only 8 mA. The input and output
interfaces support both AC-coupled, low-Z RF as well as direct
connection to low voltage positive logic devices. It is packaged
in a small 6-lead SC-70 and is ideal for frequency scaling
solutions
The PE3511 is manufactured in Peregrine’s patented Ultra
Thin Silicon (UTSi©) CMOS process, offering th e performance
of GaAs with the economy and integration of conventional
CMOS.
Product Specification
1500 MHz Low Power UltraCMOS™
Divide-by-2 Prescaler
Product Description
Figure 1. Functional Schematic Diagram
PE3511
Features
• DC to 1500 MHz operation
• Fixed divide ratio of 2
• Low-power consumption: 8 mA typical
@ 3V
• RF or LV Digital Interface
• Ultra- small package: 6- lead SC-70
Table 1. Electrical Specifications (ZS = ZL = 50 )
Figure 2. Package Type
6-lead SC70
PREAMP
DRIVER OUTPUT BUFFER
D Q
CLK
QB
IN OUT
Parameter Conditions Minimum Typical Maximum Units
Supply Voltage 2.85 3.0 3.15 V
Supply Current 8 12 mA
Input Frequency (Fin) DC 1500 MHz
Input Power (Pin) DC < Fin 1000 MHz -10 +10 dBm
1000 MHz < Fin 1500 0 dBm
Output Power (Pout) DC < Fin 1500 MHz 2 dBm
Product Specific ation
PE3511
Page 2 of 8
©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0106-03 UltraCM O S™ RFIC Soluti o ns
Table 2. DC Electrical Characteristics (-40° C ≤ TA ≤ 85° C)
Symbol Parameter Condition Typical Unit
VIH High Level Input Voltage 2.7 V VDD 3.3 V 2.0 V
VIL Low Level Input Voltage 2.7 V VDD 3.3 V 0.8 V
VOH High Level Output Voltage VDD = 2.7 V; IOH = 2.9 mA 2.2 V
VOL Low Level Output Voltage VDD = 2.7 V; IOL = 2.6 mA 0.4 V
Symbol Parameter Condition* Typical Unit
tPHL Propagation Delay
(High to Low) 50 MHz Pulse Train Input;
CL = 10 pF, RL = 500
2.6
ns
tPLH Propagation Delay
(Low to High) 50 MHz Pulse Train Input;
CL = 10 pF, RL = 500
2.8
ns
tr Output Rise Time
(10% to 90%) 50 MHz Pulse Train Input;
CL = 10 pF, RL = 500
2.2
ns
tf Output Fall Time
(90% to 10%) 50 MHz Pulse Train Input;
CL = 10 pF, RL = 500
2.1
ns
Frequency Condition Typical Unit
50 MHz 200 mVp-p Sinusoidal Input;
CL = 10 pF, RL = 500 2.3 Vp-p
500 MHz 200 mVp-p Sinusoidal Input;
CL = 10 pF, RL = 500 1.9 Vp-p
1500 MHz 200 mVp-p Sinusoidal Input;
CL = 10 pF, RL = 500 1.6 Vp-p
Table 3. AC Characteristics (-40° C ≤ TA ≤ 85° C)
Table 4. Typical Output Swing (VDD = 2.7 V)
* See figure 5 for AC test circuit
Product Specific ation
PE3511
Page 3 of 8
©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0106-03 www.psemi.com
Table 5. Pin Descriptions
Table 6. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 6.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMO S™
devices are immune to latch-up.
Figure 3. Pin Configuration (Top View)
Device Functional Considerations
The PE3511 divides an input signal, up to a
frequency of 1500 MHz, by a factor of two thereby
producing an output frequency at half the input
frequency. To work properly with low impedance,
ground referenced interfaces, the input and output
signals (pins 3 & 6) must be AC coupled via an
external capacitor, as shown in the test circuit in
Figure 4.
The ground pattern on the board should be m ade
as wide as possible to minimize ground
impedance. See Figure 9 for a layout example.
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Exposure
to absolute maximum ratings for extended periods
may affect device reliability.
.
511
1
2
3 4
5
6
OUT
GND
V
DD
NC
GND
IN
pin 1
SC-70
Pin
No. Pin
Name Description
1 N/C No Connect. This pin should be left open.
2 GND Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
3 IN Input signal pin. DC blocking capac i tor
required (100 pF typical).
4 VDD Power supply pin. Bypassi ng is required.
5 GND Ground pin.
6 OUT Divided frequency output pin. DC blocking
capacitor required (100 pF typical).
Symbol Parameter/Conditions Min Max Units
VDD Supply voltage 4.0 V
Pin Input Power 13 dBm
TST Storage temperature range -65 150 °C
TOP Operating temperature
range -40 85 °C
VESD ESD voltage (Human Body
Model) 2000 V
Product Specific ation
PE3511
Page 4 of 8
©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0106-03 UltraCM O S™ RFIC Soluti o ns
Figure 4. Test Circuit Block Diagram
Figure 5. AC Test Circuit
GND
IN VDD
GND
OUTN/C1
2
34
5
6
PE3511
50 Ohm
100 pF
100 pF 1000 pF
VDD
3V +/- 0.15 V
100 pF
50 Ohm
Spectrum
Analyzer
Signal
Generator
PE3511
Pulse
Generator
R
L
C
L
R
T
V
DD
R
T =
Zout of pulse generator
(usually 50 ohm)
Product Specific ation
PE3511
Page 5 of 8
©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0106-03 www.psemi.com
Figure 6. Input Sensitivity Figure 7. Device Current
Typical Performance Data: VDD = 3.0 V
Figure 8. Output Power
Product Specific ation
PE3511
Page 6 of 8
©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0106-03 UltraCM O S™ RFIC Soluti o ns
Evaluation Kit
Figure 9. Evaluation Board Layouts
Figure 10. Evaluation Board Schematic
Peregrine Specification 102/0189
Peregrine Specification 101/0110
Applications Support
If you have a problem with your evaluat ion kit or if
you have appl icat ions questions call (858) 7 31-9400
and ask for appl ications support. You may also con-
tact us by fax or e-mail:
Fax: (858) 731-94 99
E-Mail: help@psem i. com
Evaluation Kit Operation
The SC- 70 Prescaler Evaluatio n Board was
designed t o hel p cust omers evaluate the PE3511
divide-by-2 prescaler. On this board, the device
input (pin 3) is c onnected to connector J1 t hrough a
50 transmission line. A series capacitor (C1)
provides the necessary DC block for the dev ice
input. A value of 100 pF was used for this b oard
layout; ot her applications may require a different
value.
The device output (pin 6) is connected to J3 through
a 50 transmission li ne. A series capacitor (C5)
provides the necessary DC block for the dev ice
output. This capacitor value must be ch osen to have
a low impedance at the desired out put f r equency of
the device. A value of 100 pF was chosen for t he
evaluation board. At both input and output, select a
capacitor value that offers low series reactance whi le
ensuring that any parasitic resonances are well
above the operating bandwidth.
The board is const ructed of a two-layer F R4 material
with a total thickness of 0.031”. The bottom layer
provides ground for t he RF transmission lines. The
transmiss i on l ine s were designed using a coplanar
wavegu ide above ground pla ne model with trace
width of 0. 030”, t r ace gaps of 0.007”, dielect ric
thickness of 0.028”, metal thickn ess of 0.0014”, and
r of 4.4. Note t hat t he predominate mode of these
transmis si on lines is co planar waveguid e. Liberal
numbers of plat ed through holes unite the top and
bottom ground areas for best performance.
J6 provides D C po wer t o the device via pin 4. Two
decoupling capacitors (100 pF, 1000 pF) are
included on t his trace. It is the customer’s
responsibi lit y t o det ermine proper supply deco upling
for their design application.
Product Specific ation
PE3511
Page 7 of 8
©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0106-03 www.psemi.com
Table 7. Ordering Information
Figure 11. Package Drawing
6-lead SC-70
1.80
2.20
0.65
BSC
1.80
2.40
1.15
1.35
0.15
0.30
0.80
1.10
0.80
1.00
0.10
0.30
0.10
0.40 0.10
0.18
0.00
0.10
Order Code Part Marking Description Package Shipping Method
3511-01 511 PE 3511-06S C70-7680A 6-lead SC-70 7680 units / Canister
3511-02 511 PE3511-06SC70-3000C 6-lead SC-70 3000 units / T&R
3511-00 PE3511-EK PE3511-06SC70-EK Evaluation Kit 1 / Box
3511-51 511 PE3511G-06SC70-7680A Green 6-lead SC-70 7680 units / Canister
3511-52 511 PE3511G-06SC70-3000C Green 6-lead SC-70 3000 units / T&R
Product Specific ation
PE3511
Page 8 of 8
©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0106-03 UltraCM O S™ RFIC Soluti o ns
Sales Offices
The Americas
Peregrine Semiconductor Corp.
9450 Carroll Park Drive
San Diego, CA 92121
Tel 858-731-9400
Fax 858-731-9499
North Asia Pacifi c
Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Europe
Peregrine Semiconductor Europe
Commercial Products:
Bâtiment Maine
13-15 rue des Quatre Vents
F- 92380 Garches, France
Tel: +33-1-47-41-91-73
Fax : +33-1-47-41-91-73
Space and Defense Products:
180 Rue Jean de Guiramand
13852 Aix-En-Provence cedex 3, France
Tel: +33(0) 4 4239 3361
Fax: +33(0) 4 4239 7227
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a fo rmative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final da ta. In the event Peregrine
decides to change the specifications , Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the fail ure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS is a trademark of Peregrine Semiconductor
Corp.
South Asia Pacific
Peregrine Semiconductor
28G, Times Square,
No. 500 Zhangyang Road,
Shanghai, 200122, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
