PD - 97031D IRF2907ZS-7PPbF Features l l l l l HEXFET(R) Power MOSFET Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax D RDS(on) = 3.8m G Description This HEXFET(R) Power MOSFET utilizes the latest processing techniques and advanced packaging technology to achieve extremely low on-resistance and world -class current ratings. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Server & Telecom OR'ing and low voltage Motor Drive Applications. VDSS = 75V ID = 160A S S (Pin 2, 3, 5, 6, 7) G (Pin 1) Absolute Maximum Ratings Parameter Max. Units ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) 180 A ID @ TC = 100C Continuous Drain Current, VGS @ 10V (See Fig. 9) 120 ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Package Limited) 160 IDM Pulsed Drain Current 700 PD @TC = 25C Maximum Power Dissipation 300 W Linear Derating Factor 2.0 20 W/C V 160 mJ VGS EAS c Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) EAS (tested) Single Pulse Avalanche Energy Tested Value IAR Avalanche Current EAR Repetitive Avalanche Energy TJ Operating Junction and TSTG Storage Temperature Range c h d g 300 (1.6mm from case ) 10 lbf*in (1.1N*m) Thermal Resistance RCS C -55 to + 175 Mounting torque, 6-32 or M3 screw Junction-to-Case j Parameter Typ. Max. Units --- 0.50 C/W --- Case-to-Sink, Flat, Greased Surface 0.50 RJA Junction-to-Ambient --- 62 RJA Junction-to-Ambient (PCB Mount, steady state) --- 40 j A mJ Soldering Temperature, for 10 seconds RJC 410 See Fig.12a,12b,15,16 ij HEXFET(R) is a registered trademark of International Rectifier. www.irf.com 1 07/23/10 IRF2907ZS-7PPbF Static @ TJ = 25C (unless otherwise specified) Parameter V(BR)DSS VDSS/TJ RDS(on) SMD VGS(th) Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage gfs IDSS Forward Transconductance Drain-to-Source Leakage Current IGSS Min. Typ. Max. Units --- 0.066 --- --- Qg Qgs Qgd td(on) tr td(off) tf LD Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance 75 --- --- 2.0 94 --- --- --- --- --- --- --- --- --- --- --- --- 3.0 --- --- --- --- --- --- 170 55 66 21 90 92 44 4.5 3.8 4.0 --- 20 250 200 -200 260 --- --- --- --- --- --- --- LS Internal Source Inductance --- 7.5 --- Ciss Coss Crss Coss Coss Coss eff. Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance --- --- --- --- --- --- 7580 970 540 3750 650 1110 --- --- --- --- --- --- Conditions V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 110A V VDS = VGS, ID = 250A S VDS = 25V, ID = 110A A VDS = 75V, VGS = 0V VDS = 75V, VGS = 0V, TJ = 125C nA VGS = 20V VGS = -20V nC ID = 110A VDS = 60V VGS = 10V ns VDD = 38V ID = 110A RG = 2.6 VGS = 10V D nH Between lead, e e d 6mm (0.25in.) from package pF G S and center of die contact VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 60V, = 1.0MHz VGS = 0V, VDS = 0V to 60V Diode Characteristics Parameter Min. Typ. Max. Units Conditions IS Continuous Source Current --- --- 160 ISM (Body Diode) Pulsed Source Current --- --- 700 showing the integral reverse VSD trr Qrr (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge 1.3 53 60 S p-n junction diode. TJ = 25C, IS = 110A, VGS = 0V TJ = 25C, IF = 110A, VDD = 38V di/dt = 100A/s c MOSFET symbol A --- --- --- --- 35 40 V ns nC D G e e Notes: Repetitive rating; pulse width limited by Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive max. junction temperature. (See fig. 11). avalanche performance. Limited by TJmax, starting TJ = 25C, This value determined from sample failure population. 100% L=0.026mH, R G = 25, IAS = 110A, VGS =10V. tested to this value in production. Part not recommended for use above this value. This is applied to D2Pak, when mounted on 1" square PCB Pulse width 1.0ms; duty cycle 2%. ( FR-4 or G-10 Material ). For recommended footprint and Coss eff. is a fixed capacitance that gives the same soldering techniques refer to application note #AN-994. charging time as Coss while VDS is rising from 0 to 80% R is measured at T of approximately 90C. J VDSS. 2 www.irf.com IRF2907ZS-7PPbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 100 4.5V 10 4.5V 60s PULSE WIDTH 60s PULSE WIDTH Tj = 175C Tj = 25C 10 1 0.1 1 10 100 0.1 1000 Fig 1. Typical Output Characteristics 10 100 1000 Fig 2. Typical Output Characteristics 200 Gfs, Forward Transconductance (S) 1000 ID, Drain-to-Source Current () 1 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) 100 T J = 25C 10 T J = 175C 1 VDS = 25V 60s PULSE WIDTH 0.1 1 2 3 4 5 6 7 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com T J = 25C 150 T J = 175C 100 50 V DS = 10V 380s PULSE WIDTH 0 8 0 25 50 75 100 125 150 ID,Drain-to-Source Current (A) Fig 4. Typical Forward Transconductance vs. Drain Current 3 IRF2907ZS-7PPbF 100000 12.0 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd VGS, Gate-to-Source Voltage (V) ID= 110A C, Capacitance(pF) C oss = C ds + C gd 10000 Ciss Coss 1000 Crss 100 10.0 VDS= 60V VDS= 38V VDS= 15V 8.0 6.0 4.0 2.0 0.0 1 10 100 0 VDS, Drain-to-Source Voltage (V) 50 100 150 200 QG Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 10000 1000 100 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) T J = 175C T J = 25C 10 1 1000 1msec 100sec 100 LIMITED BY PACKAGE 10 1 Tc = 25C Tj = 175C Single Pulse VGS = 0V DC 0.1 0.1 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 10msec 1.4 0.1 1.0 10.0 100.0 VDS, Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRF2907ZS-7PPbF 200 RDS(on) , Drain-to-Source On Resistance (Normalized) 3.0 Limited By Package ID, Drain Current (A) 160 120 80 40 ID = 180A VGS = 10V 2.5 2.0 1.5 1.0 0.5 0 25 50 75 100 125 150 -60 -40 -20 0 20 40 60 80 100120140160180 175 T J , Junction Temperature (C) T C , Case Temperature (C) Fig 10. Normalized On-Resistance vs. Temperature Fig 9. Maximum Drain Current vs. Case Temperature 1 Thermal Response ( Z thJC ) D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 J SINGLE PULSE ( THERMAL RESPONSE ) 0.001 R1 R1 J 1 1 R2 R2 2 2 Ci= i/Ri Ci i/Ri R3 R3 3 C 3 Ri (C/W) i (sec) 0.1072 0.000096 0.2787 0.1143 0.002614 0.013847 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF2907ZS-7PPbF 15V VGS 20V + V - DD IAS A 0.01 tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS , Single Pulse Avalanche Energy (mJ) D.U.T RG 700 DRIVER L VDS ID 24A 34A BOTTOM 110A 600 TOP 500 400 300 200 100 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) I AS Fig 12c. Maximum Avalanche Energy vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V QGS QGD VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50K 12V .2F .3F D.U.T. + V - DS VGS(th) Gate threshold Voltage (V) 4.5 4.0 3.5 3.0 2.5 2.0 ID = 250A ID = 1.0mA ID = 1.0A 1.5 VGS 1.0 3mA -75 -50 -25 0 IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 25 50 75 100 125 150 175 200 T J , Temperature ( C ) Fig 14. Threshold Voltage vs. Temperature www.irf.com IRF2907ZS-7PPbF 1000 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses 100 0.01 0.05 10 0.10 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 200 TOP Single Pulse BOTTOM 1% Duty Cycle ID = 110A 150 100 50 0 25 50 75 100 125 150 Starting T J , Junction Temperature (C) Fig 16. Maximum Avalanche Energy vs. Temperature www.irf.com 175 Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asT jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav 7 IRF2907ZS-7PPbF D.U.T Driver Gate Drive + - P.W. + D.U.T. ISD Waveform Reverse Recovery Current + V DD * dv/dt controlled by RG * Driver same type as D.U.T. * I SD controlled by Duty Factor "D" * D.U.T. - Device Under Test P.W. Period * RG D= VGS=10V Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - Period + Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage - Body Diode VDD Forward Drop Inductor Curent ISD Ripple 5% * VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V DS V GS RG RD D.U.T. + -V DD 10V Pulse Width 1 s Duty Factor 0.1 % Fig 18a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr t d(off) tf Fig 18b. Switching Time Waveforms 8 www.irf.com IRF2907ZS-7PPbF D2Pak - 7 Pin Package Outline Dimensions are shown in millimeters (inches) D2Pak - 7 Pin Part Marking Information 14 Notes: 1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/auto/ 2. For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com 9 IRF2907ZS-7PPbF D2Pak - 7 Pin Tape and Reel Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IRs Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 07/2010 10 www.irf.com