INTEGRATED CIRCUITS DATA SHEET 74ALVC244 Octal buffer/line driver; 3-state Preliminary specification File under Integrated Circuits, IC24 2001 Oct 30 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 FEATURES DESCRIPTION * Wide supply voltage range of 1.65 to 3.6 V The 74ALVC244 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. * Complies with JEDEC standard: - JESD8-7 (1.65 to 1.95 V) The 74ALVC244 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a HIGH impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. - JESD8-5 (2.3 to 2.7 V) - JESD8B/JESD36 (2.7 to 3.6 V). * 3.6 V tolerant inputs/outputs * CMOS LOW power consumption * Direct interface with TTL levels (2.7 to 3.6 V) * Power-down mode * Latch-up performance exceeds 250 mA * ESD protection: - Human Body Model (HBM) (A 114-A) exceeds 2000 V - Machine Model (MM) (A 115-A) exceeds 200 V. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C. SYMBOL tPHL/tPLH PARAMETER propagation delay inputs nAn to output nYn CI input capacitance CPD power dissipation capacitance per buffer CONDITIONS UNIT VCC = 1.8 V; CL = 30 pF; RL = 1 k - ns VCC = 2.5 V; CL = 30 pF; RL = 500 - ns VCC = 2.7 V; CL = 50 pF; RL = 500 - ns VCC = 3.3 V; CL = 50 pF; RL = 500 - ns 3.5 pF VCC = 3.3 V; notes 1 and 2 20 pF Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. 2001 Oct 30 TYPICAL 2 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 FUNCTION TABLE See note 1. INPUT OUTPUT nOE nAn nYn L L L L H H H X Z Note 1. H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = HIGH-impedance OFF-state. ORDERING INFORMATION PACKAGES TYPE NUMBER PINS PACKAGE MATERIAL CODE 74ALVC244D 20 SO plastic SOT163-1 74ALVC244PW 20 TSSOP plastic SOT360-1 PINNING PIN SYMBOL DESCRIPTION 1 1OE output enable input (active LOW) 2, 4, 6 and 8 1A0 to 1A3 data inputs 3, 5, 7 and 9 2Y0 to 2Y3 bus outputs 10 GND ground (0 V) 11, 13, 15 and 17 2A3 to 2A0 data inputs 12, 14, 16 and 18 1Y3 to 1Y0 bus outputs 19 2OE output enable input (active LOW) 20 VCC supply voltage 2001 Oct 30 3 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 handbook, halfpage 1OE 1 20 VCC 1A0 2 19 2OE 2Y0 3 18 1Y0 1A1 4 17 2A0 2Y1 5 16 1Y1 handbook, halfpage 2 1A0 1Y0 18 17 2A0 2Y0 3 4 1A1 1Y1 16 15 2A1 2Y1 5 6 1A2 1Y2 14 15 2A1 13 2A2 2Y2 7 2Y2 7 14 1Y2 8 1A3 1Y3 12 1A3 8 13 2A2 11 2A3 2Y3 9 2Y3 9 12 1Y3 1 1OE 19 2OE 244 1A2 6 11 2A3 GND 10 MNA168 MNA162 Fig.1 Pin configuration. Fig.2 Logic symbol. handbook, halfpage 2 4 handbook, halfpage 1 EN 6 2 18 4 16 6 14 8 12 8 1 17 19 1A0 1Y0 1A1 1Y1 1A2 1Y2 1A3 1Y3 16 14 12 1OE 2A0 2Y0 2A1 2Y1 2A2 2Y2 2A3 2Y3 3 EN 15 11 9 13 7 15 5 17 3 13 11 MNA169 19 2OE MNA170 Fig.3 IEE/IEC logic symbol. 2001 Oct 30 18 Fig.4 Logic diagram. 4 5 7 9 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 1.65 3.6 V VI input voltage 0 3.6 V VO output voltage VCC V Tamb operating ambient temperature tr, tf input rise and fall times VCC = 1.65 to 3.6 V; enable mode 0 VCC = 1.65 to 3.6 V; disable mode 0 3.6 V VCC = 0 V; Power-down mode 0 3.6 V -40 +85 C VCC = 1.65 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER VCC supply voltage IIK input diode current VI input voltage IOK output diode current VO output voltage CONDITIONS MIN. MAX. UNIT -0.5 +4.6 V - -50 mA -0.5 +4.6 V VO > VCC or VO < 0 - 50 mA enable mode; notes 1 and 2 -0.5 VCC + 0.5 V disable mode -0.5 +4.6 V Power-down mode; note 2 -0.5 +4.6 V VO = 0 to VCC - 50 mA VI < 0 IO output diode current IGND, ICC VCC or GND current - 100 mA Tstg storage temperature -65 +150 C Ptot power dissipation per package SO package above 70 C derate linearly with 8 mW/K - 500 mW TSSOP package above 60 C derate linearly with 5.5 mW/K - 500 mW Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation. 2001 Oct 30 5 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL VIL VOL VOH -40 to +85 PARAMETER VCC (V) OTHER VIH Tamb (C) HIGH-level input voltage LOW-level input voltage LOW-level output voltage HIGH-level output voltage MIN. TYP.(1) UNIT MAX. 1.65 to 1.95 0.65 x VCC - - V - - V V 2.3 to 2.7 1.7 2.7 to 3.6 2 - - 1.65 to 1.95 - - 0.35 x VCC V 2.3 to 2.7 - - 0.7 V 2.7 to 3.6 - - 0.8 V VI = VIH or VIL; IO = 100 A 1.65 to 3.6 - - 0.2 V VI = VIH or VIL; IO = 6 mA 1.65 - - 0.3 V VI = VIH or VIL; IO = 12 mA 2.3 - - 0.4 V VI = VIH or VIL; IO = 18 mA 2.3 - - 0.6 V VI = VIH or VIL; IO = 12 mA 2.7 - - 0.4 V VI = VIH or VIL; IO = 18 mA 3.0 - - 0.4 V VI = VIH or VIL; IO = 24 mA 3.0 - - 0.55 V VI = VIH or VIL; IO = -100 A 1.65 to 3.6 VCC - 0.2 - - V VI = VIH or VIL; IO = -6 mA 1.65 1.25 - - V VI = VIH or VIL; IO = -12 mA 2.3 1.8 - - V VI = VIH or VIL; IO = -18 mA 2.3 1.7 - - V VI = VIH or VIL; IO = -12 mA 2.7 2.2 - - V VI = VIH or VIL; IO = -18 mA 3.0 2.4 - - V VI = VIH or VIL; IO = -24 mA 3.0 2.2 - - V II input leakage current VI = 3.6 V or GND 3.6 - 0.1 5 A IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 3.6 V or GND; note 2 3.6 - 0.1 10 A Ioff power OFF leakage VI or VO = 3.6 V current 0.0 - 0.1 10 A ICC quiescent supply current VI = VCC or GND; IO = 0 3.6 - 0.2 20 A ICC additional quiescent supply current per input pin VI = VCC - 0.6 V; IO = 0 3.0 to 3.6 - 5 750 A Notes 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 C. 2. For transceivers, the parameters IOZ includes the input leakage current. 2001 Oct 30 6 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 AC CHARACTERISTICS Tamb (C) TEST CONDITIONS SYMBOL WAVEFORMS tPHL/tPLH propagation delay input nAn to output nYn tPZH/tPZL see Figs 5 and 7 3-state output enable time input nOE to output nYn tPHZ/tPLZ -40 to +85 PARAMETER see Figs 6 and 7 3-state output disable time input nOE to output nYn see Figs 6 and 7 VCC (V) MIN. 1.65 to 1.95 1.0 - 4.4 ns 1.0 - 3.1 ns 2.7 1.0 - 3.1 ns 3.0 to 3.6 1.0 - 2.8 ns 1.65 to 1.95 1.0 - 6.9 ns 2.3 to 2.7 1.0 - 5.4 ns 2.7 1.0 - 5.3 ns 3.0 to 3.6 1.0 - 4.5 ns 1.65 to 1.95 1.0 - 5.9 ns 2.3 to 2.7 1.0 - 4.1 ns 2.7 1.0 - 4.4 ns 3.0 to 3.6 1.0 - 4.2 ns 1. All typical values are measured at Tamb = 25 C. AC WAVEFORMS handbook, halfpage VI VM VM GND tPLH tPHL VOH VM nYn OUTPUT VOL VM MNA171 INPUT VCC VM VI tr = tf 0.5 x VCC VCC 2.0 ns 2.3 to 2.7 V 0.5 x VCC VCC 2.0 ns 2.7 V 1.5 V 2.7 V 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V 2.5 ns 1.65 to 1.95 V Fig.5 Input nAn to output nYn propagation delay times. 2001 Oct 30 7 MAX. 2.3 to 2.7 Note nAn INPUT TYP.(1) UNIT Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 VI handbook, full pagewidth VM nOE input GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCC VM Vx VOL tPHZ tPZH VOH Vy output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled MNA654 INPUT VCC VM 1.65 to 1.95 V 0.5 x VCC VCC 2.0 ns 2.3 to 2.7 V 0.5 x VCC VCC 2.0 ns 2.7 V 1.5 V 2.7 V 2.5 ns VX = VOL + 0.3 V at VCC 2.7 V; VX = VOL + 0.15 V at VCC < 2.7 V; VY = VOH - 0.3 V at VCC 2.7 V; VY = VOH - 0.15 V at VCC < 2.7 V. 3.0 to 3.6 V 1.5 V 2.7 V 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. VI tr = tf Fig.6 3-state enable and disable times. 2001 Oct 30 8 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 VEXT handbook, full pagewidth VCC PULSE GENERATOR VI RL VO D.U.T. CL RT RL MNA616 VCC CL VCC 30 pF 1 k 2.3 to 2.7 V VCC 30 pF 500 open GND 2 x VCC 2.7 V 2.7 V 50 pF 500 open GND 6V 3.0 to 3.6 V 2.7 V 50 pF 500 open GND 6V 1.65 to 1.95 V RL VEXT VI tPLH/tPHL open tPZH/tPHZ GND tPZL/tPLZ 2 x VCC RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.7 Load circuitry for switching times. 2001 Oct 30 9 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 PACKAGE OUTLINES SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 11 20 Q A2 A (A 3) A1 pin 1 index Lp L 1 10 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 2001 Oct 30 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 10 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A Lp L 1 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.10 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1.0 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 2001 Oct 30 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27 MO-153 11 o Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 SOLDERING If wave soldering is used the following conditions must be observed for optimal results: Introduction to soldering surface mount packages * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering The footprint must incorporate solder thieves at the downstream end. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Wave soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. To overcome these problems the double-wave soldering method was specifically developed. 2001 Oct 30 12 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2001 Oct 30 13 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 DATA SHEET STATUS DATA SHEET STATUS(1) PRODUCT STATUS(2) DEFINITIONS Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2001 Oct 30 14 Philips Semiconductors Preliminary specification Octal buffer/line driver; 3-state 74ALVC244 NOTES 2001 Oct 30 15 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. SCA73 (c) Koninklijke Philips Electronics N.V. 2001 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613508/01/pp16 Date of release: 2001 Oct 30 Document order number: 9397 750 08976