DATA SH EET
Preliminary specification
File under Integrated Circuits, IC24 2001 Oct 30
INTEGRATED CIRCUITS
74ALVC244
Octal buffer/line driver; 3-state
2001 Oct 30 2
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
FEATURES
Wide supply voltage range of 1.65 to 3.6 V
Complies with JEDEC standard:
JESD8-7 (1.65 to 1.95 V)
JESD8-5 (2.3 to 2.7 V)
JESD8B/JESD36 (2.7 to 3.6 V).
3.6 V tolerant inputs/outputs
CMOS LOW power consumption
Direct interface with TTL levels (2.7 to 3.6 V)
Power-down mode
Latch-up performance exceeds 250 mA
ESD protection:
Human Body Model (HBM) (A 114-A) exceeds
2000 V
Machine Model (MM) (A 115-A) exceeds 200 V.
DESCRIPTION
The 74ALVC244 is a high-performance, low-power,
low-voltage, Si-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
The 74ALVC244 is an octal non-inverting buffer/line driver
with 3-state outputs. The 3-state outputs are controlled by
the output enable inputs 1OE and 2OE. A HIGH on nOE
causes the outputs to assume a HIGH impedance
OFF-state. Schmitt-trigger action at all inputs makes the
circuit highly tolerant for slower input rise and fall times.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C.
Notes
1. CPD is used to determine the dynamic power dissipation (PDin µW).
PD=C
PD ×VCC2×fi+(C
L×V
CC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI= GND to VCC.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL/tPLH propagation delay inputs
nAnto output nYn
VCC = 1.8 V; CL= 30 pF; RL=1kΩ− ns
VCC = 2.5 V; CL= 30 pF; RL= 500 Ω− ns
VCC = 2.7 V; CL= 50 pF; RL= 500 Ω− ns
VCC = 3.3 V; CL= 50 pF; RL= 500 Ω− ns
CIinput capacitance 3.5 pF
CPD power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2 20 pF
2001 Oct 30 3
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = HIGH-impedance OFF-state.
ORDERING INFORMATION
PINNING
INPUT OUTPUT
nOE nAnnYn
LLL
LHH
HXZ
TYPE NUMBER PACKAGES
PINS PACKAGE MATERIAL CODE
74ALVC244D 20 SO plastic SOT163-1
74ALVC244PW 20 TSSOP plastic SOT360-1
PIN SYMBOL DESCRIPTION
11
OE output enable input (active LOW)
2, 4, 6 and 8 1A0to 1A3data inputs
3, 5, 7 and 9 2Y0to 2Y3bus outputs
10 GND ground (0 V)
11, 13, 15 and 17 2A3to 2A0data inputs
12, 14, 16 and 18 1Y3to 1Y0bus outputs
19 2OE output enable input (active LOW)
20 VCC supply voltage
2001 Oct 30 4
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
handbook, halfpage
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
GND
VCC
2OE
1Y0
2A0
2A1
1Y2
1Y1
2A2
1Y3
2A3
1
2
3
4
5
6
7
8
9
10 11
12
20
19
18
17
16
15
14
13
244
MNA162
Fig.1 Pin configuration.
handbook, halfpage
MNA168
1A3
1A2
1A1
1A0
2
4
6
8
1
1Y0
1Y1
18
16
14
12
1Y2
1Y3
1OE
2A3
2A2
2A1
2A0
17
15
13
11
19
2Y0
2Y1
3
5
7
9
2Y2
2Y3
2OE
Fig.2 Logic symbol.
handbook, halfpage
12
14
2
4
6
8
18
16
1EN
MNA169
3
5
11
13
15
17
9
7
19 EN
Fig.3 IEE/IEC logic symbol.
handbook, halfpage
MNA170
1A3
1A2
1A1
1A0
2
4
6
8
1
1Y0
1Y1
18
16
14
12
1Y2
1Y3
1OE
2A3
2A2
2A1
2A0
17
15
13
11
19
2Y0
2Y1
3
5
7
9
2Y2
2Y3
2OE
Fig.4 Logic diagram.
2001 Oct 30 5
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage 1.65 3.6 V
VIinput voltage 0 3.6 V
VOoutput voltage VCC = 1.65 to 3.6 V; enable mode 0 VCC V
VCC = 1.65 to 3.6 V; disable mode 0 3.6 V
VCC = 0 V; Power-down mode 0 3.6 V
Tamb operating ambient temperature 40 +85 °C
tr,t
finput rise and fall times VCC = 1.65 to 2.7 V 0 20 ns/V
VCC = 2.7 to 3.6 V 0 10 ns/V
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage 0.5 +4.6 V
IIK input diode current VI<0 −−50 mA
VIinput voltage 0.5 +4.6 V
IOK output diode current VO>V
CC or VO<0 −±50 mA
VOoutput voltage enable mode; notes 1 and 2 0.5 VCC + 0.5 V
disable mode 0.5 +4.6 V
Power-down mode; note 2 0.5 +4.6 V
IOoutput diode current VO=0toV
CC −±50 mA
IGND, ICC VCC or GND current −±100 mA
Tstg storage temperature 65 +150 °C
Ptot power dissipation per package
SO package above 70 °C derate linearly with
8 mW/K 500 mW
TSSOP package above 60 °C derate linearly with
5.5 mW/K 500 mW
2001 Oct 30 6
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Notes
1. All typical values are measured at VCC = 3.3 V and Tamb =25°C.
2. For transceivers, the parameters IOZ includes the input leakage current.
SYMBOL PARAMETER
TEST CONDITIONS Tamb (°C)
UNIT
OTHER VCC (V) 40 to +85
MIN. TYP.(1) MAX.
VIH HIGH-level input
voltage 1.65 to 1.95 0.65 ×VCC −− V
2.3 to 2.7 1.7 −− V
2.7 to 3.6 2 −− V
V
IL LOW-level input
voltage 1.65 to 1.95 −−0.35 ×VCC V
2.3 to 2.7 −−0.7 V
2.7 to 3.6 −−0.8 V
VOL LOW-level output
voltage VI=V
IH or VIL; IO= 100 µA 1.65 to 3.6 −−0.2 V
VI=V
IH or VIL; IO= 6 mA 1.65 −−0.3 V
VI=V
IH or VIL; IO= 12 mA 2.3 −−0.4 V
VI=V
IH or VIL; IO= 18 mA 2.3 −−0.6 V
VI=V
IH or VIL; IO= 12 mA 2.7 −−0.4 V
VI=V
IH or VIL; IO= 18 mA 3.0 −−0.4 V
VI=V
IH or VIL; IO= 24 mA 3.0 −−0.55 V
VOH HIGH-level output
voltage VI=V
IH or VIL; IO=100 µA 1.65 to 3.6 VCC 0.2 −− V
V
I
=V
IH or VIL; IO=6 mA 1.65 1.25 −− V
V
I
=V
IH or VIL; IO=12 mA 2.3 1.8 −− V
V
I
=V
IH or VIL; IO=18 mA 2.3 1.7 −− V
V
I
=V
IH or VIL; IO=12 mA 2.7 2.2 −− V
V
I
=V
IH or VIL; IO=18 mA 3.0 2.4 −− V
V
I
=V
IH or VIL; IO=24 mA 3.0 2.2 −− V
I
Iinput leakage
current VI= 3.6 Vor GND 3.6 −±0.1 ±5µA
IOZ 3-state output
OFF-state current VI=V
IH or VIL;
VO= 3.6 V or GND; note 2 3.6 0.1 ±10 µA
Ioff powerOFFleakage
current VIor VO= 3.6 V 0.0 −±0.1 ±10 µA
ICC quiescent supply
current VI=V
CC or GND; IO= 0 3.6 0.2 20 µA
ICC additional
quiescent supply
current per input
pin
VI=V
CC 0.6 V; IO= 0 3.0 to 3.6 5 750 µA
2001 Oct 30 7
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
AC CHARACTERISTICS
Note
1. All typical values are measured at Tamb =25°C.
AC WAVEFORMS
SYMBOL PARAMETER
TEST CONDITIONS Tamb (°C)
UNIT
WAVEFORMS VCC (V) 40 to +85
MIN. TYP.(1) MAX.
tPHL/tPLH propagation delay
input nAnto output nYn
see Figs 5 and 7 1.65 to 1.95 1.0 4.4 ns
2.3 to 2.7 1.0 3.1 ns
2.7 1.0 3.1 ns
3.0 to 3.6 1.0 2.8 ns
tPZH/tPZL 3-state output enable time
input nOE to output nYn
see Figs 6 and 7 1.65 to 1.95 1.0 6.9 ns
2.3 to 2.7 1.0 5.4 ns
2.7 1.0 5.3 ns
3.0 to 3.6 1.0 4.5 ns
tPHZ/tPLZ 3-state output disable time
input nOE to output nYn
see Figs 6 and 7 1.65 to 1.95 1.0 5.9 ns
2.3 to 2.7 1.0 4.1 ns
2.7 1.0 4.4 ns
3.0 to 3.6 1.0 4.2 ns
handbook, halfpage
MNA171
nAn INPUT
nYn OUTPUT
tPLH tPHL
GND
VI
VM
VM
VM
VM
VOH
VOL
Fig.5 Input nAn to output nYn propagation delay times.
VCC VMINPUT
VItr=t
f
1.65 to 1.95 V 0.5 ×VCC VCC 2.0 ns
2.3 to 2.7 V 0.5 ×VCC VCC 2.0 ns
2.7 V 1.5 V 2.7 V 2.5 ns
3.0 to 3.6 V 1.5 V 2.7 V 2.5 ns
2001 Oct 30 8
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
handbook, full pagewidth
MNA654
tPLZ
tPHZ
outputs
disabled outputs
enabled
Vy
Vx
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nOE input
VI
VCC
VM
VOL
VOH
GND
GND
tPZL
tPZH
VM
VM
Fig.6 3-state enable and disable times.
VCC VMINPUT
VItr=t
f
1.65 to 1.95 V 0.5 ×VCC VCC 2.0 ns
2.3 to 2.7 V 0.5 ×VCC VCC 2.0 ns
2.7 V 1.5 V 2.7 V 2.5 ns
3.0 to 3.6 V 1.5 V 2.7 V 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load.
VX=V
OL + 0.3 V at VCC 2.7 V;
VX=V
OL + 0.15 V at VCC < 2.7 V;
VY=V
OH 0.3 V at VCC 2.7 V;
VY=V
OH 0.15 V at VCC < 2.7 V.
2001 Oct 30 9
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
handbook, full pagewidth
VEXT
VCC
VIVO
MNA616
D.U.T.
CL
RT
RL
RL
PULSE
GENERATOR
Fig.7 Load circuitry for switching times.
RL= Load resistor.
CL= Load capacitance including jig and probe capacitance.
RT= Termination resistance should be equal to the output impedance Zo of the pulse generator.
VCC VICLRLVEXT
tPLH/tPHL tPZH/tPHZ tPZL/tPLZ
1.65 to 1.95 V VCC 30 pF 1 kopen GND 2 ×VCC
2.3 to 2.7 V VCC 30 pF 500 open GND 2 ×VCC
2.7 V 2.7 V 50 pF 500 open GND 6 V
3.0 to 3.6 V 2.7 V 50 pF 500 open GND 6 V
2001 Oct 30 10
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
PACKAGE OUTLINES
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZ
ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm
inches
2.65 0.30
0.10 2.45
2.25 0.49
0.36 0.32
0.23 13.0
12.6 7.6
7.4 1.27 10.65
10.00 1.1
1.0 0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
1.1
0.4
SOT163-1
10
20
wM
bp
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.10 0.012
0.004 0.096
0.089 0.019
0.014 0.013
0.009 0.51
0.49 0.30
0.29 0.050
1.4
0.055
0.419
0.394 0.043
0.039 0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A1
A2
HE
Lp
Q
E
c
L
vMA
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
97-05-22
99-12-27
2001 Oct 30 11
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 6.6
6.4 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.5
0.2 8
0
o
o
0.13 0.10.21.0
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT360-1 MO-153 95-02-04
99-12-27
wM
bp
D
Z
e
0.25
110
20 11
pin 1 index
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
A
max.
1.10
2001 Oct 30 12
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
SOLDERING
Introduction to soldering surface mount packages
Thistextgivesaverybriefinsighttoacomplextechnology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certainsurfacemountICs,butitis notsuitableforfinepitch
SMDs. In these situations reflow soldering is
recommended.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuit board by screen printing,stencillingor
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
For packages with leads on two sides and a pitch (e):
larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
Forpackageswithleadsonfoursides, thefootprintmust
be placed at a 45°angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2001 Oct 30 13
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
Suitability of surface mount IC packages for wave and reflow soldering methods
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
PACKAGE SOLDERING METHOD
WAVE REFLOW(1)
BGA, LFBGA, SQFP, TFBGA not suitable suitable
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable(2) suitable
PLCC(3), SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended(3)(4) suitable
SSOP, TSSOP, VSO not recommended(5) suitable
2001 Oct 30 14
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DATA SHEET STATUS(1) PRODUCT
STATUS(2) DEFINITIONS
Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratanyotherconditionsabovethosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarranty thatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingor sellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyofthese products, conveysnolicenceortitle
under any patent, copyright, or mask work right to these
products,andmakesnorepresentationsor warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
2001 Oct 30 15
Philips Semiconductors Preliminary specification
Octal buffer/line driver; 3-state 74ALVC244
NOTES
© Koninklijke Philips Electronics N.V. 2001 SCA73
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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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Printed in The Netherlands 613508/01/pp16 Date of release: 2001 Oct 30 Document order number: 9397 750 08976