LV8224T - ON Semiconductor L.L.C.

60607 TI PC / 53007 TI PC B8-8449, 8836 No.A0793-1/15

Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate

the performance, characteristics, and functions of the described products in the independent state, and are not

guarantees of the performance, characteristics, and functions of the described products as mounted in the

customer

s products or equipment. To verify symptoms and states that cannot be evaluated in an independent

device, the customer should always evaluate and test devices mounted in the customer

sproductsor

equipment.

Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to

"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,

communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be

intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace

instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety

equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case

of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee

thereof. If you should intend to use our products for applications outside the standard applications of our

customer who is considering such use and/or outside the scope of our intended standard applications, please

consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our

customer shall be solely responsible for the use.

LV8224T

Overview

The LV8224T is a system motor driver IC that implements all the motor driver circuits needed for CD and MD products.

The LV8224T provides a three-phase PWM spindle driver, a sled driver (either three-phase or PWM H bridge operation

can be selected), and focus and tracking drivers (as two PWM H bridge driver channels). Since the LV8224T uses

BiCDMOS devices, it can contribute to further miniaturization, thinner from factors, and lower power in end products.

The adoption of the direct PWM sensorless drive method for the spindle driver makes it possible to implement high

efficiency motor drive with few external parts.

Features

• PWM H bridge motor divers (2 channels)

• Three-phase stepping motor driver, and direct PWM sensorless motor driver

Specifications

Absolute Maximum Ratings at Ta = 25°C

Parameter Symbol Conditions Ratings Unit

Supply voltage VCC max 5.0 V

Output block power supply voltage VS max 4.5 V

Predriver voltage (gate voltage) VG max 6.5 V

Output current IO max 0.8 A

Pd max1 Independent IC 0.4 W Allowable power dissipation

Pd max2 * Mounted on a board. 1.1 W

Operating temperature Topr -30 to +85 °C

Storage temperature Tstg -55 to +150 °C

* : Mounted on a board : 50×50×1.6mm3, glass epoxy board

Bi-CMOS LSI

Motor driver system in CD and MD players

Orderin

numbe

: ENA0793B

LV8224T

No.A0793-2/15

Recommended operating Ranges at Ta = 25°C

Parameter Symbol Conditions Ratings Unit

Supply voltage VCC 1.9 to 4.0 V

Output block supply voltage VS 0 to VG-3.0 V

Predriver voltage (gate voltage) VG VS+3 to 6.3 V

Electrical Characteristics at Ta = 25°C, VCC = 2.3V

Parameter Symbol Conditions min typ max Unit

Current drain 1 ICC1 S/S pin H 1.0 1.5 mA

Current drain 2 ICC2 S/S pin L(at standby) 20 μA

Charge Pump Output

Output voltage VG 5.4 5.9 6.2 V

Actuator Block : Ta = 25°C, VCC = 2.3V

Position Detection Comparator Block

Input offset voltage VAOFS -9 +9 mV

Common-mode input voltage range VACM 0 V

CC V

High-level output voltage VACH I

O = -0.5mA VCC-0.5 VCC V

Low-level output voltage VACL I

O = 0.5mA 0.5 V

Output block (OUT1F/R, OUT2F/R, SUO to SWO pins)

SOURCE 1 Ron (H1) IO = 0.5A, VS = 1.2V, VG = 6V, forward drive

transistor

0.4 0.6 Ω

SOURCE 2 Ron (H2) IO = 0.5A, VS = 1.2V, VG = 6V, reverse drive

transistor

0.4 0.6 Ω

SINK Ron (L) IO = 0.5A, VS = 1.2V, VG = 6V 0.4 0.6 Ω

SOURCE+SINK Ron (H+L) IO = 0.5A, VS = 1.2V, VG = 6V 0.8 1.2 Ω

TRISE *Design target 0.1 1.0 μs Output transmission delay time

(H bridge) TFALL *Design target 0.1 0.7 μs

Minimum input pulse width

(H bridge)

tmin ch1, 2 output pulse width ≥ 2/3tmin

*Design target

200 ns

Decoder and Actuator Input Pins (IN1F/R, IN2F/ R, S1 to S3 pins)

High-level input voltage range VIH V

CC-0.5 VCC V

Low-level input voltage range VIL 0 0.5V

High-level actuator input pin current IINH When input pin voltage is 2.3V 9.5 13 μA

Low-level actuator input pin current IINL When input pin voltage is 0V 1 μA

MUTE Pin

High-level input voltage range VMUH MUTE OFF VCC-0.5 VCC V

Low-level input voltage range VMUL MUTE ON 0 0.5 V

High-level input pin current IMUTEH When input pin voltage is 2.3V 9.5 13 μA

Low-level input pin current IMUTEL When input pin voltage is 0V 1 μA

Spindle Motor Driver block : Ta = 25°C, VCC = 2.3V

Output Block

SOURCE1 Ron (H1) IO = 0.5A, VS = 1.2V, VG = 6V, forward drive

transistor

0.4 0.6 Ω

SOURCE2 Ron (H2) IO = 0.5A, VS = 1.2V, VG = 6V, reverse drive

transistor

0.4 0.6 Ω

SINK Ron (L) IO = 0.5A, VS = 1.2V,VG = 6V 0.4 0.6 Ω

SOURCE+SINK Ron (H+L) IO = 0.5A, VS = 1.2V, VG = 6V 0.8 1.2 Ω

Position Detector Comparator

Input offset voltage VSOFS -9 9 mV

Startup Oscillator Pin

OSC high-level voltage VOSCH 0.85 1.05 1.25 V

OSC low-level voltage VOSCL 0.40 0.60 0.80 V

S/S pin

High-level input voltage range VSSH Start VCC-0.5 VCC V

Low-level input voltage range VSSL Stop 0 0.5 V

High-level input pin current ISSH When input pin voltage is 2.3V 9.5 13 μA

Low-level input pin current ISSL When input pin voltage is 0V 1 μA

Continued on nex t pa ge.

LV8224T

No.A0793-3/15

Continued from preceding page.

Parameter Symbol Conditions min typ max Unit

BREAK Pin

High-level input voltage range VBRH Brake off VCC-0.5 VCC V

Low-level input voltage range VBRL Brake on 0 0.5 V

High-level input pin current IBRKH When input pin voltage is 2.3V 9.5 13 μA

Low-level input pin current IBRKL When input pin voltage is 0V 1 μA

PWM Pin

High-level input voltage range VPWMH V

CC-0.5 VCC V

Low-level input voltage range VPWML 0 0.5V

High-level input pin current IPWMH When input pin voltage is 2.3V 9.5 13 μA

Low-level input pin current IPWML When input pin voltage is 0V 1 μA

PWM input frequency VPWMIN 190 kHz

CLK Pin

High-level input voltage range VCLKH V

CC-0.5 VCC V

Low-level input voltage range VCLKL 0 0.5V

High-level input pin current ICLKH When input pin voltage is 2.3V 9.5 13 μA

Low-level input pin current ICLKL When input pin voltage is 0V 1 μA

FG output Pin

High-level output voltage VFGH I

O = -0.5mA VCC-0.5 VCC V

Low-level output voltage VFGL I

O = 0.5mA 0.5 V

Package Dimensions

unit : mm (typ)

3254

SANYO : TQFP48(7X7)

7.0

9.0

0.125

0.2

0.5

(0.75)

0.5

112

2536

1.2max

0.1 (1.0)

0.57

1.1

0.5

1.1

1.5

– 20 806020 40010

Ambient temperature, Ta – °C

Allowable power dissipation, Pd max – W

Pd max – Ta

Specified circuit board : 50×50×1.6mm

glass epoxy board

Mounted on the

thermal resistance evaluation PCB

LV8224T

No.A0793-4/15

Actuator Truth Tables

Focus and Tracking Blocks

MUTE IN1, 2F IN1, 2R OUT1, 2F OUT1, 2R

H L L L L

H H L H L

H L H L H

H H H L L

L × × Z Z

Sled Drive Block Stepping Drive Mode (When 3/H pin (pin 47) is high)

MUTE S1 S2 S3 SUO SVO SWO

H L L L H L Z

H H L L H Z L

H L H L Z H L

H H H L L H Z

H L L H L Z H

H H L H Z L H

H L H H Z Z Z

H H H H Z Z Z

L × × × Z Z Z

Z : Open

Sled Drive Block H Bridge Drive Mode (When 3/H pin (pin 47) is low)

MUTE S1 S2 SUO SVO MUTE S3 SWO

H L L L L H L L

H H L H L H H H

H L H L H L × Z

H H H L L

L × × Z Z

Z : Open

Notes :

When the 3/ H pin is set to sel ect H bri dge m ode, S UO and SVO operate as P WM H bri dge out puts acc ording t o the S 1

and S2 inputs, and SWO op erates as a half-bridge circuit output according to the S3 input.

LV8224T

No.A0793-5/15

Pin Assignment

36 35 34 33 32 31 30 29 28 27 26 25

LV8224T

VOUT

UOUT

SPGND

SPVS

IN1F

IN1R

IN2F

IN2R

MUTE

GND

PWM

BRK

S/S

SWO

SLGND

SLVS

CLK

CP2

CP1

CPC1

CPC2

VCC

3/H

SUCO

WOUT

OUT1F

VS1

PGND1

OUT1R

OUT2F

VS2

PGND2

OUT2R

SUO

SVO

1 2 3 4 5 6 7 8 9 10 11 12

OSC

SOFT

SPFIL

SPCIN

SPCOM

SLCOM

SPFG

SWCO

SVCO

LV8224T

No.A0793-6/15

Block Diagram

1/N

PWMSPFG

VCC

GND

SUCO

SVCO

SWCO

3/H

SLCOM

SLVS

SUO

SVO

SWO

SLGND

VS1

PGND1

MUTE

CP1

CPC1

CP2

CPC2

CLK

S/S

BRK

SOFT

OSC

CIN

FIL

SPCOM

SPVS

UOUT

VOUT

WOUT

SPGND

PGND2 VS2 OUT2R

OUT2F IN1FIN1ROUT1FOUT1RIN2FIN2R

Waveform

synthesizer

Waveform

synthesizer

Waveform

distributor

Spindle pre driverSled pre driver

Sensorless logic

Logic

OSC

SEL

Pre driver Logic

Charge

pump

Pre driver Logic

LV8224T

No.A0793-7/15

Sample Application Circuit 1

Notes

• Startup with automatic oscillation mode

• Sled three-phase stepping mode

• Cored motor spindle motor mode

Capacitors must be inserted between VS and PGND, and between VCC and ground.

36 35 34 33 32 31 30 29 28 27 26 25

LV8224T

VOUT

UOUT

SPGND

SPVS

IN1F

IN1R

IN2F

IN2R

MUTE

GND

PWM

BRK

DSP

S/S

SWO

SLGND

SLVS

CLK

CP2

CP1

CPC1

CPC2

VCC

3/H

SUCO

WOUT

OUT1F

VS1

PGND1

OUT1R

OUT2F

VS2

PGND2

OUT2R

SUO

SVO

1 2 3 4 5 6 7 8 9 10 11 12

OSC

SOFT

SPFIL

SPCIN

SPCOM

SLCOM

o Spindle motor

To Sled motor

SPFG

SWCO

SVCO

To SPCOM To SLCOM

Spindle motor Spindle motor

DSP

LV8224T

No.A0793-8/15

Sample Application Circuit 2

External parts minimum plan

Notes

• Startup with internal oscillation control mode (Low-level selected)

• Sled three-phase stepping mode

• Cored motor spindle motor mode

• External stepped- up power su ppl y used

Capacitors must be inserted between each VS and ground, Between each VCC and ground, and between each VG and

ground.

36 35 34 33 32 31 30 29 28 27 26 25

LV8224T

VOUT

UOUT

SPGND

SPVS

IN1F

IN1R

IN2F

IN2R

MUTE

GND

PWM

BRK

DSP

VCC

DSP

S/S

SWO

SLGND

SLVS

CLK

CP2

CP1

CPC1

CPC2

VCC

3/H

SUCO

WOUT

OUT1F

VS1

PGND1

OUT1R

OUT2F

VS2

PGND2

OUT2R

SUO

SVO

1234567891011 12

OSC

SOFT

SPFIL

SPCIN

SPCOM

SLCOM

SPFG

SWCO

SVCO

DSP

To Spindle motor

To Sled motor

To SPCOM To SLCOM

Spindle motor Spindle motor

LV8224T

No.A0793-9/15

Pin Description

Pin No. Pin name Pin circuit Equivalent Circuit

OSC Startup oscillator connection. When this pin is

connected to VCC, the startup frequency will be

equivalent to fCLK/4096, and connected to ground,

that frequency will be fCLK/3072. If any other

startup frequency is to be set, insert a capacitor

between this pin and ground. The

startup frequency can be set freely by changing the

value of the capacitor.

SOFT Spindle driver block drive current waveform

selection. Set this pin to low when using a cored

motor and to high when using a coreless motor.

SPFIL Waveform synthesis signal filter connection.

Insert a capacitor between this pin and SPCIN

(pin 4).

4 SPCIN Position detection comparator differential input.

Insert a capacitor between this pin and SPFIL

(pin 3).

SPCOM Spindle motor common point connection.

Continued on nex t pa ge.

VCC

500Ω

VCC

10kΩ

200kΩ

12kΩ

5200kΩ

12kΩ1kΩ

LV8224T

No.A0793-10/15

Continued from preceding page.

Pin No. Pin name Pin circuit Equivalent Circuit

SLCOM Sled driver block position detection comparator

common input.

Three-phase sled block logic inputs. Pins 35, 36,

and 37 are the corresponding outputs.

SPFG FG pulse output.

This pin outputs a three Hall sensor system

equivalent pulse signal.

SUCO

SVCO

SWCO

Sled driver block position detection comparator

outputs.

3/H Sled drive mode selection. A high-level input

selects three-phase stepping mode, and a low-level

input selects H-bridge + half bridge mode. This pin

must not be left open.

15 VCC Small-signal system power supply.

Insert a capacitor between this pin and ground.

VG Charge pump stepped up voltage output.

Insert a capacitor between this pin and ground.

CPC2 Charge pump step-up connection. Insert a

capacitor between this pin and CP2 (pin 20).

CPC1 Charge pump step-up connection. Insert a

capacitor between this pin and CP1 (pin 19).

Continued on nex t pa ge.

1kΩ

VCC

10kΩ

200kΩ

VCC

1kΩ

VCC 16

18 17

LV8224T

No.A0793-11/15

Continued from preceding page.

Pin No. Pin name Pin circuit Equivalent Circuit

CP1 Charge pump step-up pulse output. Insert a

capacitor between this pin and CPC1 (pin 18).

Leave this pin open when using this circuit as a

2×step-up circuit.

CP2 Charge pump step-up pulse output. Insert a

capacitor between this pin and CPC2 (pin 17).

CLK Logic circuit operation reference clock input. Supply

a frequency 32 times that of the spindle PWM

frequency.

40, 41

42, 43

IN1F/R

IN2F/R

Actuator H-bridge block logic input.

MUTE Muting control for the H bridge 1 and 2 blocks and

the sled driver block.

When a low level is input, these channel outputs all

go to the high-impedance state.

46 PWM PWM signal input. The output transistor is on when

this input is high.

47 BRK Spindle motor block braking control. A low-level

input sets the block to reverse torque braking.

48 S/S Spindle motor block start/stop control. A high-level

input sets the block to start mode.

SLVS Sled motor drive power supply.

Insert a capacitor between this pin and ground.

SUO

SVO

SWO

Sled driver outputs. Connect these pins to the sled

motor.

SLGND Sled output block ground.

30, 27

VS2

OUT2F/R

PGND2

H bridge 2 output block.

Insert a capacitor between VS2 (pin 29) and

ground.

34, 31

VS1

OUT1F/R

PGND1

H-bridge 1 output block.

Insert a capacitor between VS1 (pin 33) and

ground.

Continued on next page.

VCC 19 20

VCC

10kΩ

200kΩ

1kΩ

27 30

31 34

LV8224T

No.A0793-12/15

Continued from preceding page.

Pin No. Pin name Pin circuit Equivalent Circuit

SPVS Spindle motor drive power supply.

Insert a capacitor between this pin and ground.

UOUT

VOUT

WOUT

Spindle driver outputs.

Connect these pins to the spindle motor.

SPGND Spindle output block ground.

45 GND Small-signal system circuit ground.

LV8224T Functional Description and Notes on External Components

The LV8224T is a system driver IC that implements, in a single chip, all the motor driver circuits requi red for CD and MD

players. Since the LV8224T provides a spindle motor driver (three-phase PWM sensorless drive), a sled stepping motor

driver that suppo rts either three-phase steppi ng or PWM H-bri dge drive, and two PWM H-bridge dri vers for the focus and

tracking blocks, it can contribute to thinner form factors and further miniaturization in end products. Since the spindle

motor driver uses a direct PWM sensorless drive technique, it achieves high-efficiency motor drive with a minimal

number of external components.

Read the following notes before designing driver circuits using the LV8224T to design a system with fully satisfactory

characteristics.

1. Output Drive Circuit and Speed Control Methods

The LV8224T adopts the sync hronous c ommutat ion direct P WM drive method t o minim ize powe r loss in the output

circuits. Low on-resistance DMOS devices (total high and low side on-resistance : 0.8Ω, typical) are used as the

output transistors.

The spindle motor driver speed is controlled by BRK and PWM signals provided by an external DSP. The PWM

signal controls the sink side transistor. That transistor is switched according to the input duty of the signal input to

the PWM pin ( pi n 4 6) to control the motor speed. (The si n k side transisto r is on when th e P WM i n put is high-l evel ,

and off when the PWM input is low-level.)

The LV8224T also uses variable duty soft switching to achieve quieter motor drive.

2. Soft Switching Mode Selection

The LV8224T spindle drive bl ock uses va ri a bl e PWM duty soft swi t c hing to reduce motor dri ve noi se. The SOFT

pin (pin 2) selects the soft switching drive mode, that is, it selects different conditions for optimally quiet drive

depending on the motor structure (coil inductance). Set the SOFT pin to the high-level for coreless motors (motors

with a low inductance) and to the low-level for cored motors (motors with a high inductance) for optimal soft

switching.

Although the SOFT pin has an MOS input circuit, it does not have a built-in pull-up or pull-down resistor, and thus

must be set to the high or low level. This pin must not be left open.

3. S/S and MUTE Circuits

The S/S pin (pin 48) funct i o ns as the spindle motor dri ver’s start/ st op pi n; a high -l evel in put speci fi es that the

operation is in the start state. The MUTE pin (pin 44) operates on all driver blocks other than the spindle block; a

low-level input mutes these outputs. In the muted state, the corresponding drivers (H-bridge and three-phase sled

drivers) all go to the high-im pedance state, regardless of the states of the logic inputs. Since the S/S and MUTE pi ns

operate independent l y, low-level i n put s must be ap pl i ed t o both the S/ S and MUTE pi ns t o set t he IC to t he standby

state (power saving mode).

4. Braking Circuit

The BRK pin (pin 47) switches the direction of the torque ap plied by the spindle motor driver; when a low-level is

applied to the BRK pin, the driver switches to the reverse torque braking mode. When the motor decelerates to an

adequately low speed in the reverse torque braking mode, the driver switches to the short-circuit braking mode to

stop the motor. (Note : the IC cannot be set to low-power mode at this time.)

1kΩ

LV8224T

No.A0793-13/15

5. Notes on the CLK and PWM Signals

The LV8224T CLK pin (pi n 2 1) is used as the sensorless lo gic reference clock, fo r st ep- u p ci rcui t p ulse generation,

and for other pur poses. The re fore, t he CL K signal m ust be suppl ied at al l t im es whe n the LV8224T is in start mode.

The CLK input signal must have a frequency 32 times that of the PWM input signal. We recommend that the CLK

input frequency be less than 6MHz.

6. FG Output Circuit

The SPFG pin (pin 10) is t he spindle block FG o ut p ut . It o ut p ut s a pul se signal e quivalent to a t h ree Hal l sens or FG

output. This output has an MOS circuit structure.

7. Spindle Block Position Detection Comparator Circuit

The spindle block position detection comparator circuit is provided to detect the position of the rotor using the back

EMF generated when the motor turns. The IC determines the timing with which the output block applies current to

the motor base d on the posit ion inform ation acqui red by this circuit. S tartup problems due to comparator input noise

can be resolved by inserting a capacitor (about 1000 to 4700pF) between the SPCIN pin (pin 4) and the SPFIL pin

(pin 3). Note that if this capacitor is too large, the output commutation timing may be delayed at higher speeds and

efficiency may be reduced.

8. OSC Circuit

The OSC pin (pin 1) is an oscillator pin provided for sensorless motor startup commutation. The LV8224T provides

two main clock dividing modes and a self-oscillation mode.

The main cloc k divisi on m odes are sel ected by c onnectin g OSC pi n to ei ther VCC or groun d. The st artup f reque ncy

is created by dividing the signal input to the CLK pin (pin 21), and is either CLK/4096 (when the OSC pin is

connected to VCC) or CLK/3072 (when the OSC pin is connected to ground). Self-oscillation mode is set up by

inserting a capacitor between the OSC pin and ground. When self-oscillation mode is selected, the OSC pin starts

self-oscillating, and that frequency becomes the startup frequency. The oscillator frequency can be ad justed by

changing the value of the external capacitor (reducing the value of the capacitor increases the startup frequenc y).

The number of external components can be reduced if the re are no problems with the start up characteristics when the

OSC pin is connected to either VCC or ground. However, if there are proble ms, select self-oscillation mode and

select a value of the capacitor that provides optimal startup characteristics.

9. Charge Pump Circuit

The LV8224T n-c hannel DMOS o utput stru cture allows it to provide a char ge p ump base d volta ge step-up ci rcuit. A

voltage 3 times the VCC voltage (or about 6.0V) can be acquired from the VG pin (pin 16) by inserting capacitors

(recommended value : 0.1μF or larger) between the CP1 (pin 19) and CPC1 (pin 18) pins and between the CP2

(pin 20) and CPC 2 (pin 17) pins. We recommend using t hi s circui t wi t h v a lues s uch that t he volt a ge relationshi p

between the stepped-up voltage (VG) and the motor supply voltage (VS) is VG-VS ≥ 3.0V. Note that this circuit is

designed so that the stepped-up voltage (VG) is clamped at about 6.0VDC. A larger capacitor must be used on the

VG pin if the ripple on the stepped-up voltage (VG) results in VG exceeding 6.5V(VG max).

Observe the following points if the VG voltage is supplied from external circuits.

1) The VG voltage supplied from the extern al circuits must not exceed the abso lute maximum rating VG max.

2) The capacitors between the CP and CPC pins (pins17 to 20) are not required.

3) There is an IC-internal diode between the VCC and VG pins. Therefore, supply voltages such that VCC > VG

must never be applied to this IC.

10. Sled Driver

The LV8224T sled driver bl o ck provides two out put ci rcuit structures: one appropriate for a three-phase motor and

one appropriat e for a DC m otor . C onnect the 3/H pi n (pin 14) to VCC to set the block to use the three-phase stepping

drive structure, and connect the 3/H pin to ground to set the block to use the PWH H bridge drive structure. The S1 to

S3 pins (pins 7 to 9) are the sled driver block control inputs, and the signals are supplied by the DSP. The S1 to S3

pins have built-in pull-up resistors.

The SUC0 to SWC0 pins (pins13, 12, and 11) are the sled driver position detection co mparator output pins. These

pins output the signals only in the three-phase stepping mode, and they output the low-level potential in standb y

mode and PWM H bridge mode. These pins are used to feed back the sled motor speed and position information to

the DSP or microcontroller.

LV8224T

No.A0793-14/15

11. Actuator Block

The LV8224T i ncorporates two H bridge channels for use as actuator drivers for the focus and tracking system s. The

logic input pin circuits inco rporates pull-down resistors. A PWM signal is used for control, and the circuit supports

synchronous co mmutation.

The OUT1F/R output (pi ns 34 and 3 1) is the output c orres pondin g to the I N1F/R (pi ns 4 0 and 41 ) channel 1 cont rol

input, and the OUT2F/R output (pins 30 and 27) is the output corresponding to the IN2F/R (pins 42 and 43) channel

2 control input.

The figures show the dead band characteristics during motor con trol and the test circuit used for measuring those

characteristics.

12. Notes on PCB Pattern Design

The LV8224T is a sy stem dri ver IC im plement ed in a Bi-C MOS process; the IC chip incl udes bi polar circuit s, MOS

logic circuits, and MOS drive circuits integrated on the same chip. As a result, extreme care is re quired with respect

to the pattern layout when designing application circuits.

1) Ground and VCC/VS wiring layout

The LV8224T ground and power supply pins are classified as follows.

Small-signal system ground pin → GND (pin 45)

Large-signal system ground pins → PGND1 (pin 32), PGND2 (pin 28), SPGND (pin 38), SLGND (pin 23)

Small-signal system power supply pin → VCC (pin 15)

Large-signal system power supply pins → VS1 (pi n 33 ), VS2 (pin 29), SPVS (pin 39 ), SLVS (pin 22)

A capacitor must be inserted, as close as possible to the IC, between the small-signal system power supply pin

(pin 15) and ground pin (pin 45).

The large-signal system ground pins (PGND1, PGND2, SPGND, and SLGND) must be connected with the

shortest possi b l e l ines, and furthermore in a m a nner s uch t h at there is no shared impedance with the small-signal

system ground lines. Capacitors must also be inserted, as close as possible to the IC, between the large-signal

system po wer s uppl y pins ( VS1, VS 2, SPV S, and SLVS) and the co rres pon di ng la r g e-si gna l sy stem gr oun d pi ns.

22μH

1μF

OUT1F

OUT1R

2.0

– 1.0

– 0.8

– 0.6

– 0.4

– 0.2

0.6

0.4

0.2

0.0

0.8

1.0

– 100 – 20

– 60 – 40

– 80 60 8020 400 100 – 100

– 80

– 60

– 40

– 20

100

– 10 – 2

– 6– 4

– 86824010

LV8224T

Actuator small signal I/O characteristics

VCC = 2.3V, VS = 1.2V PWM = 132kHz(0-2.3V)

LV8224T

Actuator small signal I/O characteristics (magnified)

VCC = 2.3V, VS = 1.2V PWM = 132kHz(0-2.3V)

OUT1 output voltage (V)

[OUT1R indicated with "-" ]

OUT1 output voltage (V)

[OUT1R indicated with "-" ]

IN1F/R(%)

[IN1R indicated with "-" ]

Output measured with 2.0Ω, A1.0μF LPF after passing through the 22μH coil

IN1F/R(%)

[IN1R indicated with "-" ]

Output measured with 5.0Ω, A1.0μF LPF after passing through the 22μH coil

LV8224T

PS No.A0793-15/15

2) Positioning the small-signal system external components

The small-signal system external components that are also connected to ground must be connected to the

small-signal system ground with lines that are as short as possible.

3) Notes on components connected between IC pins

External components connected between IC pins must be connected using the shortest lines possible.

The capacitor between CP1 (pin 19) and CPC1 (pin 18)

The capacitor between CP2 (pin 20) and CPC2 (pin 17)

The capacitor between SPFIL (pin 3) and SPCIN (pin 4)

SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using

products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition

ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.

products described or contained herein.

SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all

semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or

malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise

to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt

safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not

limited to protective circuits and error prevention circuits for safe design, redundant design, and structural

design.

Upon using the technical information or products described herein, neither warranty nor license shall be granted

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party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's

intellctual property rights which has resulted from the use of the technical information and products mentioned

above.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed

for volume production.

Any and all information described or contained herein are subject to change without notice due to

product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the

SANYO Semiconductor Co.,Ltd. product that you intend to use.

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This catalog provides information as of June, 2007. Specifications and information herein are subject

to change without notice.