BQ20Z45DBTR-R1 - Texas Instruments High-Performance Analog

bq20z45-R1

www.ti.com

SLUS992 –DECEMBER 2009

SBS 1.1-Compliant Gas Gauge and Protection Enabled With Impedance Track™

Check for Samples: bq20z45-R1

1FEATURES DESCRIPTION

2• Next Generation Patented Impedance Track™

Technology Accurately Measures Available The bq20z45-R1 SBS-compliant gas gauge and

Charge in Li-Ion and Li-Polymer Batteries protection IC is a single IC solution designed for

battery-pack or in-system installation. The

– Better Than 1% Error Over the Lifetime of bq20z45-R1 measures and maintains an accurate

the Battery record of available charge in Li-ion or Li-polymer

• Supports the Smart Battery Specification batteries using its integrated high-performance

SBS V1.1 analog peripherals, monitors capacity change, battery

• Flexible Configuration for 2 to 4 Series Li-Ion impedance, open-circuit voltage, and other critical

parameters of the battery pack as well and reports

and Li-Polymer Cells the information to the system host controller over a

• Powerful 8-Bit RISC CPU With Ultralow Power serial-communication bus. Together with the

Modes integrated analog front-end (AFE) short-circuit and

• Full Array of Programmable Protection overload protection, the bq20z45-R1 maximizes

Features functionality and safety while minimizing external

component count, cost, and size in smart battery

– Voltage, Current, and Temperature circuits.

• Satisfies JEITA Guidelines The implemented Impedance Track™ gas gauging

• Added Flexibility to Handle More Complex technology continuously analyzes the battery

Charging Profiles impedance, resulting in superior gas-gauging

• Lifetime Data Logging accuracy. This enables remaining capacity to be

• Supports SHA-1 Authentication calculated with discharge rate, temperature, and cell

aging all accounted for during each stage of every

• Complete Battery Protection and Gas Gauge cycle with high accuracy.

Solution in One Package

• Available in a 38-Pin TSSOP (DBT) package

APPLICATIONS

• Notebook PCs

• Medical and Test Equipment

• Portable Instrumentation Table 1. AVAILABLE OPTIONS

PACKAGE(1)

TA38-PIN TSSOP (DBT) Tube 38-PIN TSSOP (DBT) Tape and Reel

–40°C to 85°C bq20z45-R1DBT(2) bq20z45-R1DBTR(3)

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

(2) A single tube quantity is 50 units.

(3) A single reel quantity is 2000 units

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Impedance Track is a trademark of Texas Instruments.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Coloumb

Counter

HWOver

Current &

ShortCircuit

Protection

CellVoltage

Multiplexer

N-ChannelFET

Drive

PreChargeFET

&GPODDrive

PowerMode

Control

SMBD

GSRP

GSRN

ASRP

ASRN

GPOD

ZVCHG

CHG

DSG

VC5

VC4

VC3

VC2

VC1

SMBC

CellBalancing

Temperature

Measurement

DataFlash

Memory

SMB1.1

Impedance

Track ™

GasGauging

SHA-1

Authentication

Over & Under

Voltage

Protection

Voltage

Measurement

OverCurrent

Protection

Oscillator

Charging

Algorithm

FuseBlow

Detectionand

Logic

Over

Temperature

Protection

SAFE

PFIN

TS2

TS1

TOUT

PMS

Watchdog

Regulators

RESET

ALERT

REG33

REG25

VCELL+

BAT

PACK

VCC

VSS

MSRT

RBI

SystemControl AFEHWControl

Pack-

RSNS

5m -20m typ.W W

Pack+

SMBC

SMBD

bq20z45–R1

GND

VC4

VC3

VC2

VC1 VDD

OUT

bq294xx

DSG

PACK

VCC

ALERT

ZVCHG

PRES

PMS

TS2

VSS

PFIN

REG33

SAFE

TOUT

SMBD

VCELL+

SMBC

CHG

BAT

VC1

VSS

VC2

RBI

VC3

REG25

VC4

VSS

VC5

MRST

ASRP

GSRN

ASRN

GSRP

RESET

VSS

GPOD

TS1

bq20z45-R1

SLUS992 –DECEMBER 2009

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

SYSTEM PARTITIONING DIAGRAM

bq20z45-R1

DBT PACKAGE

(TOP VIEW)

Product Folder Link(s): bq20z45-R1

bq20z45-R1

www.ti.com

SLUS992 –DECEMBER 2009

PIN FUNCTIONS

PIN I/O(1) DESCRIPTION

NO. NAME

1 DSG O High side N-chan discharge FET gate drive

Battery pack input voltage sense input. It also serves as device wake up when device is in shutdown

2 PACK IA, P mode.

Positive device supply input. Connect to the center connection of the CHG FET and DSG FET to

3 VCC P ensure device supply either from battery stack or battery pack input

4 ZVCHG O P-chan pre-charge FET gate drive

High voltage general purpose open drain output. Can be configured to be used in pre-charge

5 GPOD OD condition

Pre-charge mode setting input. Connect to PACK to enable 0v pre-charge using charge FET

6 PMS I connected at CHG pin. Connect to VSS to disable 0V pre-charge using charge FET connected at

CHG pin.

7 VSS P Negative device power supply input. Connect all VSS pins together for operation of device

8 REG33 P 3.3V regulator output. Connect at least a 2.2μF capacitor to REG33 and VSS

9 TOUT P Thermistor bias supply output

10 VCELL+ - Internal cell voltage multiplexer and amplifier output. Connect a 0.1μF capacitor to VCELL+ and VSS

Alert output. In case of short circuit condition, overload condition and watchdog time out this pin will

11 ALERT OD be triggered.

12 PRES I System / Host present input.

13 TS1 IA Temperature sensor 1 input

14 TS2 IA Temperature sensor 2 input

15 PFIN I Fuse blow detection input

16 SAFE OD Blow fuse signal output

17 SMBD I/OD SMBus data line

18 SMBC I/OD SMBus clock line

19 NC - Not connected

20, 21, 25, VSS P Negative device power supply input. Connect all VSS pins together for operation of device

22 GSRP IA Coulomb counter differential input. Connect to one side of the sense resistor

23 GSRN IA Coulomb counter differential input. Connect to one side of the sense resistor

24 MRST I Reset input for internal CPU core. connect to RESET for correct operation of device

26 REG25 P 2.5V regulator output. Connect at least a 1μF capacitor to REG25 and VSS

RAM backup input. Connect a capacitor to this pin and VSS to protect loss of RAM data in case of

27 RBI P short circuit condition

29 RESET O Reset output. Connect to MSRT.

30 ASRN IA Short circuit and overload detection differential input. Connect to sense resistor

31 ASRP IA Short circuit and overload detection differential input. Connect to sense resistor

Cell voltage sense input and cell balancing input for the negative voltage of the bottom cell in cell

32 VC5 IA, P stack.

Cell voltage sense input and cell balancing input for the positive voltage of the bottom cell and the

33 VC4 IA, P negative voltage of the second lowest cell in cell stack.

Cell voltage sense input and cell balancing input for the positive voltage of the second lowest cell in

34 VC3 IA, P cell stack and the negative voltage of the second highest cell in 4 cell applications.

Cell voltage sense input and cell balancing input for the positive voltage of the second highest cell

35 VC2 IA, P and the negative voltage of the highest cell in 4 cell applications. Connect to VC3 in 2 cell stack

applications

Cell voltage sense input and cell balancing input for the positive voltage of the highest cell in cell

36 VC1 IA, P stack in 4 cell applications. Connect to VC2 in 3 or 2 cell stack applications

37 BAT I, P Battery stack voltage sense input

38 CHG O High side N-chan charge FET gate drive

(1) I = Input, IA = Analog input, I/O = Input/output, I/OD = Input/Open-drain output, O = Output, OA = Analog output, P = Power

Product Folder Link(s): bq20z45-R1

bq20z45-R1

SLUS992 –DECEMBER 2009

www.ti.com

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature (unless otherwise noted) (1)

PIN UNIT

BAT, VCC –0.3 V to 34 V

PACK, PMS –0.3 V to 34 V

VSS Supply voltage range VC(n)-VC(n+1); n = 1, 2, 3, 4 –0.3 V to 8.5 V

VC1, VC2, VC3, VC4 –0.3 V to 34 V

VC5 –0.3 V to 1 V

PFIN, SMBD, SMBC –0.3 V to 6 V

TS1, TS2, SAFE, VCELL+, PRES; ALERT –0.3 V to V(REG25) + 0.3 V

VIN Input voltage range MRST, GSRN, GSRP, RBI –0.3 V to V(REG25) + 0.3 V

ASRN, ASRP –1 V to 1 V

DSG, CHG, GPOD –0.3 V to 34 V

ZVCHG –0.3 V to V (BAT)

VOUT Output voltage range TOUT, ALERT, REG33 –0.3 V to 6 V

RESET –0.3 V to 7 V

REG25 –0.3 V to 2.75 V

ISS Maximum combined sink current for input pins PRES, PFIN, SMBD, SMBC 50 mA

TAOperating free-air temperature range –40°C to 85°C

TFFunctional temperature –40°C to 100°C

Tstg Storage temperature range –65°C to 150°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

PIN MIN NOM MAX UNIT

VSS Supply voltage VCC, BAT 4.5 25 V

V(STARTUP) Minimum startup voltage VCC, BAT, PACK 5.5 V

VC(n)-VC(n+1); n = 1,2,3,4 0 5 V

VC1, VC2, VC3, VC4 0 VSS V

VIN Input Voltage Range VC5 0 0.5 V

ASRN, ASRP –0.5 0.5 V

PACK, PMS 0 25 V

V(GPOD) Output Voltage Range GPOD 0 25 V

I(GPOD) Drain Current(1) GPOD 1 mA

C(REG25) 2.5V LDO Capacitor REG25 1 µF

C(REG33) 3.3V LDO Capacitor REG33 2.2 µF

C(VCELL+) Cell Voltage Output Capacitor VCELL+ 0.1 µF

R(PACK) PACK input block resistor(2) PACK 1 kΩ

(1) Use an external resistor to limit the current to GPOD to 1mA in high voltage application.

(2) Use an external resistor to limit the inrush current PACK pin required.

Product Folder Link(s): bq20z45-R1

bq20z45-R1

www.ti.com

SLUS992 –DECEMBER 2009

ELECTRICAL CHARACTERISTICS

over operating free-air temperature range (unless otherwise noted), TA= –40°C to 85°C, V(REG25) = 2.41 V to 2.59 V,

V(BAT) = 14 V, C(REG25) = 1 µF, C(REG33) = 2.2 µF; typical values at TA= 25°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SUPPLY CURRENT

I(NORMAL) Firmware running 550 µA

I(SLEEP) Sleep Mode CHG FET on; DSG FET on 124 µA

CHG FET off; DSG FET on 90 µA

CHG FET off; DSG FET off 52 µA

I(SHUTDOWN) Shutdown Mode 0.1 1 µA

SHUTDOWN WAKE; TA= 25°C (unless otherwise noted)

Shutdown exit at VSTARTUP

I(PACK) 1 µA

threshold

SRx WAKE FROM SLEEP; TA= 25°C (unless otherwise noted)

Positive or negative wake

threshold with 1.00 mV, 2.25

V(WAKE) 1.25 10 mV

mV, 4.5 mV and 9 mV

programmable options

V(WAKE) = 1 mV; -0.7 0.7

I(WAKE)= 0, RSNS1 = 0, RSNS0 = 1;

V(WAKE) = 2.25 mV;

I(WAKE) = 1, RSNS1 = 0, RSNS0 = 1; -0.8 0.8

I(WAKE) = 0, RSNS1 = 1, RSNS0 = 0;

V(WAKE_ACR) Accuracy of V(WAKE) mV

V(WAKE) = 4.5 mV;

I(WAKE) = 1, RSNS1 = 1, RSNS0 = 1; -1.0 1.0

I(WAKE) = 0, RSNS1 = 1, RSNS0 = 0;

V(WAKE) = 9 mV; -1.4 1.4

I(WAKE) = 1, RSNS1 = 1, RSNS0 = 1;

Temperature drift of V(WAKE)

V(WAKE_TCO) 0.5 %/°C

accuracy

Time from application of current

t(WAKE) 1 10 ms

and wake of bq20z45-R1

POWER-ON RESET

VIT– Negative-going voltage input Voltage at REG25 pin 1.70 1.80 1.90 V

Vhys Hysteresis VIT+ – VIT- 50 150 250 mV

tRST RESET active low time active low time after power up or watchdog reset 100 250 560 µs

WATCHDOG TIMER

tWDTINT Watchdog start up detect time 250 500 1000 ms

tWDWT Watchdog detect time 50 100 150 µs

2.5V LDO; I(REG33OUT) = 0 mA; TA= 25°C (unless otherwise noted)

4.5 < VCC or BAT < 25 V;

V(REG25) Regulator output voltage I(REG25OUT)≤16 mA; 2.41 2.5 2.59 V

TA= –40°C to 100°C

Regulator output change with I(REG25OUT) = 2 mA;

ΔV(REG25TEMP) ±0.2 %

temperature TA= –40°C to 100°C

5.4 < VCC or BAT < 25 V;

ΔV(REG25LINE) Line regulation 3 10 mV

I(REG25OUT) = 2 mA

0.2 mA ≤I(REG25OUT) ≤2 mA 7 25

ΔV(REG25LOAD) Load Regulation mV

0.2 mA ≤I(REG25OUT) ≤16 mA 25 50

drawing current until

I(REG25MAX) Current Limit 5 40 75 mA

REG25 = 2 V to 0 V

3.3V LDO; I(REG25OUT) = 0 mA; TA= 25°C (unless otherwise noted)

4.5 < VCC or BAT < 25 V;

V(REG33) Regulator output voltage I(REG33OUT) ≤25 mA; 3 3.3 3.6 V

TA= –40°C to 100°C

Regulator output change with I(REG33OUT) = 2 mA;

ΔV(REG33TEMP) ±0.2 %

temperature TA= –40°C to 100°C

5.4 < VCC or BAT < 25 V;

ΔV(REG33LINE) Line regulation 3 10 mV

I(REG33OUT) = 2 mA

Product Folder Link(s): bq20z45-R1

bq20z45-R1

SLUS992 –DECEMBER 2009

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

over operating free-air temperature range (unless otherwise noted), TA= –40°C to 85°C, V(REG25) = 2.41 V to 2.59 V,

V(BAT) = 14 V, C(REG25) = 1 µF, C(REG33) = 2.2 µF; typical values at TA= 25°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

0.2 mA ≤I(REG33OUT) ≤2 mA 7 17

ΔV(REG33LOAD) Load Regulation mV

0.2mA ≤I(REG33OUT) ≤25 mA 40 100

drawing current until REG33 = 3 V 25 100 145

I(REG33MAX) Current Limit mA

short REG33 to VSS, REG33 = 0 V 12 65

THERMISTOR DRIVE

V(TOUT) Output voltage I(TOUT) = 0 mA; TA= 25°C V(REG25) V

I(TOUT) = 1 mA; RDS(on) = (V(REG25) - V(TOUT) )/ 1 mA; TA=

RDS(on) TOUT pass element resistance 50 100 Ω

–40°C to 100°C

VCELL+ HIGH VOLTAGE TRANSLATION

VC(n) - VC(n+1) = 0 V; 0.950 0.975 1

TA= –40°C to 100°C

V(VCELL+OUT) VC(n) - VC(n+1) = 4.5 V; 0.275 0.3 0.375

TA= –40°C to 100°C

internal AFE reference voltage ;

V(VCELL+REF) Translation output 0.965 0.975 0.985 V

TA= –40°C to 100°C

Voltage at PACK pin; 0.98 × 1.02 ×

V(VCELL+PACK) V(PACK)/18

TA= –40°C to 100°C V(PACK)/18 V(PACK)/18

Voltage at BAT pin; 0.98 × 1.02 ×

V(VCELL+BAT) V(BAT)/18

TA= –40°C to 100°C V(BAT)/18 V(BAT)/18

CMMR Common mode rejection ratio VCELL+ 40 dB

K= {VCELL+ output (VC5=0V; VC4=4.5V) - VCELL+ 0.147 0.150 0.153

output (VC5=0V; VC4=0V)}/4.5

K Cell scale factor K= {VCELL+ output (VC2=13.5V; VC1=18V) - VCELL+

output 0.147 0.150 0.153

(VC5=13.5V; VC1=13.5V)}/4.5

Drive Current to VCELL+ VC(n) - VC(n+1) = 0V; VCELL+ = 0 V;

I(VCELL+OUT) 12 18 μA

capacitor TA= –40°C to 100°C

CELL output (VC2 = VC1 = 18 V) - CELL output (VC2 =

V(VCELL+O) CELL offset error -18 -1 18 mV

VC1 = 0 V)

IVCnL VC(n) pin leakage current VC1, VC2, VC3, VC4, VC5 = 3 V -1 0.01 1 μA

CELL BALANCING

internal cell balancing FET RDS(on) for internal FET switch at

R(BAL) 200 400 600 Ω

resistance VDS = 2 V; TA= 25°C

HARDWARE SHORT CIRCUIT AND OVERLOAD PROTECTION; TA= 25°C (unless otherwise noted)

VOL = 25 mV (min) 15 25 35

OL detection threshold voltage

V(OL) VOL = 100 mV; RSNS = 0, 1 90 100 110 mV

accuracy VOL = 205 mV (max) 185 205 225

V(SCC) = 50 mV (min) 30 50 70

SCC detection threshold

V(SCC) V(SCC) = 200 mV; RSNS = 0, 1 180 200 220 mV

voltage accuracy V(SCC) = 475 mV (max) 428 475 523

V(SCD) = –50 mV (min) –30 –50 –70

SCD detection threshold

V(SCD) V(SCD) = –200 mV; RSNS = 0, 1 –180 –200 –220 mV

voltage accuracy V(SCD) = –475 mV (max) –428 –475 –523

tda Delay time accuracy ±15.25 μs

Protection circuit propagation

tpd 50 μs

delay

FET DRIVE CIRCUIT; TA= 25°C (unless otherwise noted)

V(DSGON) = V(DSG) - V(PACK);

V(DSGON) DSG pin output on voltage V(GS) connect to 10 MΩ; DSG and CHG on; 8 12 16 V

TA= –40°C to 100°C

V(CHGON) = V(CHG) - V(BAT);

V(CHGON) CHG pin output on voltage V(GS) = 10 MΩ; DSG and CHG on; 8 12 16 V

TA= –40°C to 100°C

V(DSGOFF) DSG pin output off voltage V(DSGOFF) = V(DSG) - V(PACK) 0.2 V

V(CHGOFF) CHG pin output off voltage V(CHGOFF) = V(CHG) - V(BAT) 0.2 V

Product Folder Link(s): bq20z45-R1

bq20z45-R1

www.ti.com

SLUS992 –DECEMBER 2009

ELECTRICAL CHARACTERISTICS (continued)

over operating free-air temperature range (unless otherwise noted), TA= –40°C to 85°C, V(REG25) = 2.41 V to 2.59 V,

V(BAT) = 14 V, C(REG25) = 1 µF, C(REG33) = 2.2 µF; typical values at TA= 25°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V(CHG): V(PACK) ≥V(PACK) + 4V 400 1000

trRise time CL= 4700 pF μs

V(DSG): V(BAT) ≥V(BAT) + 4V 400 1000

V(CHG): V(PACK) + V(CHGON) ≥V(PACK) 40 200

+ 1V

tfFall time CL= 4700pF μs

V(DSG): VC1 + V(DSGON) ≥VC1 + 1V 40 200

V(ZVCHG) ZVCHG clamp voltage BAT = 4.5 V 3.3 3.5 3.7 V

LOGIC; TA= –40°C to 100°C (unless otherwise noted)

ALERT 60 100 200

R(PULLUP) Internal pullup resistance kΩ

RESET 1 3 6

ALERT 0.2

VOL Logic low output voltage level RESET; V(BAT) = 7V; V(REG25) = 1.5 V; I (RESET) = 200 μA 0.4 V

GPOD; I(GPOD) = 50 μA 0.6

LOGIC SMBC, SMBD, PFIN, PRES, SAFE, ALERT

VIH High-level input voltage 2.0 V

VIL Low-level input voltage 0.8 V

VOH Output voltage high(1) IL= –0.5 mA VREG25–0.5 V

VOL Low-level output voltage PRES, PFIN, ALERT, IL= 7 mA; 0.4 V

CIInput capacitance 5 pF

I(SAFE) SAFE source currents SAFE active, SAFE = V(REG25) –0.6 V –3 mA

SAFE leakage current SAFE inactive –0.2 0.2 µA

Ilkg Input leakage current 1 µA

ADC(2)

Input voltage range TS1, TS2, using Internal Vref –0.2 1 V

Conversion time 31.5 ms

Resolution (no missing codes) 16 bits

Effective resolution 14 15 bits

Integral nonlinearity ±0.03 %FSR(3)

Offset error(4) 140 250 µV

Offset error drift(4) TA= 25°C to 85°C 2.5 18 μV/°C

Full-scale error(5) ±0.1% ±0.7%

Full-scale error drift 50 PPM/°C

Effective input resistance(6) 8 MΩ

COULOMB COUNTER

Input voltage range –0.20 0.20 V

Conversion time Single conversion 250 ms

Effective resolution Single conversion 15 bits

–0.1 V to 0.20 V ±0.007 ±0.034

Integral nonlinearity %FSR

–0.20 V to –0.1 V ±0.007

Offset error (7) TA= 25°C to 85°C 10 µV

Offset error drift 0.4 0.7 µV/°C

Full-scale error(8) (9) ±0.35%

Full-scale error drift 150 PPM/°C

(1) RC[0:7] bus

(2) Unless otherwise specified, the specification limits are valid at all measurement speed modes

(3) Full-scale reference

(4) Post-calibration performance and no I/O changes during conversion with SRN as the ground reference

(5) Uncalibrated performance. This gain error can be eliminated with external calibration.

(6) The A/D input is a switched-capacitor input. Since the input is switched, the effective input resistance is a measure of the average

resistance.

(7) Post-calibration performance

(8) Reference voltage for the coulomb counter is typically Vref/3.969 at V(REG25) = 2.5 V, TA= 25°C.

(9) Uncalibrated performance. This gain error can be eliminated with external calibration.

Product Folder Link(s): bq20z45-R1

bq20z45-R1

SLUS992 –DECEMBER 2009

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

over operating free-air temperature range (unless otherwise noted), TA= –40°C to 85°C, V(REG25) = 2.41 V to 2.59 V,

V(BAT) = 14 V, C(REG25) = 1 µF, C(REG33) = 2.2 µF; typical values at TA= 25°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Effective input resistance(10) TA= 25°C to 85°C 2.5 MΩ

INTERNAL TEMPERATURE SENSOR

V(TEMP) Temperature sensor voltage(11) -2.0 mV/°C

VOLTAGE REFERENCE

Output voltage 1.215 1.225 1.230 V

Output voltage drift 65 PPM/°C

HIGH FREQUENCY OSCILLATOR

f(OSC) Operating frequency 4.194 MHz

–3% 0.25% 3%

f(EIO) Frequency error (12) (13) TA= 20°C to 70°C –2% 0.25% 2%

t(SXO) Start-up time(14) 2.5 5 ms

LOW FREQUENCY OSCILLATOR

f(LOSC) Operating frequency 32.768 kHz

–2.5% 0.25% 2.5%

f(LEIO) Frequency error(13) (15) TA= 20°C to 70°C –1.5% 0.25% 1.5%

t(LSXO) Start-up time(14) 500 µs

(10) The CC input is a switched capacitor input. Since the input is switched, the effective input resistance is a measure of the average

resistance.

(11) –53.7 LSB/°C

(12) The frequency error is measured from 4.194 MHz.

(13) The frequency drift is included and measured from the trimmed frequency at V(REG25) = 2.5V, TA= 25°C

(14) The startup time is defined as the time it takes for the oscillator output frequency to be ±3%

(15) The frequency error is measured from 32.768 kHz.

Product Folder Link(s): bq20z45-R1

bq20z45-R1

www.ti.com

SLUS992 –DECEMBER 2009

DATA FLASH CHARACTERISTICS OVER RECOMMENDED OPERATING TEMPERATURE AND

SUPPLY VOLTAGE

Typical Values at TA= 25°C and V(REG25) = 2.5 V (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Data retention 10 Years

Flash programming write-cycles 20k Cycles

t(ROWPROG) Row programming time See (1) 2 ms

t(MASSERASE) Mass-erase time 200 ms

t(PAGEERASE) Page-erase time 20 ms

I(DDPROG) Flash-write supply current 5 10 mA

I(DDERASE) Flash-erase supply current 5 10 mA

RAM BACKUP

V(RBI) > V(RBI)MIN , VREG25 < VIT–, TA= 85°C 1000 2500

I(RB) RB data-retention input current nA

V(RBI) > V(RBI)MIN , VREG25 < VIT–, TA= 25°C 90 220

V(RB) RB data-retention input voltage(1) 1.7 V

(1) Specified by design. Not production tested.

SMBus TIMING CHARACTERISTICS

TA= –40°C to 85°C Typical Values at TA= 25°C and VREG25 = 2.5 V (Unless Otherwise Noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

f(SMB) SMBus operating frequency Slave mode, SMBC 50% duty cycle 10 100 kHz

Master mode, No clock low slave

f(MAS) SMBus master clock frequency 51.2 kHz

extend

Bus free time between start and stop

t(BUF) 4.7 µs

(see Figure 1)

t(HD:STA) Hold time after (repeated) start (see Figure 1) 4 µs

t(SU:STA) Repeated start setup time (see Figure 1) 4.7 µs

t(SU:STO) Stop setup time (see Figure 1) 4 µs

Receive mode 0 ns

t(HD:DAT) Data hold time (see Figure 1)Transmit mode 300

t(SU:DAT) Data setup time (see Figure 1) 250 ns

t(TIMEOUT) Error signal/detect (see Figure 1) See (1) 25 35 µs

t(LOW) Clock low period (see Figure 1) 4.7 µs

t(HIGH) Clock high period (see Figure 1) See (2) 4 50 µs

t(LOW:SEXT) Cumulative clock low slave extend time See (3) 25 ms

Cumulative clock low master extend time

t(LOW:MEXT) See (4) 10 ms

(see Figure 1)

tfClock/data fall time See (5) 300 ns

trClock/data rise time See (6) 1000 ns

(1) The bq20z45-R1 times out when any clock low exceeds t(TIMEOUT).

(2) t(HIGH), Max, is the minimum bus idle time. SMBC = SMBD = 1 for t > 50 ms causes reset of any transaction involving bq20z45-R1 that

is in progress. This specification is valid when the NC_SMB control bit remains in the default cleared state (CLK[0]=0).

(3) t(LOW:SEXT) is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.

(4) t(LOW:MEXT) is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.

(5) Rise time tr= VILMAX – 0.15) to (VIHMIN + 0.15)

(6) Fall time tf= 0.9VDD to (VILMAX – 0.15)

Product Folder Link(s): bq20z45-R1

TLOW TRTF

THD:STA

TSU:DAT

THD:DAT

THD:STA

TBUF

SCLK

SDATA

TSU:STO

PSSP

SCLK

SDATA

Start Stop

TLOW:SEXT

TLOW:MEXT TLOW:MEXT TLOW:MEXT

SCLKACK†SCLKACK†

TSU:STA

THIGH

bq20z45-R1

SLUS992 –DECEMBER 2009

www.ti.com

A. SCLKACK is the acknowledge-related clock pulse generated by the master.

Figure 1. SMBus Timing Diagram

Product Folder Link(s): bq20z45-R1

bq20z45-R1

www.ti.com

SLUS992 –DECEMBER 2009

FEATURE SET

Primary (1st Level) Safety Features

The bq20z45-R1 supports a wide range of battery and system protection features that can easily be configured.

The primary safety features include:

• Cell over/undervoltage protection

• Charge and discharge overcurrent

• Short Circuit

• Charge and discharge overtemperature with independent alarms and thresholds for each thermistor

• AFE Watchdog

Secondary (2nd Level) Safety Features

The secondary safety features of the bq20z45-R1 can be used to indicate more serious faults via the SAFE (pin

7). This pin can be used to blow an in-line fuse to permanently disable the battery pack from charging or

discharging. The secondary safety protection features include:

• Safety overvoltage

• Safety undervoltage

• Safety overcurrent in charge and discharge

• Safety overtemperature in charge and discharge with independent alarms and thresholds for each thermistor

• Charge FET and 0 Volt Charge FET fault

• Discharge FET fault

• Cell imbalance detection (active and at rest)

• Open thermistor detection

• AFE communication fault

Charge Control Features

The bq20z45-R1 charge control features include:

• Supports JEITA temperature ranges. Reports charging voltage and charging current according to the active

temperature range.

• Handles more complex charging profiles. Allows for splitting the standard temperature range into 2

sub-ranges and allows for varying the charging current according to the cell voltage.

• Reports the appropriate charging current needed for constant current charging and the appropriate charging

voltage needed for constant voltage charging to a smart charger using SMBus broadcasts.

• Determines the chemical state of charge of each battery cell using Impedance Track™ and can reduce the

charge difference of the battery cells in fully charged state of the battery pack gradually using cell balancing

algorithm during charging. This prevents fully charged cells from overcharging and causing excessive

degradation and also increases the usable pack energy by preventing premature charge termination

• Supports pre-charging/zero-volt charging

• Supports charge inhibit and charge suspend if battery pack temperature is out of temperature range

• Reports charging fault and also indicate charge status via charge and discharge alarms.

Gas Gauging

The bq20z45-R1 uses the Impedance Track™ Technology to measure and calculate the available charge in

battery cells. The achievable accuracy is better than 1% error over the lifetime of the battery and there is no full

charge discharge learning cycle required.

See Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm application note (SLUA364)

for further details.

Product Folder Link(s): bq20z45-R1

bq20z45-R1

SLUS992 –DECEMBER 2009

www.ti.com

Lifetime Data Logging Features

The bq20z45-R1 offers lifetime data logging, where important measurements are stored for warranty and

analysis purposes. The data monitored include:

• Lifetime maximum temperature

• Lifetime minimum temperature

• Lifetime maximum battery cell voltage

• Lifetime minimum battery cell voltage

• Lifetime maximum battery pack voltage

• Lifetime minimum battery pack voltage

• Lifetime maximum charge current

• Lifetime maximum discharge current

• Lifetime maximum charge power

• Lifetime maximum discharge power

• Lifetime maximum average discharge current

• Lifetime maximum average discharge power

• Lifetime average temperature

Authentication

The bq20z45-R1 supports authentication by the host using SHA-1.

Power Modes

The bq20z45-R1 supports 3 different power modes to reduce power consumption:

• In Normal Mode, the bq20z45-R1 performs measurements, calculations, protection decisions and data

updates in 1 second intervals. Between these intervals, the bq20z45-R1 is in a reduced power stage.

• In Sleep Mode, the bq20z45-R1 performs measurements, calculations, protection decisions and data update

in adjustable time intervals. Between these intervals, the bq20z45-R1 is in a reduced power stage. The

bq20z45-R1 has a wake function that enables exit from Sleep mode, when current flow or failure is detected.

• In Shutdown Mode the bq20z45-R1 is completely disabled.

CONFIGURATION

Oscillator Function

The bq20z45-R1 fully integrates the system oscillators. Therefore the bq20z45-R1 requires no external

components for this feature.

System Present Operation

The bq20z45-R1 checks the PRES pin periodically (1s). If PRES input is pulled to ground by external system, the

bq20z45-R1 detects this as system present.

BATTERY PARAMETER MEASUREMENTS

The bq20z45-R1 uses an integrating delta-sigma analog-to-digital converter (ADC) for current measurement, and

a second delta-sigma ADC for individual cell and battery voltage, and temperature measurement.

Charge and Discharge Counting

The integrating delta-sigma ADC measures the charge/discharge flow of the battery by measuring the voltage

drop across a small-value sense resistor between the SR1 and SR2 pins. The integrating ADC measures bipolar

signals from -0.25 V to 0.25 V. The bq20z45-R1 detects charge activity when VSR = V(SRP)- V(SRN)is positive and

discharge activity when VSR = V(SRP) - V(SRN) is negative. The bq20z45-R1 continuously integrates the signal over

time, using an internal counter. The fundamental rate of the counter is 0.65 nVh.

Product Folder Link(s): bq20z45-R1

bq20z45-R1

www.ti.com

SLUS992 –DECEMBER 2009

Voltage

The bq20z45-R1 updates the individual series cell voltages at one second intervals. The internal ADC of the

bq20z45-R1 measures the voltage, scales and calibrates it appropriately. This data is also used to calculate the

impedance of the cell for the Impedance Track™ gas-gauging.

Current

The bq20z45-R1 uses the SRP and SRN inputs to measure and calculate the battery charge and discharge

current using a 5 mΩto 20 mΩtyp. sense resistor.

Auto Calibration

The bq20z45-R1 provides an auto-calibration feature to cancel the voltage offset error across SRN and SRP for

maximum charge measurement accuracy. The bq20z45-R1 performs auto-calibration when the SMBus lines stay

low continuously for a minimum of 5 s.

Temperature

The bq20z45-R1 has an internal temperature sensor and inputs for 2 external temperature sensor inputs TS1

and TS2 used in conjunction with two identical NTC thermistors (default are Semitec 103AT) to sense the battery

environmental temperature. The bq20z45-R1 can be configured to use internal or up to 2 external temperature

sensors.

Product Folder Link(s): bq20z45-R1

bq20z45-R1

SLUS992 –DECEMBER 2009

www.ti.com

COMMUNICATIONS

The bq20z45-R1 uses SMBus v1.1 with Master Mode and package error checking (PEC) options per the SBS

specification.

SMBus On and Off State

The bq20z45-R1 detects an SMBus off state when SMBC and SMBD are logic-low for ≥2 seconds. Clearing this

state requires either SMBC or SMBD to transition high. Within 1 ms, the communication bus is available.

SBS Commands

Table 2. SBS COMMANDS

SBS Size in Min Max

Mode Name Default Value Unit

Cmd Format Bytes Value Value

0x00 R/W ManufacturerAccess hex 2 0x0000 0xffff — —

0x01 R/W RemainingCapacityAlarm unsigned int 2 0 65535 300 mAh or 10mWh

0x02 R/W RemainingTimeAlarm unsigned int 2 0 65535 10 min

0x03 R/W BatteryMode hex 2 0x0000 0xe383 — —

0x04 R/W AtRate signed int 2 –32768 32767 — mA or 10mW

0x05 R AtRateTimeToFull unsigned int 2 0 65534 — min

0x06 R AtRateTimeToEmpty unsigned int 2 0 65534 — min

0x07 R AtRateOK unsigned int 2 0 65535 — —

0x08 R Temperature unsigned int 2 0 65535 — 0.1°K

0x09 R Voltage unsigned int 2 0 65535 — mV

0x0a R Current signed int 2 –32768 32767 — mA

0x0b R AverageCurrent signed int 2 –32768 32767 — mA

0x0c R MaxError unsigned int 1 0 100 — %

0x0d R RelativeStateOfCharge unsigned int 1 0 100 — %

0x0e R AbsoluteStateOfCharge unsigned int 1 0 100+ — %

0x0f R/W RemainingCapacity unsigned int 2 0 65535 — mAh or 10mWh

0x10 R FullChargeCapacity unsigned int 2 0 65535 — mAh or 10mWh

0x11 R RunTimeToEmpty unsigned int 2 0 65534 — min

0x12 R AverageTimeToEmpty unsigned int 2 0 65534 — min

0x13 R AverageTimeToFull unsigned int 2 0 65534 — min

0x14 R ChargingCurrent unsigned int 2 0 65534 — mA

0x15 R ChargingVoltage unsigned int 2 0 65534 — mV

0x16 R BatteryStatus unsigned int 2 0x0000 0xffff — —

0x17 R/W CycleCount unsigned int 2 0 65535 — —

0x18 R/W DesignCapacity unsigned int 2 0 65535 4400 mAh or 10mWh

0x19 R/W DesignVoltage unsigned int 2 7000 16000 14400 mV

0x1a R/W SpecificationInfo unsigned int 2 0x0000 0xffff 0x0031 —

0x1b R/W ManufactureDate unsigned int 2 0 65535 01-Jan-1980 —

0x1c R/W SerialNumber hex 2 0x0000 0xffff 0x0001 —

0x20 R/W ManufacturerName String 20+1 — — Texas Inst. —

0x21 R/W DeviceName String 20+1 — — bq20z45-R1 —

0x22 R/W DeviceChemistry String 4+1 — — LION —

0x23 R ManufacturerData String 14+1 — — — —

0x2f R/W Authenticate String 20+1 — — — —

0x3c R CellVoltage4 unsigned int 2 0 65535 — mV

0x3d R CellVoltage3 unsigned int 2 0 65535 — mV

0x3e R CellVoltage2 unsigned int 2 0 65535 — mV

0x3f R CellVoltage1 unsigned int 2 0 65535 — mV

Product Folder Link(s): bq20z45-R1

bq20z45-R1

www.ti.com

SLUS992 –DECEMBER 2009

Table 3. EXTENDED SBS COMMANDS

SBS Cmd Size in Default

Mode Name Format Min Value Max Value Unit

Bytes Value

0x45 R AFEData String 11+1 — — — —

0x46 R/W FETControl hex 2 0x00 0xff — —

0x4f R StateOfHealth hex 2 0x0000 0xffff — %

0x51 R SafetyStatus hex 2 0x0000 0xffff — —

0x53 R PFStatus hex 2 0x0000 0xffff — —

0x54 R OperationStatus hex 2 0x0000 0xffff — —

0x55 R ChargingStatus hex 2 0x0000 0xffff — —

0x57 R ResetData hex 2 0x0000 0xffff — —

0x58 R WDResetData unsigned int 2 0 65535 — —

0x5a R PackVoltage unsigned int 2 0 65535 — mV

0x5d R AverageVoltage unsigned int 2 0 65535 — mV

0x5e R TS1Temperature integer 2 –400 1200 — 0.1°C

0x5f R TS2Temperature integer 2 –400 1200 — 0.1°C

0x60 R/W UnSealKey hex 4 0x00000000 0xffffffff — —

0x61 R/W FullAccessKey hex 4 0x00000000 0xffffffff — —

0x62 R/W PFKey hex 4 0x00000000 0xffffffff — —

0x63 R/W AuthenKey3 hex 4 0x00000000 0xffffffff — —

0x64 R/W AuthenKey2 hex 4 0x00000000 0xffffffff — —

0x65 R/W AuthenKey1 hex 4 0x00000000 0xffffffff — —

0x66 R/W AuthenKey0 hex 4 0x00000000 0xffffffff — —

0x69 R SafetyStatus2 hex 2 0x0000 0x000f — —

0x6b R PFStatus2 hex 2 0x0000 0x000f — —

0x6c R/W ManufBlock1 String 20 — — — —

0x6d R/W ManufBlock2 String 20 — — — —

0x6e R/W ManufBlock3 String 20 — — — —

0x6f R/W ManufBlock4 String 20 — — — —

0x70 R/W ManufacturerInfo String 31+1 — — — —

0x71 R/W SenseResistor unsigned int 2 0 65535 — μΩ

0x72 R TempRange hex 2 0x0000 0xffff — —

0x73 R LifetimeData String 32+1 — — — —

0x77 R/W DataFlashSubClassID hex 2 0x0000 0xffff — —

0x78 R/W DataFlashSubClassPage1 hex 32 — — — —

0x79 R/W DataFlashSubClassPage2 hex 32 — — — —

0x7a R/W DataFlashSubClassPage3 hex 32 — — — —

0x7b R/W DataFlashSubClassPage4 hex 32 — — — —

0x7c R/W DataFlashSubClassPage5 hex 32 — — — —

0x7d R/W DataFlashSubClassPage6 hex 32 — — — —

0x7e R/W DataFlashSubClassPage7 hex 32 — — — —

0x7f R/W DataFlashSubClassPage8 hex 32 — — — —

Product Folder Link(s): bq20z45-R1

bq20z45-R1

SLUS992 –DECEMBER 2009

www.ti.com

APPLICATION SCHEMATIC

Product Folder Link(s): bq20z45-R1

PACKAGE OPTION ADDENDUM

www.ti.com 16-Jul-2011

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status (1) Package Type Package

Drawing Pins Package Qty Eco Plan (2) Lead/

Ball Finish MSL Peak Temp (3) Samples

(Requires Login)

BQ20Z45DBT-R1 ACTIVE TSSOP DBT 38 50 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

BQ20Z45DBTR-R1 ACTIVE TSSOP DBT 38 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

BQ20Z45DBTR-R1 TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

BQ20Z45DBTR-R1 TSSOP DBT 38 2000 367.0 367.0 38.0

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other

changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should

obtain the latest relevant information before placing orders and should verify that such information is current and complete. All

semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time

of order acknowledgment.

TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms

and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary

to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily

performed.

TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and

applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide

adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or

other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information

published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or

endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the

third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration

and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered

documentation. Information of third parties may be subject to additional restrictions.

Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service

voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.

TI is not responsible or liable for any such statements.

Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements

concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support

that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which

anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause

harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use

of any TI components in safety-critical applications.

In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to

help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and

requirements. Nonetheless, such components are subject to these terms.

No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties

have executed a special agreement specifically governing such use.

Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in

military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components

which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and

regulatory requirements in connection with such use.

TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which

have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such

components to meet such requirements.

Products Applications

Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive

Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications

Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers

DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps

DSP dsp.ti.com Energy and Lighting www.ti.com/energy

Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial

Interface interface.ti.com Medical www.ti.com/medical

Logic logic.ti.com Security www.ti.com/security

Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense

Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video

RFID www.ti-rfid.com

OMAP Mobile Processors www.ti.com/omap TI E2E Community e2e.ti.com

Wireless Connectivity www.ti.com/wirelessconnectivity

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265