19-6295; Rev 6/12 DS1218 Nonvolatile Controller FEATURES PIN ASSIGNMENT Converts CMOS RAM into nonvolatile memories Unconditionally write protects when VCC is out of tolerance Automatically switches to battery when power fail occurs Space saving 8-pin PDIP or 8-pin 150 mil SO Packages Consumes less than 100nA of battery current VCCO 1 8 VCCI NC 2 7 VBAT NC 3 6 CEO GND 4 5 CEI PIN DESCRIPTION VCCI VCCO CEI NC CEO VBAT GND - Input +5 Volt Supply - RAM Power (VCC) Supply - Chip Enable Input - No Connection - Chip Enable Output - + Battery - Ground DESCRIPTION The DS1218 is a CMOS circuit which solves the application problems of converting CMOS RAM into nonvolatile memory. Incoming power is monitored for an out-of-tolerance condition. When such a condition is detected, the chip enable output is inhibited to accomplish write protection and the battery is switched on to supply RAM with uninterrupted power. Special circuitry uses a low-leakage CMOS process which affords precise voltage detection at extremely low battery consumption. The 8-pin package keeps PC board real estate requirements to a minimum. By combining the DS1218 nonvolatile controller chip with a full CMOS memory and lithium batteries, 10 years of nonvolatile RAM operation can be achieved. OPERATION The DS1218 Nonvolatile Controller performs the circuit functions required to battery back-up a RAM. First, a switch is provided to direct power from the battery or VCCI supply, depending on which is greater. This switch has a voltage drop of less than 0.2V. The second function which the nonvolatile controller provides is power-fail detection. The DS1218 constantly monitors the VCC supply. When VCCI falls to 1.26 times the battery voltage, a precision comparator outputs a power-fail detect signal to the chip enable logic. The third function of write protection is accomplished by holding the chip enable output signal to within 0.2V of the VCCI or battery supply, when a power-fail condition is detected. During nominal supply conditions, the chip enable output will follow chip enable input with a maximum propagation delay of 10 ns. 1 of 7 DS1218 ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground Operating Temperature Range Storage Temperature Range Soldering Temperature (reflow, SO) Lead Temperature (soldering, 10s) -0.5V to +7.0V 0C to +70C -55C to +125C +260C +300C This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) PDIP SO Note 1: Junction-to-Ambient Thermal Resistance (JA).....................................................110C/W Junction-to-Case Thermal Resistance (JC).........................................................40C/W Junction-to-Ambient Thermal Resistance (JA)....................................................136C/W Junction-to-Case Thermal Resistance (JC).........................................................38C/W Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board for the SO. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. RECOMMENDED OPERATING CONDITIONS PARAMETER Supply Logic 1 Logic 0 Battery Supply SYMBOL VCCI VIH VIL VBAT MIN 4.5 2.0 -0.3 2.5 DC ELECTRICAL CHARACTERISTICS PARAMETER Active Current Battery Current RAM Current (VCCO1 VCCI -0.3V) RAM Current (VCCO VCCI -0.2V) Input Leakage CEO Output @ 2.4V CEO Output @ 0.4V VCC Trip Point CAPACITANCE PARAMETER Input Capacitance Output Capacitance SYMBOL ICCI IBAT ICCO MIN ICCO IIL IOH IOL VCCTP SYMBOL CIN COUT TYP 5.0 3.0 MAX 5.5 5.5 0.8 3.5 (0C to +70C) UNITS V V V V NOTES 2 2 2 2 (0C to +70C; VCCI = 5V 10%) TYP 2 MAX 5 100 80 70 -1.0 -1.0 UNITS mA nA mA NOTES 4 4, 5 6 mA +1.0 4.0 A mA mA 1.26xVBAT MIN 2 of 7 TYP MAX 5 7 (TA = +25C) UNITS pF pF NOTES DS1218 AC ELECTRICAL CHARACTERISTICS PARAMETER CE Propagation Delay Recovery at Power-up VCC Slew Rate CE Pulse Width SYMBOL tPD tREC tF tCE MIN 0.2 500 3 of 7 (0C to +70C; VCC = 5.0V 10%) TYP 4 MAX 10 2 1.5 UNITS ns ms s s NOTES 3 7, 8 DS1218 TIMING DIAGRAM: POWER-UP TIMING DIAGRAM: POWER-DOWN 4 of 7 DS1218 NOTES: 2. All voltages referenced to ground. 3. Measured with a load as shown in Figure 1. 4. Outputs open. 5. Drain from battery when VCC < VBAT. 6. Maximum amount of current which can be drawn through pin 1 of the controller. 7. tCE max must be met to ensure data integrity on power loss. 8. CEO can only sustain leakage current in the battery backup mode. OUTPUT LOAD Figure 1 5 of 7 DS1218 ORDERING INFORMATION PART DS1218+ DS1218S+ TEMP RANGE 0C to +70C 0C to +70C PINPACKAGE 8 PDIP 8 SO +Denotes a lead(Pb)-free/RoHS-compliant package. PACKAGE INFORMATION For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 8 PDIP 8 SO PACKAGE CODE P8+1 S8+2 OUTLINE NO. 21-0043 21-0041 6 of 7 LAND PATTERN NO. 90-0096 DS1218 REVISION HISTORY REVISION DATE 6/12 DESCRIPTION PAGES CHANGED Added lead temperature and soldering temperature information to the Absolute Maximum Ratings section; added the Package Thermal Characteristics section; added the Ordering Information and Package Information sections 2, 6 7 of 7 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, Inc. 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 (c) 2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.