ANALOG DEVICES LCM0s Complete, 12-Bit, 100 kHz, Sampling ADCs AD7870/AD7875/AD7876 FEATURES Complete Monolithic 12-Bit ADC with: 2 ps Track/Hold Amplifier 8 ps A/D Converter On-Chip Reference Laser-Trimmed Clock Parallel, Byte and Serial Digital Interface 72 dB SNR at 10 kHz Input Frequency (AD7870, AD7875) 57 ns Data Access Time Low Power: -60 mW typ Variety of Input Ranges: +3 V for AD7870 0 V to +5 V for AD7875 +10 V for AD7876 GENERAL DESCRIPTION The AD7870/AD7875/AD7876 is a fast, complete, 12-bit A/D converter. It consists of a track/hold amplifier, 8 ys successive- approximation ADC, 3 V buried Zener reference and versatile interface logic. The ADC features a self-contained internal clock which is laser trimmed to guarantee accurate control of conversion time. No external clock timing components are re- quired; the on-chip clock may he overridden by an external clock if required. The parts offer a choice of three data output formats: a single, parallel, 12-bit word; two 8-bit bytes, or serial data. Fast bus ac- cess times and standard control inputs ensure easy interfacing to modern microprocessors and digital signal processors. All parts operate from 5 V power supplies. The AD7870 and AD7876 accept input signal ranges of +3 V and +10 V, respec- tively, while the AD7875 accepts a unipolar 0 to +5 V input range. The parts can convert full power signals up to 50 kHz. The AD7870/AD7875/AD7876 feature dc accuracy specifica- tions such as linearity, full-scale and offset error. In addition, the AD7870 and AD7875 are fully specified for dynamic perfor- mance parameters including distortion and signal-to-noise ratio. The parts are available in a 24-pin, 0.3 inch-wide, plastic or her- metic dual-in-line package (DIP). The AD7870 and AD7875 are available in a 28-pin plastic leaded chip carrier (PLCC), while the AD7876 is available and in a 24-pin small outline (SOIC) package. FUNCTIONAL BLOCK DIAGRAM AGNO REF OUT Vow Yoo PUT BCALING TRACK/HOLD come av 42-BIT REFERENCE oa clk cLocK a SARs COUNTER T2MCLK CONTROL LOGIC TONVET ner AD7670/A07875 t INTERFACE avers ce ORD BUSY: DBT ea DGND Vas wt PRODUCT HIGHLIGHTS 1. Complete 12-Bit ADC on a Chip. The AD7870/AD7875/AD7876 provides all the functions necessary for analog-to-digital conversion and combines a 12-bit ADC with internal clock, track/hold amplifier and reference on a single chip. 2. Dynamic Specifications for DSP Users. The AD7870 and AD7875 are fully specified and tested for ac parameters, including signal-to-noise ratio, harmonic dis- tortion and intermodulation distortion. 3. Fast Microprocessor Interface. Data access times of 57 ns make the parts compatible with modern 8- and 16-bit microprocessors and digital signal pro- cessors. Key digital timing parameters are tested and guaran- teed over the full operating temperature range. PIN CONNECTIONS DIP DOT HREM HC WO CONPEECT To obtain the most recent version or complete data sheet, call our fax retrieval system at 1-900-446-6212 or visit our World Wide Web site at hetp:/www.analog.com. REV. B A/D CONVERTERS & DATA ACQUISITION SUBSYSTEMS 2-91 AD7870/AD7875/AD7876SPECIFICATIONS ,,-.sv+5x.v,=-sv=sx, AGND = DGHD = OV, foi, = 2.5 MHz external, unless otherwise stated. All Specifications 1,4, to Tmax unless otherwise noted.) AD7870 Parameter JA | KB) Leys T | Units Test Conditions/Comments DYNAMIC PERFORMANCE? Signal to Noise Ratio? (SNR) (at +25C 70 70 72 69 69 dB min Vin = 10 kHz Sine Wave, foamprz = 100 kHz Tain to Tax 70 70 71 69 69 =| dB min Typically 71.5 dB for 0 < Vin < 50 kHz Total Harmonic Distortion (THD) 80 | -80 -80 | -78 78 {dB max Vin = 10 kHz Sine Wave, fsampie = 100 kHz Typically -86 dB for 0 < Viy < 50 kHz Peak Harmonic or Spurious Noise -B80 | -80 -80 | -78 | -78 |dB max Vin = 10 KHz, foampre = 100 kHz Typically -86 dB for 0 < Vjy < 50 kHz Intermodulation Distortion IMD) Second Order Terms ~80 | -80 -80 78 | -78 |dB max fa = 9 kHz, fo = 9.5 kHz, fsampre = 50 kHz Third Order Terms 80 -80 -80 78 78 |dB max fa = 9 kHz, fb = 9.5 kHz, fsampie = 50 kHz Track/Hold Acquisition Time 2 2 2 2 2 is max DC ACCURACY Resolution 12 12 12 12 12 Bits Minimum Resolution for which No Missing Codes are Guaranteed 12 12 12 12 12 | Bits Integral Nonlinearity 1/2 | +1/2 | 1/4 | 1/2 | +1/2 | LSB yp Integral Nonlinearity tl 1/2 ti | LSB max Differential Nonlinearity tl +1 t1 LSB max Bipolar Zero Error +5 $5 +5 +5 +5 | LSB max Positive Full-Scale Error* +5 +5 +5 +5 +5 | LSB max Negative Full-Scale Error* +5 5 +5 +5 +5 |LSB max ANALOG INPUT Input Voltage Range +3 +3 43 +3 +3 | Volts Input Current +500) +500) +500) +500} 500) pA max REFERENCE OUTPUT REF OUT (a. +25C 2.99 | 2.99 | 2.99 ) 2.99] 2.99 |V min 3.01 | 3.01 3.01 | 3.01 | 3.01 |V max REF OUT Tempco +60 | 60 +35 | +60 | +35 | ppm/C max Reference Load Sensitivity (AREF OUT/AI)| +1 t1 t1 tl +] mV max Reference Load Current Change (0 wA~500 JA) Reference Load Should Not Be Changed During Conversion. LOGIC INPUTS Input High Voltage, Ving 2.4 2.4 2.4 2.4 2.4 |Vimin Vpp = 5 Vt 5% Input Low Voltage, Vint 0.8 0.8 0.8 0.8 0.8 | Vmax Vpp = 5 Vt 5% Input Current, Jp. +10 | +10 10 | +10 | +10 | pA max Vin = 0 V to Vpp Input Current (12/8/CLK Input Only) +10 | 10 410 | +10 | 10 |pA max Vin = Vss tO Vop Input Capacitance, C)y? 10 10 10 10 10 | pF max LOGIC OUTPUTS Output High Voltage, Vou 4.0 4.0 4.0 4.0 4.0 |V min Tsourcr = 40 pA Output Low Voltage, Voy. 0.4 0.4 0.4 0.4 0.4 | Vmax Igwx = 1.6 mA DB11-DBO Floating-State Leakage Current +10 | +10 | #10 | +10 | +10 [WA max Floating-State Output Capacitance? 15 15 15 15 15 pF max CONVERSION TIME External Clock (ferx = 2.5 MHz) 8 8 8 8 8 jis max Internal Clock 19 7/9 7/9 19 7/9 | us min/us max POWER REQUIREMENTS Von +5 +5 +5 +5 +5 jVnom +5% for Specified Performance Vss -5 =) -5 4 ~5 V nom +5% for Specified Performance Ipp 13 13 13 13 13 mA max Typically 8 mA Iss 6 6 6 6 6 mA max Typically 4 mA Power Dissipation 95 95 95 95 95 mW max Typically 60 mW NOTES Temperature ranges are as follows: J, K, L Versions; 0C to +70C: A, B, C Versions; -25C to +85C: S, T Versions, 35C ta +125"C. Vin (pk-pk) = 3 Vz SNR calculation includes distortion and noise components. Measured with respect to internal reference and includes bipolar offset error. Sample tested (4 +25C to ensure compliance. Specifications subject to change without notice. 2-92 A/D CONVERTERS & DATA ACQUISITION SUBSYSTEMS REV.B